Path: blob/21.2-virgl/src/gallium/drivers/r300/r300_screen.c
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/*1* Copyright 2008 Corbin Simpson <[email protected]>2* Copyright 2010 Marek Olšák <[email protected]>3*4* Permission is hereby granted, free of charge, to any person obtaining a5* copy of this software and associated documentation files (the "Software"),6* to deal in the Software without restriction, including without limitation7* on the rights to use, copy, modify, merge, publish, distribute, sub8* license, and/or sell copies of the Software, and to permit persons to whom9* the Software is furnished to do so, subject to the following conditions:10*11* The above copyright notice and this permission notice (including the next12* paragraph) shall be included in all copies or substantial portions of the13* Software.14*15* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL18* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,19* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR20* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE21* USE OR OTHER DEALINGS IN THE SOFTWARE. */2223#include "util/format/u_format.h"24#include "util/format/u_format_s3tc.h"25#include "util/u_screen.h"26#include "util/u_memory.h"27#include "util/os_time.h"28#include "vl/vl_decoder.h"29#include "vl/vl_video_buffer.h"3031#include "r300_context.h"32#include "r300_texture.h"33#include "r300_screen_buffer.h"34#include "r300_state_inlines.h"35#include "r300_public.h"3637#include "draw/draw_context.h"3839/* Return the identifier behind whom the brave coders responsible for this40* amalgamation of code, sweat, and duct tape, routinely obscure their names.41*42* ...I should have just put "Corbin Simpson", but I'm not that cool.43*44* (Or egotistical. Yet.) */45static const char* r300_get_vendor(struct pipe_screen* pscreen)46{47return "X.Org R300 Project";48}4950static const char* r300_get_device_vendor(struct pipe_screen* pscreen)51{52return "ATI";53}5455static const char* chip_families[] = {56"unknown",57"ATI R300",58"ATI R350",59"ATI RV350",60"ATI RV370",61"ATI RV380",62"ATI RS400",63"ATI RC410",64"ATI RS480",65"ATI R420",66"ATI R423",67"ATI R430",68"ATI R480",69"ATI R481",70"ATI RV410",71"ATI RS600",72"ATI RS690",73"ATI RS740",74"ATI RV515",75"ATI R520",76"ATI RV530",77"ATI R580",78"ATI RV560",79"ATI RV570"80};8182static const char* r300_get_family_name(struct r300_screen* r300screen)83{84return chip_families[r300screen->caps.family];85}8687static const char* r300_get_name(struct pipe_screen* pscreen)88{89struct r300_screen* r300screen = r300_screen(pscreen);9091return r300_get_family_name(r300screen);92}9394static void r300_disk_cache_create(struct r300_screen* r300screen)95{96struct mesa_sha1 ctx;97unsigned char sha1[20];98char cache_id[20 * 2 + 1];99100_mesa_sha1_init(&ctx);101if (!disk_cache_get_function_identifier(r300_disk_cache_create,102&ctx))103return;104105_mesa_sha1_final(&ctx, sha1);106disk_cache_format_hex_id(cache_id, sha1, 20 * 2);107108r300screen->disk_shader_cache =109disk_cache_create(r300_get_family_name(r300screen),110cache_id,111r300screen->debug);112}113114static struct disk_cache* r300_get_disk_shader_cache(struct pipe_screen* pscreen)115{116struct r300_screen* r300screen = r300_screen(pscreen);117return r300screen->disk_shader_cache;118}119120static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)121{122struct r300_screen* r300screen = r300_screen(pscreen);123boolean is_r500 = r300screen->caps.is_r500;124125switch (param) {126/* Supported features (boolean caps). */127case PIPE_CAP_NPOT_TEXTURES:128case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:129case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:130case PIPE_CAP_ANISOTROPIC_FILTER:131case PIPE_CAP_POINT_SPRITE:132case PIPE_CAP_OCCLUSION_QUERY:133case PIPE_CAP_TEXTURE_MIRROR_CLAMP:134case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:135case PIPE_CAP_BLEND_EQUATION_SEPARATE:136case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:137case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:138case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:139case PIPE_CAP_CONDITIONAL_RENDER:140case PIPE_CAP_TEXTURE_BARRIER:141case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:142case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:143case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:144case PIPE_CAP_CLIP_HALFZ:145case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:146return 1;147148case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:149return R300_BUFFER_ALIGNMENT;150151case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:152return 16;153154case PIPE_CAP_GLSL_FEATURE_LEVEL:155case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:156return 120;157158/* r300 cannot do swizzling of compressed textures. Supported otherwise. */159case PIPE_CAP_TEXTURE_SWIZZLE:160return r300screen->caps.dxtc_swizzle;161162/* We don't support color clamping on r500, so that we can use color163* interpolators for generic varyings. */164case PIPE_CAP_VERTEX_COLOR_CLAMPED:165return !is_r500;166167/* Supported on r500 only. */168case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:169case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:170case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:171case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:172case PIPE_CAP_VERTEX_SHADER_SATURATE:173return is_r500 ? 1 : 0;174175case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:176return 0;177case PIPE_CAP_SHAREABLE_SHADERS:178return 0;179180case PIPE_CAP_MAX_GS_INVOCATIONS:181return 32;182case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:183return 1 << 27;184185/* SWTCL-only features. */186case PIPE_CAP_PRIMITIVE_RESTART:187case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:188case PIPE_CAP_USER_VERTEX_BUFFERS:189case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:190return !r300screen->caps.has_tcl;191192/* HWTCL-only features / limitations. */193case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:194case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:195case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:196return r300screen->caps.has_tcl;197198/* Texturing. */199case PIPE_CAP_MAX_TEXTURE_2D_SIZE:200return is_r500 ? 4096 : 2048;201case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:202case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:203/* 13 == 4096, 12 == 2048 */204return is_r500 ? 13 : 12;205206/* Render targets. */207case PIPE_CAP_MAX_RENDER_TARGETS:208return 4;209case PIPE_CAP_ENDIANNESS:210return PIPE_ENDIAN_LITTLE;211212case PIPE_CAP_MAX_VIEWPORTS:213return 1;214215case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:216return 2048;217218case PIPE_CAP_MAX_VARYINGS:219return 10;220221case PIPE_CAP_VENDOR_ID:222return 0x1002;223case PIPE_CAP_DEVICE_ID:224return r300screen->info.pci_id;225case PIPE_CAP_ACCELERATED:226return 1;227case PIPE_CAP_VIDEO_MEMORY:228return r300screen->info.vram_size >> 20;229case PIPE_CAP_UMA:230return 0;231case PIPE_CAP_PCI_GROUP:232return r300screen->info.pci_domain;233case PIPE_CAP_PCI_BUS:234return r300screen->info.pci_bus;235case PIPE_CAP_PCI_DEVICE:236return r300screen->info.pci_dev;237case PIPE_CAP_PCI_FUNCTION:238return r300screen->info.pci_func;239default:240return u_pipe_screen_get_param_defaults(pscreen, param);241}242}243244static int r300_get_shader_param(struct pipe_screen *pscreen,245enum pipe_shader_type shader,246enum pipe_shader_cap param)247{248struct r300_screen* r300screen = r300_screen(pscreen);249boolean is_r400 = r300screen->caps.is_r400;250boolean is_r500 = r300screen->caps.is_r500;251252switch (shader) {253case PIPE_SHADER_FRAGMENT:254switch (param)255{256case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:257return is_r500 || is_r400 ? 512 : 96;258case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:259return is_r500 || is_r400 ? 512 : 64;260case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:261return is_r500 || is_r400 ? 512 : 32;262case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:263return is_r500 ? 511 : 4;264case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:265return is_r500 ? 64 : 0; /* Actually unlimited on r500. */266/* Fragment shader limits. */267case PIPE_SHADER_CAP_MAX_INPUTS:268/* 2 colors + 8 texcoords are always supported269* (minus fog and wpos).270*271* R500 has the ability to turn 3rd and 4th color into272* additional texcoords but there is no two-sided color273* selection then. However the facing bit can be used instead. */274return 10;275case PIPE_SHADER_CAP_MAX_OUTPUTS:276return 4;277case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:278return (is_r500 ? 256 : 32) * sizeof(float[4]);279case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:280case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:281return 1;282case PIPE_SHADER_CAP_MAX_TEMPS:283return is_r500 ? 128 : is_r400 ? 64 : 32;284case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:285case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:286return r300screen->caps.num_tex_units;287case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:288case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:289case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:290case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:291case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:292case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:293case PIPE_SHADER_CAP_SUBROUTINES:294case PIPE_SHADER_CAP_INTEGERS:295case PIPE_SHADER_CAP_INT64_ATOMICS:296case PIPE_SHADER_CAP_FP16:297case PIPE_SHADER_CAP_FP16_DERIVATIVES:298case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:299case PIPE_SHADER_CAP_INT16:300case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:301case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:302case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:303case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:304case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:305case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:306case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:307case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:308case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:309case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:310case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:311return 0;312case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:313return 32;314case PIPE_SHADER_CAP_PREFERRED_IR:315return PIPE_SHADER_IR_TGSI;316case PIPE_SHADER_CAP_SUPPORTED_IRS:317return 1 << PIPE_SHADER_IR_TGSI;318}319break;320case PIPE_SHADER_VERTEX:321switch (param)322{323case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:324case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:325case PIPE_SHADER_CAP_SUBROUTINES:326return 0;327default:;328}329330if (!r300screen->caps.has_tcl) {331switch (param) {332case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:333case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:334return 0;335default:336return draw_get_shader_param(shader, param);337}338}339340switch (param)341{342case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:343case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:344return is_r500 ? 1024 : 256;345case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:346return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */347case PIPE_SHADER_CAP_MAX_INPUTS:348return 16;349case PIPE_SHADER_CAP_MAX_OUTPUTS:350return 10;351case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:352return 256 * sizeof(float[4]);353case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:354return 1;355case PIPE_SHADER_CAP_MAX_TEMPS:356return 32;357case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:358case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:359return 1;360case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:361case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:362case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:363case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:364case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:365case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:366case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:367case PIPE_SHADER_CAP_SUBROUTINES:368case PIPE_SHADER_CAP_INTEGERS:369case PIPE_SHADER_CAP_FP16:370case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:371case PIPE_SHADER_CAP_FP16_DERIVATIVES:372case PIPE_SHADER_CAP_INT16:373case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:374case PIPE_SHADER_CAP_INT64_ATOMICS:375case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:376case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:377case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:378case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:379case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:380case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:381case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:382case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:383case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:384case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:385case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:386case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:387return 0;388case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:389return 32;390case PIPE_SHADER_CAP_PREFERRED_IR:391return PIPE_SHADER_IR_TGSI;392case PIPE_SHADER_CAP_SUPPORTED_IRS:393return 1 << PIPE_SHADER_IR_TGSI;394}395break;396default:397; /* nothing */398}399return 0;400}401402static float r300_get_paramf(struct pipe_screen* pscreen,403enum pipe_capf param)404{405struct r300_screen* r300screen = r300_screen(pscreen);406407switch (param) {408case PIPE_CAPF_MAX_LINE_WIDTH:409case PIPE_CAPF_MAX_LINE_WIDTH_AA:410case PIPE_CAPF_MAX_POINT_WIDTH:411case PIPE_CAPF_MAX_POINT_WIDTH_AA:412/* The maximum dimensions of the colorbuffer are our practical413* rendering limits. 2048 pixels should be enough for anybody. */414if (r300screen->caps.is_r500) {415return 4096.0f;416} else if (r300screen->caps.is_r400) {417return 4021.0f;418} else {419return 2560.0f;420}421case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:422return 16.0f;423case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:424return 16.0f;425case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:426case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:427case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:428return 0.0f;429default:430debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",431param);432return 0.0f;433}434}435436static int r300_get_video_param(struct pipe_screen *screen,437enum pipe_video_profile profile,438enum pipe_video_entrypoint entrypoint,439enum pipe_video_cap param)440{441switch (param) {442case PIPE_VIDEO_CAP_SUPPORTED:443return vl_profile_supported(screen, profile, entrypoint);444case PIPE_VIDEO_CAP_NPOT_TEXTURES:445return 0;446case PIPE_VIDEO_CAP_MAX_WIDTH:447case PIPE_VIDEO_CAP_MAX_HEIGHT:448return vl_video_buffer_max_size(screen);449case PIPE_VIDEO_CAP_PREFERED_FORMAT:450return PIPE_FORMAT_NV12;451case PIPE_VIDEO_CAP_PREFERS_INTERLACED:452return false;453case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:454return false;455case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:456return true;457case PIPE_VIDEO_CAP_MAX_LEVEL:458return vl_level_supported(screen, profile);459default:460return 0;461}462}463464/**465* Whether the format matches:466* PIPE_FORMAT_?10?10?10?2_UNORM467*/468static inline boolean469util_format_is_rgba1010102_variant(const struct util_format_description *desc)470{471static const unsigned size[4] = {10, 10, 10, 2};472unsigned chan;473474if (desc->block.width != 1 ||475desc->block.height != 1 ||476desc->block.bits != 32)477return FALSE;478479for (chan = 0; chan < 4; ++chan) {480if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&481desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)482return FALSE;483if (desc->channel[chan].size != size[chan])484return FALSE;485}486487return TRUE;488}489490static bool r300_is_blending_supported(struct r300_screen *rscreen,491enum pipe_format format)492{493int c;494const struct util_format_description *desc =495util_format_description(format);496497if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)498return false;499500c = util_format_get_first_non_void_channel(format);501502/* RGBA16F */503if (rscreen->caps.is_r500 &&504desc->nr_channels == 4 &&505desc->channel[c].size == 16 &&506desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)507return true;508509if (desc->channel[c].normalized &&510desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&511desc->channel[c].size >= 4 &&512desc->channel[c].size <= 10) {513/* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */514if (desc->nr_channels >= 3)515return true;516517if (format == PIPE_FORMAT_R8G8_UNORM)518return true;519520/* R8, I8, L8, A8 */521if (desc->nr_channels == 1)522return true;523}524525return false;526}527528static bool r300_is_format_supported(struct pipe_screen* screen,529enum pipe_format format,530enum pipe_texture_target target,531unsigned sample_count,532unsigned storage_sample_count,533unsigned usage)534{535uint32_t retval = 0;536boolean is_r500 = r300_screen(screen)->caps.is_r500;537boolean is_r400 = r300_screen(screen)->caps.is_r400;538boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||539format == PIPE_FORMAT_R10G10B10X2_SNORM ||540format == PIPE_FORMAT_B10G10R10A2_UNORM ||541format == PIPE_FORMAT_B10G10R10X2_UNORM ||542format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;543boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||544format == PIPE_FORMAT_RGTC1_SNORM ||545format == PIPE_FORMAT_LATC1_UNORM ||546format == PIPE_FORMAT_LATC1_SNORM;547boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||548format == PIPE_FORMAT_RGTC2_SNORM ||549format == PIPE_FORMAT_LATC2_UNORM ||550format == PIPE_FORMAT_LATC2_SNORM;551boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||552format == PIPE_FORMAT_R16G16_FLOAT ||553format == PIPE_FORMAT_R16G16B16_FLOAT ||554format == PIPE_FORMAT_R16G16B16A16_FLOAT ||555format == PIPE_FORMAT_R16G16B16X16_FLOAT;556const struct util_format_description *desc;557558if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))559return false;560561/* Check multisampling support. */562switch (sample_count) {563case 0:564case 1:565break;566case 2:567case 4:568case 6:569/* No texturing and scanout. */570if (usage & (PIPE_BIND_SAMPLER_VIEW |571PIPE_BIND_DISPLAY_TARGET |572PIPE_BIND_SCANOUT)) {573return false;574}575576desc = util_format_description(format);577578if (is_r500) {579/* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */580if (!util_format_is_depth_or_stencil(format) &&581!util_format_is_rgba8_variant(desc) &&582!util_format_is_rgba1010102_variant(desc) &&583format != PIPE_FORMAT_R16G16B16A16_FLOAT &&584format != PIPE_FORMAT_R16G16B16X16_FLOAT) {585return false;586}587} else {588/* Only allow depth/stencil, RGBA8. */589if (!util_format_is_depth_or_stencil(format) &&590!util_format_is_rgba8_variant(desc)) {591return false;592}593}594break;595default:596return false;597}598599/* Check sampler format support. */600if ((usage & PIPE_BIND_SAMPLER_VIEW) &&601/* these two are broken for an unknown reason */602format != PIPE_FORMAT_R8G8B8X8_SNORM &&603format != PIPE_FORMAT_R16G16B16X16_SNORM &&604/* ATI1N is r5xx-only. */605(is_r500 || !is_ati1n) &&606/* ATI2N is supported on r4xx-r5xx. */607(is_r400 || is_r500 || !is_ati2n) &&608r300_is_sampler_format_supported(format)) {609retval |= PIPE_BIND_SAMPLER_VIEW;610}611612/* Check colorbuffer format support. */613if ((usage & (PIPE_BIND_RENDER_TARGET |614PIPE_BIND_DISPLAY_TARGET |615PIPE_BIND_SCANOUT |616PIPE_BIND_SHARED |617PIPE_BIND_BLENDABLE)) &&618/* 2101010 cannot be rendered to on non-r5xx. */619(!is_color2101010 || is_r500) &&620r300_is_colorbuffer_format_supported(format)) {621retval |= usage &622(PIPE_BIND_RENDER_TARGET |623PIPE_BIND_DISPLAY_TARGET |624PIPE_BIND_SCANOUT |625PIPE_BIND_SHARED);626627if (r300_is_blending_supported(r300_screen(screen), format)) {628retval |= usage & PIPE_BIND_BLENDABLE;629}630}631632/* Check depth-stencil format support. */633if (usage & PIPE_BIND_DEPTH_STENCIL &&634r300_is_zs_format_supported(format)) {635retval |= PIPE_BIND_DEPTH_STENCIL;636}637638/* Check vertex buffer format support. */639if (usage & PIPE_BIND_VERTEX_BUFFER) {640if (r300_screen(screen)->caps.has_tcl) {641/* Half float is supported on >= R400. */642if ((is_r400 || is_r500 || !is_half_float) &&643r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {644retval |= PIPE_BIND_VERTEX_BUFFER;645}646} else {647/* SW TCL */648if (!util_format_is_pure_integer(format)) {649retval |= PIPE_BIND_VERTEX_BUFFER;650}651}652}653654if (usage & PIPE_BIND_INDEX_BUFFER) {655if (format == PIPE_FORMAT_R8_UINT ||656format == PIPE_FORMAT_R16_UINT ||657format == PIPE_FORMAT_R32_UINT)658retval |= PIPE_BIND_INDEX_BUFFER;659}660661return retval == usage;662}663664static void r300_destroy_screen(struct pipe_screen* pscreen)665{666struct r300_screen* r300screen = r300_screen(pscreen);667struct radeon_winsys *rws = radeon_winsys(pscreen);668669if (rws && !rws->unref(rws))670return;671672mtx_destroy(&r300screen->cmask_mutex);673slab_destroy_parent(&r300screen->pool_transfers);674675disk_cache_destroy(r300screen->disk_shader_cache);676677if (rws)678rws->destroy(rws);679680FREE(r300screen);681}682683static void r300_fence_reference(struct pipe_screen *screen,684struct pipe_fence_handle **ptr,685struct pipe_fence_handle *fence)686{687struct radeon_winsys *rws = r300_screen(screen)->rws;688689rws->fence_reference(ptr, fence);690}691692static bool r300_fence_finish(struct pipe_screen *screen,693struct pipe_context *ctx,694struct pipe_fence_handle *fence,695uint64_t timeout)696{697struct radeon_winsys *rws = r300_screen(screen)->rws;698699return rws->fence_wait(rws, fence, timeout);700}701702struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,703const struct pipe_screen_config *config)704{705struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);706707if (!r300screen) {708FREE(r300screen);709return NULL;710}711712rws->query_info(rws, &r300screen->info, false, false);713714r300_init_debug(r300screen);715r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);716717if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))718r300screen->caps.zmask_ram = 0;719if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))720r300screen->caps.hiz_ram = 0;721722r300screen->rws = rws;723r300screen->screen.destroy = r300_destroy_screen;724r300screen->screen.get_name = r300_get_name;725r300screen->screen.get_vendor = r300_get_vendor;726r300screen->screen.get_device_vendor = r300_get_device_vendor;727r300screen->screen.get_disk_shader_cache = r300_get_disk_shader_cache;728r300screen->screen.get_param = r300_get_param;729r300screen->screen.get_shader_param = r300_get_shader_param;730r300screen->screen.get_paramf = r300_get_paramf;731r300screen->screen.get_video_param = r300_get_video_param;732r300screen->screen.is_format_supported = r300_is_format_supported;733r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;734r300screen->screen.context_create = r300_create_context;735r300screen->screen.fence_reference = r300_fence_reference;736r300screen->screen.fence_finish = r300_fence_finish;737738r300_init_screen_resource_functions(r300screen);739740r300_disk_cache_create(r300screen);741742slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);743744(void) mtx_init(&r300screen->cmask_mutex, mtx_plain);745746return &r300screen->screen;747}748749750