Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/r600/eg_asm.c
4570 views
1
/*
2
* Copyright 2010 Jerome Glisse <[email protected]>
3
*
4
* Permission is hereby granted, free of charge, to any person obtaining a
5
* copy of this software and associated documentation files (the "Software"),
6
* to deal in the Software without restriction, including without limitation
7
* on the rights to use, copy, modify, merge, publish, distribute, sub
8
* license, and/or sell copies of the Software, and to permit persons to whom
9
* the Software is furnished to do so, subject to the following conditions:
10
*
11
* The above copyright notice and this permission notice (including the next
12
* paragraph) shall be included in all copies or substantial portions of the
13
* Software.
14
*
15
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21
* USE OR OTHER DEALINGS IN THE SOFTWARE.
22
*/
23
#include "r600_pipe.h"
24
#include "r600_opcodes.h"
25
#include "r600_shader.h"
26
27
#include "util/u_memory.h"
28
#include "eg_sq.h"
29
#include <errno.h>
30
31
int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf)
32
{
33
unsigned id = cf->id;
34
35
if (cf->op == CF_NATIVE) {
36
bc->bytecode[id++] = cf->isa[0];
37
bc->bytecode[id++] = cf->isa[1];
38
} else {
39
const struct cf_op_info *cfop = r600_isa_cf(cf->op);
40
unsigned opcode = r600_isa_cf_opcode(bc->isa->hw_class, cf->op);
41
if (cfop->flags & CF_ALU) { /* ALU clauses */
42
43
/* prepend ALU_EXTENDED if we need more than 2 kcache sets */
44
if (cf->eg_alu_extended) {
45
bc->bytecode[id++] =
46
S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE0(cf->kcache[0].index_mode) |
47
S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE1(cf->kcache[1].index_mode) |
48
S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE2(cf->kcache[2].index_mode) |
49
S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE3(cf->kcache[3].index_mode) |
50
S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2(cf->kcache[2].bank) |
51
S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3(cf->kcache[3].bank) |
52
S_SQ_CF_ALU_WORD0_EXT_KCACHE_MODE2(cf->kcache[2].mode);
53
bc->bytecode[id++] =
54
S_SQ_CF_ALU_WORD1_EXT_CF_INST(
55
r600_isa_cf_opcode(bc->isa->hw_class, CF_OP_ALU_EXT)) |
56
S_SQ_CF_ALU_WORD1_EXT_KCACHE_MODE3(cf->kcache[3].mode) |
57
S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR2(cf->kcache[2].addr) |
58
S_SQ_CF_ALU_WORD1_EXT_KCACHE_ADDR3(cf->kcache[3].addr) |
59
S_SQ_CF_ALU_WORD1_EXT_BARRIER(1);
60
}
61
bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
62
S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
63
S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
64
S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
65
bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(opcode) |
66
S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
67
S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
68
S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
69
S_SQ_CF_ALU_WORD1_BARRIER(1) |
70
S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
71
} else if (cfop->flags & CF_CLAUSE) {
72
/* CF_TEX/VTX (CF_ALU already handled above) */
73
bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->addr >> 1);
74
bc->bytecode[id] = S_SQ_CF_WORD1_CF_INST(opcode) |
75
S_SQ_CF_WORD1_BARRIER(1) |
76
S_SQ_CF_WORD1_VALID_PIXEL_MODE(cf->vpm) |
77
S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1);
78
if (bc->chip_class == EVERGREEN) /* no EOP on cayman */
79
bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
80
id++;
81
} else if (cfop->flags & CF_EXP) {
82
/* EXPORT instructions */
83
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
84
S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
85
S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
86
S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) |
87
S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr);
88
bc->bytecode[id] =
89
S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
90
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(cf->output.swizzle_x) |
91
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(cf->output.swizzle_y) |
92
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) |
93
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) |
94
S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
95
S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->mark) |
96
S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode);
97
98
if (bc->chip_class == EVERGREEN) /* no EOP on cayman */
99
bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
100
id++;
101
} else if (cfop->flags & CF_RAT) {
102
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_ID(cf->rat.id) |
103
S_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INST(cf->rat.inst) |
104
S_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INDEX_MODE(cf->rat.index_mode) |
105
S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
106
S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
107
S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) |
108
S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr);
109
bc->bytecode[id] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
110
S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
111
S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->mark) |
112
S_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE(cf->vpm) |
113
S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) |
114
S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask) |
115
S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size) |
116
S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->output.mark);
117
if (bc->chip_class == EVERGREEN) /* no EOP on cayman */
118
bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
119
id++;
120
121
} else if (cfop->flags & CF_MEM) {
122
/* MEM_STREAM, MEM_RING instructions */
123
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
124
S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
125
S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
126
S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) |
127
S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr);
128
bc->bytecode[id] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
129
S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
130
S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->mark) |
131
S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) |
132
S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask) |
133
S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size);
134
if (bc->chip_class == EVERGREEN) /* no EOP on cayman */
135
bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
136
id++;
137
} else {
138
/* other instructions */
139
bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1);
140
bc->bytecode[id] = S_SQ_CF_WORD1_CF_INST(opcode) |
141
S_SQ_CF_WORD1_VALID_PIXEL_MODE(cf->vpm) |
142
S_SQ_CF_WORD1_BARRIER(1) |
143
S_SQ_CF_WORD1_COND(cf->cond) |
144
S_SQ_CF_WORD1_POP_COUNT(cf->pop_count) |
145
S_SQ_CF_WORD1_COUNT(cf->count);
146
if (bc->chip_class == EVERGREEN) /* no EOP on cayman */
147
bc->bytecode[id] |= S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
148
id++;
149
}
150
}
151
return 0;
152
}
153
154
#if 0
155
void eg_bytecode_export_read(struct r600_bytecode *bc,
156
struct r600_bytecode_output *output, uint32_t word0, uint32_t word1)
157
{
158
output->array_base = G_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(word0);
159
output->type = G_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(word0);
160
output->gpr = G_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(word0);
161
output->elem_size = G_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(word0);
162
163
output->swizzle_x = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(word1);
164
output->swizzle_y = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(word1);
165
output->swizzle_z = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(word1);
166
output->swizzle_w = G_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(word1);
167
output->burst_count = G_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(word1);
168
output->end_of_program = G_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(word1);
169
output->op = r600_isa_cf_by_opcode(bc->isa,
170
G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(word1), /* is_cf_alu = */ 0 );
171
output->barrier = G_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(word1);
172
output->array_size = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(word1);
173
output->comp_mask = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(word1);
174
}
175
#endif
176
177
int egcm_load_index_reg(struct r600_bytecode *bc, unsigned id, bool inside_alu_clause)
178
{
179
struct r600_bytecode_alu alu;
180
int r;
181
unsigned type;
182
183
assert(id < 2);
184
assert(bc->chip_class >= EVERGREEN);
185
186
if (bc->index_loaded[id])
187
return 0;
188
189
memset(&alu, 0, sizeof(alu));
190
alu.op = ALU_OP1_MOVA_INT;
191
alu.src[0].sel = bc->index_reg[id];
192
alu.src[0].chan = bc->index_reg_chan[id];
193
if (bc->chip_class == CAYMAN)
194
alu.dst.sel = id == 0 ? CM_V_SQ_MOVA_DST_CF_IDX0 : CM_V_SQ_MOVA_DST_CF_IDX1;
195
196
alu.last = 1;
197
r = r600_bytecode_add_alu(bc, &alu);
198
if (r)
199
return r;
200
201
bc->ar_loaded = 0; /* clobbered */
202
203
if (bc->chip_class == EVERGREEN) {
204
memset(&alu, 0, sizeof(alu));
205
alu.op = id == 0 ? ALU_OP0_SET_CF_IDX0 : ALU_OP0_SET_CF_IDX1;
206
alu.last = 1;
207
r = r600_bytecode_add_alu(bc, &alu);
208
if (r)
209
return r;
210
}
211
212
/* Must split ALU group as index only applies to following group */
213
if (inside_alu_clause) {
214
type = bc->cf_last->op;
215
if ((r = r600_bytecode_add_cf(bc))) {
216
return r;
217
}
218
bc->cf_last->op = type;
219
}
220
221
bc->index_loaded[id] = 1;
222
223
return 0;
224
}
225
226
int eg_bytecode_gds_build(struct r600_bytecode *bc, struct r600_bytecode_gds *gds, unsigned id)
227
{
228
unsigned gds_op = (r600_isa_fetch_opcode(bc->isa->hw_class, gds->op) >> 8) & 0x3f;
229
unsigned opcode;
230
if (gds->op == FETCH_OP_TF_WRITE) {
231
opcode = 5;
232
gds_op = 0;
233
} else
234
opcode = 4;
235
bc->bytecode[id++] = S_SQ_MEM_GDS_WORD0_MEM_INST(2) |
236
S_SQ_MEM_GDS_WORD0_MEM_OP(opcode) |
237
S_SQ_MEM_GDS_WORD0_SRC_GPR(gds->src_gpr) |
238
S_SQ_MEM_GDS_WORD0_SRC_REL(gds->src_rel) |
239
S_SQ_MEM_GDS_WORD0_SRC_SEL_X(gds->src_sel_x) |
240
S_SQ_MEM_GDS_WORD0_SRC_SEL_Y(gds->src_sel_y) |
241
S_SQ_MEM_GDS_WORD0_SRC_SEL_Z(gds->src_sel_z);
242
243
bc->bytecode[id++] = S_SQ_MEM_GDS_WORD1_DST_GPR(gds->dst_gpr) |
244
S_SQ_MEM_GDS_WORD1_DST_REL(gds->dst_rel) |
245
S_SQ_MEM_GDS_WORD1_GDS_OP(gds_op) |
246
S_SQ_MEM_GDS_WORD1_SRC_GPR(gds->src_gpr2) |
247
S_SQ_MEM_GDS_WORD1_UAV_INDEX_MODE(gds->uav_index_mode) |
248
S_SQ_MEM_GDS_WORD1_UAV_ID(gds->uav_id) |
249
S_SQ_MEM_GDS_WORD1_ALLOC_CONSUME(gds->alloc_consume) |
250
S_SQ_MEM_GDS_WORD1_BCAST_FIRST_REQ(gds->bcast_first_req);
251
252
bc->bytecode[id++] = S_SQ_MEM_GDS_WORD2_DST_SEL_X(gds->dst_sel_x) |
253
S_SQ_MEM_GDS_WORD2_DST_SEL_Y(gds->dst_sel_y) |
254
S_SQ_MEM_GDS_WORD2_DST_SEL_Z(gds->dst_sel_z) |
255
S_SQ_MEM_GDS_WORD2_DST_SEL_W(gds->dst_sel_w);
256
return 0;
257
}
258
259
int eg_bytecode_alu_build(struct r600_bytecode *bc, struct r600_bytecode_alu *alu, unsigned id)
260
{
261
if (alu->is_lds_idx_op) {
262
assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs);
263
assert(!alu->src[0].neg && !alu->src[1].neg && !alu->src[2].neg);
264
bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
265
S_SQ_ALU_WORD0_SRC0_REL(alu->src[0].rel) |
266
S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
267
S_SQ_ALU_WORD0_LDS_IDX_OP_IDX_OFFSET_4(alu->lds_idx >> 4) |
268
S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
269
S_SQ_ALU_WORD0_SRC1_REL(alu->src[1].rel) |
270
S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
271
S_SQ_ALU_WORD0_LDS_IDX_OP_IDX_OFFSET_5(alu->lds_idx >> 5) |
272
S_SQ_ALU_WORD0_INDEX_MODE(alu->index_mode) |
273
S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) |
274
S_SQ_ALU_WORD0_LAST(alu->last);
275
} else {
276
bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
277
S_SQ_ALU_WORD0_SRC0_REL(alu->src[0].rel) |
278
S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
279
S_SQ_ALU_WORD0_SRC0_NEG(alu->src[0].neg) |
280
S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
281
S_SQ_ALU_WORD0_SRC1_REL(alu->src[1].rel) |
282
S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
283
S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) |
284
S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) |
285
S_SQ_ALU_WORD0_LAST(alu->last);
286
}
287
288
/* don't replace gpr by pv or ps for destination register */
289
if (alu->is_lds_idx_op) {
290
unsigned lds_op = r600_isa_alu_opcode(bc->isa->hw_class, alu->op);
291
bc->bytecode[id++] =
292
S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) |
293
S_SQ_ALU_WORD1_OP3_SRC2_REL(alu->src[2].rel) |
294
S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) |
295
S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_1(alu->lds_idx >> 1) |
296
297
S_SQ_ALU_WORD1_OP3_ALU_INST(lds_op & 0xff) |
298
S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) |
299
S_SQ_ALU_WORD1_LDS_IDX_OP_LDS_OP((lds_op >> 8) & 0xff) |
300
S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_0(alu->lds_idx) |
301
S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_2(alu->lds_idx >> 2) |
302
S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
303
S_SQ_ALU_WORD1_LDS_IDX_OP_IDX_OFFSET_3(alu->lds_idx >> 3);
304
305
} else if (alu->is_op3) {
306
assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs);
307
bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
308
S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
309
S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
310
S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
311
S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) |
312
S_SQ_ALU_WORD1_OP3_SRC2_REL(alu->src[2].rel) |
313
S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) |
314
S_SQ_ALU_WORD1_OP3_SRC2_NEG(alu->src[2].neg) |
315
S_SQ_ALU_WORD1_OP3_ALU_INST(r600_isa_alu_opcode(bc->isa->hw_class, alu->op)) |
316
S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle);
317
} else {
318
bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
319
S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
320
S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
321
S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
322
S_SQ_ALU_WORD1_OP2_SRC0_ABS(alu->src[0].abs) |
323
S_SQ_ALU_WORD1_OP2_SRC1_ABS(alu->src[1].abs) |
324
S_SQ_ALU_WORD1_OP2_WRITE_MASK(alu->dst.write) |
325
S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) |
326
S_SQ_ALU_WORD1_OP2_ALU_INST(r600_isa_alu_opcode(bc->isa->hw_class, alu->op)) |
327
S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) |
328
S_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(alu->execute_mask) |
329
S_SQ_ALU_WORD1_OP2_UPDATE_PRED(alu->update_pred);
330
}
331
return 0;
332
}
333
334