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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/r600/r600_asm.h
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/*
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* Copyright 2010 Jerome Glisse <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef R600_ASM_H
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#define R600_ASM_H
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#include "r600_pipe.h"
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#include "r600_isa.h"
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#include "tgsi/tgsi_exec.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct r600_bytecode_alu_src {
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unsigned sel;
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unsigned chan;
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unsigned neg;
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unsigned abs;
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unsigned rel;
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unsigned kc_bank;
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unsigned kc_rel;
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uint32_t value;
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};
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struct r600_bytecode_alu_dst {
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unsigned sel;
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unsigned chan;
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unsigned clamp;
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unsigned write;
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unsigned rel;
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};
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struct r600_bytecode_alu {
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struct list_head list;
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struct r600_bytecode_alu_src src[3];
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struct r600_bytecode_alu_dst dst;
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unsigned op;
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unsigned last;
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unsigned is_op3;
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unsigned is_lds_idx_op;
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unsigned execute_mask;
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unsigned update_pred;
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unsigned pred_sel;
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unsigned bank_swizzle;
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unsigned bank_swizzle_force;
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unsigned omod;
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unsigned index_mode;
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unsigned lds_idx;
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};
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struct r600_bytecode_tex {
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struct list_head list;
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unsigned op;
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unsigned inst_mod;
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unsigned resource_id;
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unsigned src_gpr;
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unsigned src_rel;
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unsigned dst_gpr;
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unsigned dst_rel;
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unsigned dst_sel_x;
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unsigned dst_sel_y;
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unsigned dst_sel_z;
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unsigned dst_sel_w;
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unsigned lod_bias;
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unsigned coord_type_x;
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unsigned coord_type_y;
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unsigned coord_type_z;
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unsigned coord_type_w;
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int offset_x;
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int offset_y;
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int offset_z;
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unsigned sampler_id;
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unsigned src_sel_x;
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unsigned src_sel_y;
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unsigned src_sel_z;
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unsigned src_sel_w;
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/* indexed samplers/resources only on evergreen/cayman */
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unsigned sampler_index_mode;
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unsigned resource_index_mode;
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};
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struct r600_bytecode_vtx {
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struct list_head list;
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unsigned op;
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unsigned fetch_type;
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unsigned buffer_id;
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unsigned src_gpr;
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unsigned src_sel_x;
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unsigned mega_fetch_count;
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unsigned dst_gpr;
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unsigned dst_sel_x;
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unsigned dst_sel_y;
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unsigned dst_sel_z;
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unsigned dst_sel_w;
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unsigned use_const_fields;
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unsigned data_format;
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unsigned num_format_all;
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unsigned format_comp_all;
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unsigned srf_mode_all;
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unsigned offset;
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unsigned endian;
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unsigned buffer_index_mode;
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// READ_SCRATCH fields
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unsigned uncached;
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unsigned indexed;
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unsigned src_sel_y;
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unsigned src_rel;
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unsigned elem_size;
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unsigned array_size;
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unsigned array_base;
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unsigned burst_count;
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unsigned dst_rel;
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};
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struct r600_bytecode_gds {
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struct list_head list;
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unsigned op;
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unsigned src_gpr;
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unsigned src_rel;
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unsigned src_sel_x;
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unsigned src_sel_y;
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unsigned src_sel_z;
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unsigned src_gpr2;
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unsigned dst_gpr;
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unsigned dst_rel;
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unsigned dst_sel_x;
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unsigned dst_sel_y;
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unsigned dst_sel_z;
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unsigned dst_sel_w;
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unsigned uav_index_mode;
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unsigned uav_id;
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unsigned alloc_consume;
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unsigned bcast_first_req;
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};
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struct r600_bytecode_output {
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unsigned array_base;
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unsigned array_size;
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unsigned comp_mask;
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unsigned type;
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unsigned op;
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unsigned elem_size;
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unsigned gpr;
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unsigned swizzle_x;
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unsigned swizzle_y;
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unsigned swizzle_z;
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unsigned swizzle_w;
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unsigned burst_count;
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unsigned index_gpr;
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unsigned mark; /* used by MEM_SCRATCH */
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};
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struct r600_bytecode_rat {
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unsigned id;
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unsigned inst;
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unsigned index_mode;
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};
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struct r600_bytecode_kcache {
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unsigned bank;
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unsigned mode;
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unsigned addr;
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unsigned index_mode;
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};
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struct r600_bytecode_cf {
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struct list_head list;
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unsigned op;
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unsigned addr;
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unsigned ndw;
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unsigned id;
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unsigned cond;
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unsigned pop_count;
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unsigned count;
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unsigned cf_addr; /* control flow addr */
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struct r600_bytecode_kcache kcache[4];
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unsigned r6xx_uses_waterfall;
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unsigned eg_alu_extended;
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unsigned barrier;
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unsigned end_of_program;
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unsigned mark;
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unsigned vpm;
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struct list_head alu;
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struct list_head tex;
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struct list_head vtx;
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struct list_head gds;
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struct r600_bytecode_output output;
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struct r600_bytecode_rat rat;
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struct r600_bytecode_alu *curr_bs_head;
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struct r600_bytecode_alu *prev_bs_head;
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struct r600_bytecode_alu *prev2_bs_head;
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unsigned isa[2];
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unsigned nlds_read;
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unsigned nqueue_read;
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};
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#define FC_NONE 0
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#define FC_IF 1
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#define FC_LOOP 2
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#define FC_REP 3
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#define FC_PUSH_VPM 4
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#define FC_PUSH_WQM 5
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struct r600_cf_stack_entry {
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int type;
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struct r600_bytecode_cf *start;
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struct r600_bytecode_cf **mid; /* used to store the else point */
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int num_mid;
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};
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#define SQ_MAX_CALL_DEPTH 0x00000020
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#define AR_HANDLE_NORMAL 0
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#define AR_HANDLE_RV6XX 1 /* except RV670 */
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struct r600_stack_info {
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/* current level of non-WQM PUSH operations
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* (PUSH, PUSH_ELSE, ALU_PUSH_BEFORE) */
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int push;
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/* current level of WQM PUSH operations
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* (PUSH, PUSH_ELSE, PUSH_WQM) */
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int push_wqm;
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/* current loop level */
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int loop;
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/* required depth */
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int max_entries;
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/* subentries per entry */
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int entry_size;
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};
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struct r600_bytecode {
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enum chip_class chip_class;
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enum radeon_family family;
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bool has_compressed_msaa_texturing;
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int type;
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struct list_head cf;
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struct r600_bytecode_cf *cf_last;
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unsigned ndw;
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unsigned ncf;
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unsigned ngpr;
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unsigned nstack;
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unsigned nlds_dw;
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unsigned nresource;
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unsigned force_add_cf;
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uint32_t *bytecode;
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uint32_t fc_sp;
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struct r600_cf_stack_entry fc_stack[TGSI_EXEC_MAX_NESTING];
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struct r600_stack_info stack;
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unsigned ar_loaded;
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unsigned ar_reg;
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unsigned ar_chan;
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unsigned ar_handling;
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unsigned r6xx_nop_after_rel_dst;
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bool index_loaded[2];
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unsigned index_reg[2]; /* indexing register CF_INDEX_[01] */
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unsigned index_reg_chan[2]; /* indexing register chanel CF_INDEX_[01] */
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unsigned debug_id;
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struct r600_isa* isa;
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struct r600_bytecode_output pending_outputs[5];
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int n_pending_outputs;
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boolean need_wait_ack; /* emit a pending WAIT_ACK prior to control flow */
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boolean precise;
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};
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/* eg_asm.c */
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int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf);
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int egcm_load_index_reg(struct r600_bytecode *bc, unsigned id, bool inside_alu_clause);
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int eg_bytecode_gds_build(struct r600_bytecode *bc, struct r600_bytecode_gds *gds, unsigned id);
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int eg_bytecode_alu_build(struct r600_bytecode *bc,
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struct r600_bytecode_alu *alu, unsigned id);
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/* r600_asm.c */
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void r600_bytecode_init(struct r600_bytecode *bc,
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enum chip_class chip_class,
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enum radeon_family family,
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bool has_compressed_msaa_texturing);
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void r600_bytecode_clear(struct r600_bytecode *bc);
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int r600_bytecode_add_alu(struct r600_bytecode *bc,
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const struct r600_bytecode_alu *alu);
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int r600_bytecode_add_vtx(struct r600_bytecode *bc,
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const struct r600_bytecode_vtx *vtx);
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int r600_bytecode_add_vtx_tc(struct r600_bytecode *bc,
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const struct r600_bytecode_vtx *vtx);
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int r600_bytecode_add_tex(struct r600_bytecode *bc,
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const struct r600_bytecode_tex *tex);
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int r600_bytecode_add_gds(struct r600_bytecode *bc,
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const struct r600_bytecode_gds *gds);
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int r600_bytecode_add_output(struct r600_bytecode *bc,
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const struct r600_bytecode_output *output);
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int r600_bytecode_add_pending_output(struct r600_bytecode *bc,
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const struct r600_bytecode_output *output);
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void r600_bytecode_need_wait_ack(struct r600_bytecode *bc, boolean needed);
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boolean r600_bytecode_get_need_wait_ack(struct r600_bytecode *bc);
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int r600_bytecode_build(struct r600_bytecode *bc);
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int r600_bytecode_add_cf(struct r600_bytecode *bc);
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int r600_bytecode_add_cfinst(struct r600_bytecode *bc,
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unsigned op);
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int r600_bytecode_add_alu_type(struct r600_bytecode *bc,
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const struct r600_bytecode_alu *alu, unsigned type);
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void r600_bytecode_special_constants(uint32_t value, unsigned *sel);
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void r600_bytecode_disasm(struct r600_bytecode *bc);
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void r600_bytecode_alu_read(struct r600_bytecode *bc,
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struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
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int cm_bytecode_add_cf_end(struct r600_bytecode *bc);
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void *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
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unsigned count,
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const struct pipe_vertex_element *elements);
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/* r700_asm.c */
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void r700_bytecode_cf_vtx_build(uint32_t *bytecode,
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const struct r600_bytecode_cf *cf);
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int r700_bytecode_alu_build(struct r600_bytecode *bc,
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struct r600_bytecode_alu *alu, unsigned id);
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void r700_bytecode_alu_read(struct r600_bytecode *bc,
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struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
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int r700_bytecode_fetch_mem_build(struct r600_bytecode *bc,
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struct r600_bytecode_vtx *mem, unsigned id);
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void r600_bytecode_export_read(struct r600_bytecode *bc,
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struct r600_bytecode_output *output, uint32_t word0, uint32_t word1);
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void eg_bytecode_export_read(struct r600_bytecode *bc,
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struct r600_bytecode_output *output, uint32_t word0, uint32_t word1);
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void r600_vertex_data_type(enum pipe_format pformat, unsigned *format,
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unsigned *num_format, unsigned *format_comp, unsigned *endian);
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static inline int fp64_switch(int i)
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{
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switch (i) {
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case 0:
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return 1;
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case 1:
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return 0;
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case 2:
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return 3;
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case 3:
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return 2;
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}
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return 0;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
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