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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/r600/r600_blit.c
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/*
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* Copyright 2010 Jerome Glisse <[email protected]>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "r600_pipe.h"
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#include "compute_memory_pool.h"
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#include "evergreen_compute.h"
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#include "util/u_surface.h"
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#include "util/format/u_format.h"
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#include "evergreend.h"
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enum r600_blitter_op /* bitmask */
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{
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R600_SAVE_FRAGMENT_STATE = 1,
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R600_SAVE_TEXTURES = 2,
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R600_SAVE_FRAMEBUFFER = 4,
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R600_DISABLE_RENDER_COND = 8,
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R600_CLEAR = R600_SAVE_FRAGMENT_STATE,
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R600_CLEAR_SURFACE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER,
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R600_COPY_BUFFER = R600_DISABLE_RENDER_COND,
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R600_COPY_TEXTURE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES |
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R600_DISABLE_RENDER_COND,
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R600_BLIT = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES,
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R600_DECOMPRESS = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND,
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R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER
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};
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static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op)
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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if (rctx->cmd_buf_is_compute) {
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rctx->b.gfx.flush(rctx, PIPE_FLUSH_ASYNC, NULL);
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rctx->cmd_buf_is_compute = false;
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}
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util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb);
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util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso);
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util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader);
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util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader);
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util_blitter_save_tessctrl_shader(rctx->blitter, rctx->tcs_shader);
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util_blitter_save_tesseval_shader(rctx->blitter, rctx->tes_shader);
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util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets,
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(struct pipe_stream_output_target**)rctx->b.streamout.targets);
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util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso);
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if (op & R600_SAVE_FRAGMENT_STATE) {
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util_blitter_save_viewport(rctx->blitter, &rctx->b.viewports.states[0]);
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util_blitter_save_scissor(rctx->blitter, &rctx->b.scissors.states[0]);
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util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader);
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util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso);
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util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso);
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util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref.pipe_state);
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util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask);
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}
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if (op & R600_SAVE_FRAMEBUFFER)
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util_blitter_save_framebuffer(rctx->blitter, &rctx->framebuffer.state);
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if (op & R600_SAVE_TEXTURES) {
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util_blitter_save_fragment_sampler_states(
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rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].states.enabled_mask),
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(void**)rctx->samplers[PIPE_SHADER_FRAGMENT].states.states);
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util_blitter_save_fragment_sampler_views(
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rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].views.enabled_mask),
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(struct pipe_sampler_view**)rctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
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}
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if (op & R600_DISABLE_RENDER_COND)
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rctx->b.render_cond_force_off = true;
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}
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static void r600_blitter_end(struct pipe_context *ctx)
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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rctx->b.render_cond_force_off = false;
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}
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static unsigned u_max_sample(struct pipe_resource *r)
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{
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return r->nr_samples ? r->nr_samples - 1 : 0;
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}
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static void r600_blit_decompress_depth(struct pipe_context *ctx,
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struct r600_texture *texture,
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struct r600_texture *staging,
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unsigned first_level, unsigned last_level,
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unsigned first_layer, unsigned last_layer,
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unsigned first_sample, unsigned last_sample)
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
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struct r600_texture *flushed_depth_texture = staging ?
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staging : texture->flushed_depth_texture;
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const struct util_format_description *desc =
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util_format_description(texture->resource.b.b.format);
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float depth;
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if (!staging && !texture->dirty_level_mask)
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return;
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max_sample = u_max_sample(&texture->resource.b.b);
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/* XXX Decompressing MSAA depth textures is broken on R6xx.
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* There is also a hardlock if CMASK and FMASK are not present.
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* Just skip this until we find out how to fix it. */
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if (rctx->b.chip_class == R600 && max_sample > 0) {
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texture->dirty_level_mask = 0;
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return;
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}
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if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 ||
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rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635)
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depth = 0.0f;
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else
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depth = 1.0f;
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/* Enable decompression in DB_RENDER_CONTROL */
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rctx->db_misc_state.flush_depthstencil_through_cb = true;
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rctx->db_misc_state.copy_depth = util_format_has_depth(desc);
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rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc);
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rctx->db_misc_state.copy_sample = first_sample;
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r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
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for (level = first_level; level <= last_level; level++) {
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if (!staging && !(texture->dirty_level_mask & (1 << level)))
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continue;
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/* The smaller the mipmap level, the less layers there are
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* as far as 3D textures are concerned. */
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max_layer = util_max_layer(&texture->resource.b.b, level);
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checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
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for (layer = first_layer; layer <= checked_last_layer; layer++) {
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for (sample = first_sample; sample <= last_sample; sample++) {
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struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
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if (sample != rctx->db_misc_state.copy_sample) {
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rctx->db_misc_state.copy_sample = sample;
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r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
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}
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surf_tmpl.format = texture->resource.b.b.format;
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surf_tmpl.u.tex.level = level;
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surf_tmpl.u.tex.first_layer = layer;
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surf_tmpl.u.tex.last_layer = layer;
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zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
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surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
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cbsurf = ctx->create_surface(ctx,
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&flushed_depth_texture->resource.b.b, &surf_tmpl);
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r600_blitter_begin(ctx, R600_DECOMPRESS);
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util_blitter_custom_depth_stencil(rctx->blitter, zsurf, cbsurf, 1 << sample,
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rctx->custom_dsa_flush, depth);
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r600_blitter_end(ctx);
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pipe_surface_reference(&zsurf, NULL);
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pipe_surface_reference(&cbsurf, NULL);
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}
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}
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/* The texture will always be dirty if some layers or samples aren't flushed.
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* I don't think this case occurs often though. */
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if (!staging &&
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first_layer == 0 && last_layer == max_layer &&
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first_sample == 0 && last_sample == max_sample) {
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texture->dirty_level_mask &= ~(1 << level);
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}
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}
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/* reenable compression in DB_RENDER_CONTROL */
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rctx->db_misc_state.flush_depthstencil_through_cb = false;
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r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
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}
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static void r600_blit_decompress_depth_in_place(struct r600_context *rctx,
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struct r600_texture *texture,
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bool is_stencil_sampler,
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unsigned first_level, unsigned last_level,
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unsigned first_layer, unsigned last_layer)
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{
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struct pipe_surface *zsurf, surf_tmpl = {{0}};
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unsigned layer, max_layer, checked_last_layer, level;
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unsigned *dirty_level_mask;
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/* Enable decompression in DB_RENDER_CONTROL */
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if (is_stencil_sampler) {
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rctx->db_misc_state.flush_stencil_inplace = true;
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dirty_level_mask = &texture->stencil_dirty_level_mask;
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} else {
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rctx->db_misc_state.flush_depth_inplace = true;
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dirty_level_mask = &texture->dirty_level_mask;
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}
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r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
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surf_tmpl.format = texture->resource.b.b.format;
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for (level = first_level; level <= last_level; level++) {
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if (!(*dirty_level_mask & (1 << level)))
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continue;
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surf_tmpl.u.tex.level = level;
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/* The smaller the mipmap level, the less layers there are
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* as far as 3D textures are concerned. */
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max_layer = util_max_layer(&texture->resource.b.b, level);
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checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
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for (layer = first_layer; layer <= checked_last_layer; layer++) {
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surf_tmpl.u.tex.first_layer = layer;
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surf_tmpl.u.tex.last_layer = layer;
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zsurf = rctx->b.b.create_surface(&rctx->b.b, &texture->resource.b.b, &surf_tmpl);
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r600_blitter_begin(&rctx->b.b, R600_DECOMPRESS);
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util_blitter_custom_depth_stencil(rctx->blitter, zsurf, NULL, ~0,
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rctx->custom_dsa_flush, 1.0f);
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r600_blitter_end(&rctx->b.b);
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249
pipe_surface_reference(&zsurf, NULL);
250
}
251
252
/* The texture will always be dirty if some layers or samples aren't flushed.
253
* I don't think this case occurs often though. */
254
if (first_layer == 0 && last_layer == max_layer) {
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*dirty_level_mask &= ~(1 << level);
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}
257
}
258
259
/* Disable decompression in DB_RENDER_CONTROL */
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rctx->db_misc_state.flush_depth_inplace = false;
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rctx->db_misc_state.flush_stencil_inplace = false;
262
r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
263
}
264
265
void r600_decompress_depth_textures(struct r600_context *rctx,
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struct r600_samplerview_state *textures)
267
{
268
unsigned i;
269
unsigned depth_texture_mask = textures->compressed_depthtex_mask;
270
271
while (depth_texture_mask) {
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struct pipe_sampler_view *view;
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struct r600_pipe_sampler_view *rview;
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struct r600_texture *tex;
275
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i = u_bit_scan(&depth_texture_mask);
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view = &textures->views[i]->base;
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assert(view);
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rview = (struct r600_pipe_sampler_view*)view;
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tex = (struct r600_texture *)view->texture;
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assert(tex->db_compatible);
284
285
if (r600_can_sample_zs(tex, rview->is_stencil_sampler)) {
286
r600_blit_decompress_depth_in_place(rctx, tex,
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rview->is_stencil_sampler,
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view->u.tex.first_level, view->u.tex.last_level,
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0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
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} else {
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r600_blit_decompress_depth(&rctx->b.b, tex, NULL,
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view->u.tex.first_level, view->u.tex.last_level,
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0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level),
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0, u_max_sample(&tex->resource.b.b));
295
}
296
}
297
}
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299
void r600_decompress_depth_images(struct r600_context *rctx,
300
struct r600_image_state *images)
301
{
302
unsigned i;
303
unsigned depth_texture_mask = images->compressed_depthtex_mask;
304
305
while (depth_texture_mask) {
306
struct r600_image_view *view;
307
struct r600_texture *tex;
308
309
i = u_bit_scan(&depth_texture_mask);
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311
view = &images->views[i];
312
assert(view);
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314
tex = (struct r600_texture *)view->base.resource;
315
assert(tex->db_compatible);
316
317
if (r600_can_sample_zs(tex, false)) {
318
r600_blit_decompress_depth_in_place(rctx, tex,
319
false,
320
view->base.u.tex.level,
321
view->base.u.tex.level,
322
0, util_max_layer(&tex->resource.b.b, view->base.u.tex.level));
323
} else {
324
r600_blit_decompress_depth(&rctx->b.b, tex, NULL,
325
view->base.u.tex.level,
326
view->base.u.tex.level,
327
0, util_max_layer(&tex->resource.b.b, view->base.u.tex.level),
328
0, u_max_sample(&tex->resource.b.b));
329
}
330
}
331
}
332
333
static void r600_blit_decompress_color(struct pipe_context *ctx,
334
struct r600_texture *rtex,
335
unsigned first_level, unsigned last_level,
336
unsigned first_layer, unsigned last_layer)
337
{
338
struct r600_context *rctx = (struct r600_context *)ctx;
339
unsigned layer, level, checked_last_layer, max_layer;
340
341
if (!rtex->dirty_level_mask)
342
return;
343
344
for (level = first_level; level <= last_level; level++) {
345
if (!(rtex->dirty_level_mask & (1 << level)))
346
continue;
347
348
/* The smaller the mipmap level, the less layers there are
349
* as far as 3D textures are concerned. */
350
max_layer = util_max_layer(&rtex->resource.b.b, level);
351
checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
352
353
for (layer = first_layer; layer <= checked_last_layer; layer++) {
354
struct pipe_surface *cbsurf, surf_tmpl;
355
356
surf_tmpl.format = rtex->resource.b.b.format;
357
surf_tmpl.u.tex.level = level;
358
surf_tmpl.u.tex.first_layer = layer;
359
surf_tmpl.u.tex.last_layer = layer;
360
cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
361
362
r600_blitter_begin(ctx, R600_DECOMPRESS);
363
util_blitter_custom_color(rctx->blitter, cbsurf,
364
rtex->fmask.size ? rctx->custom_blend_decompress : rctx->custom_blend_fastclear);
365
r600_blitter_end(ctx);
366
367
pipe_surface_reference(&cbsurf, NULL);
368
}
369
370
/* The texture will always be dirty if some layers aren't flushed.
371
* I don't think this case occurs often though. */
372
if (first_layer == 0 && last_layer == max_layer) {
373
rtex->dirty_level_mask &= ~(1 << level);
374
}
375
}
376
}
377
378
void r600_decompress_color_textures(struct r600_context *rctx,
379
struct r600_samplerview_state *textures)
380
{
381
unsigned i;
382
unsigned mask = textures->compressed_colortex_mask;
383
384
while (mask) {
385
struct pipe_sampler_view *view;
386
struct r600_texture *tex;
387
388
i = u_bit_scan(&mask);
389
390
view = &textures->views[i]->base;
391
assert(view);
392
393
tex = (struct r600_texture *)view->texture;
394
assert(tex->cmask.size);
395
396
r600_blit_decompress_color(&rctx->b.b, tex,
397
view->u.tex.first_level, view->u.tex.last_level,
398
0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
399
}
400
}
401
402
void r600_decompress_color_images(struct r600_context *rctx,
403
struct r600_image_state *images)
404
{
405
unsigned i;
406
unsigned mask = images->compressed_colortex_mask;
407
408
while (mask) {
409
struct r600_image_view *view;
410
struct r600_texture *tex;
411
412
i = u_bit_scan(&mask);
413
414
view = &images->views[i];
415
assert(view);
416
417
tex = (struct r600_texture *)view->base.resource;
418
assert(tex->cmask.size);
419
420
r600_blit_decompress_color(&rctx->b.b, tex,
421
view->base.u.tex.level, view->base.u.tex.level,
422
view->base.u.tex.first_layer,
423
view->base.u.tex.last_layer);
424
}
425
}
426
427
/* Helper for decompressing a portion of a color or depth resource before
428
* blitting if any decompression is needed.
429
* The driver doesn't decompress resources automatically while u_blitter is
430
* rendering. */
431
static bool r600_decompress_subresource(struct pipe_context *ctx,
432
struct pipe_resource *tex,
433
unsigned level,
434
unsigned first_layer, unsigned last_layer)
435
{
436
struct r600_context *rctx = (struct r600_context *)ctx;
437
struct r600_texture *rtex = (struct r600_texture*)tex;
438
439
if (rtex->db_compatible) {
440
if (r600_can_sample_zs(rtex, false)) {
441
r600_blit_decompress_depth_in_place(rctx, rtex, false,
442
level, level,
443
first_layer, last_layer);
444
if (rtex->surface.has_stencil) {
445
r600_blit_decompress_depth_in_place(rctx, rtex, true,
446
level, level,
447
first_layer, last_layer);
448
}
449
} else {
450
if (!r600_init_flushed_depth_texture(ctx, tex, NULL))
451
return false; /* error */
452
453
r600_blit_decompress_depth(ctx, rtex, NULL,
454
level, level,
455
first_layer, last_layer,
456
0, u_max_sample(tex));
457
}
458
} else if (rtex->cmask.size) {
459
r600_blit_decompress_color(ctx, rtex, level, level,
460
first_layer, last_layer);
461
}
462
return true;
463
}
464
465
static void r600_clear(struct pipe_context *ctx, unsigned buffers,
466
const struct pipe_scissor_state *scissor_state,
467
const union pipe_color_union *color,
468
double depth, unsigned stencil)
469
{
470
struct r600_context *rctx = (struct r600_context *)ctx;
471
struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
472
473
if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) {
474
evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom,
475
&buffers, NULL, color);
476
if (!buffers)
477
return; /* all buffers have been fast cleared */
478
}
479
480
if (buffers & PIPE_CLEAR_COLOR) {
481
int i;
482
483
/* These buffers cannot use fast clear, make sure to disable expansion. */
484
for (i = 0; i < fb->nr_cbufs; i++) {
485
struct r600_texture *tex;
486
487
/* If not clearing this buffer, skip. */
488
if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
489
continue;
490
491
if (!fb->cbufs[i])
492
continue;
493
494
tex = (struct r600_texture *)fb->cbufs[i]->texture;
495
if (tex->fmask.size == 0)
496
tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
497
}
498
}
499
500
/* if hyperz enabled just clear hyperz */
501
if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) {
502
struct r600_texture *rtex;
503
unsigned level = fb->zsbuf->u.tex.level;
504
505
rtex = (struct r600_texture*)fb->zsbuf->texture;
506
507
/* We can't use hyperz fast clear if each slice of a texture
508
* array are clear to different value. To simplify code just
509
* disable fast clear for texture array.
510
*/
511
if (r600_htile_enabled(rtex, level) &&
512
fb->zsbuf->u.tex.first_layer == 0 &&
513
fb->zsbuf->u.tex.last_layer == util_max_layer(&rtex->resource.b.b, level)) {
514
if (rtex->depth_clear_value != depth) {
515
rtex->depth_clear_value = depth;
516
r600_mark_atom_dirty(rctx, &rctx->db_state.atom);
517
}
518
rctx->db_misc_state.htile_clear = true;
519
r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
520
}
521
}
522
523
r600_blitter_begin(ctx, R600_CLEAR);
524
util_blitter_clear(rctx->blitter, fb->width, fb->height,
525
util_framebuffer_get_num_layers(fb),
526
buffers, color, depth, stencil,
527
util_framebuffer_get_num_samples(fb) > 1);
528
r600_blitter_end(ctx);
529
530
/* disable fast clear */
531
if (rctx->db_misc_state.htile_clear) {
532
rctx->db_misc_state.htile_clear = false;
533
r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom);
534
}
535
}
536
537
static void r600_clear_render_target(struct pipe_context *ctx,
538
struct pipe_surface *dst,
539
const union pipe_color_union *color,
540
unsigned dstx, unsigned dsty,
541
unsigned width, unsigned height,
542
bool render_condition_enabled)
543
{
544
struct r600_context *rctx = (struct r600_context *)ctx;
545
546
r600_blitter_begin(ctx, R600_CLEAR_SURFACE |
547
(render_condition_enabled ? 0 : R600_DISABLE_RENDER_COND));
548
util_blitter_clear_render_target(rctx->blitter, dst, color,
549
dstx, dsty, width, height);
550
r600_blitter_end(ctx);
551
}
552
553
static void r600_clear_depth_stencil(struct pipe_context *ctx,
554
struct pipe_surface *dst,
555
unsigned clear_flags,
556
double depth,
557
unsigned stencil,
558
unsigned dstx, unsigned dsty,
559
unsigned width, unsigned height,
560
bool render_condition_enabled)
561
{
562
struct r600_context *rctx = (struct r600_context *)ctx;
563
564
r600_blitter_begin(ctx, R600_CLEAR_SURFACE |
565
(render_condition_enabled ? 0 : R600_DISABLE_RENDER_COND));
566
util_blitter_clear_depth_stencil(rctx->blitter, dst, clear_flags, depth, stencil,
567
dstx, dsty, width, height);
568
r600_blitter_end(ctx);
569
}
570
571
static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx,
572
struct pipe_resource *src, const struct pipe_box *src_box)
573
{
574
struct r600_context *rctx = (struct r600_context*)ctx;
575
576
if (rctx->screen->b.has_cp_dma) {
577
r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width);
578
}
579
else if (rctx->screen->b.has_streamout &&
580
/* Require 4-byte alignment. */
581
dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) {
582
583
r600_blitter_begin(ctx, R600_COPY_BUFFER);
584
util_blitter_copy_buffer(rctx->blitter, dst, dstx, src, src_box->x, src_box->width);
585
r600_blitter_end(ctx);
586
} else {
587
util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box);
588
}
589
}
590
591
/**
592
* Global buffers are not really resources, they are are actually offsets
593
* into a single global resource (r600_screen::global_pool). The means
594
* they don't have their own buf handle, so they cannot be passed
595
* to r600_copy_buffer() and must be handled separately.
596
*/
597
static void r600_copy_global_buffer(struct pipe_context *ctx,
598
struct pipe_resource *dst, unsigned
599
dstx, struct pipe_resource *src,
600
const struct pipe_box *src_box)
601
{
602
struct r600_context *rctx = (struct r600_context*)ctx;
603
struct compute_memory_pool *pool = rctx->screen->global_pool;
604
struct pipe_box new_src_box = *src_box;
605
606
if (src->bind & PIPE_BIND_GLOBAL) {
607
struct r600_resource_global *rsrc =
608
(struct r600_resource_global *)src;
609
struct compute_memory_item *item = rsrc->chunk;
610
611
if (is_item_in_pool(item)) {
612
new_src_box.x += 4 * item->start_in_dw;
613
src = (struct pipe_resource *)pool->bo;
614
} else {
615
if (item->real_buffer == NULL) {
616
item->real_buffer =
617
r600_compute_buffer_alloc_vram(pool->screen,
618
item->size_in_dw * 4);
619
}
620
src = (struct pipe_resource*)item->real_buffer;
621
}
622
}
623
if (dst->bind & PIPE_BIND_GLOBAL) {
624
struct r600_resource_global *rdst =
625
(struct r600_resource_global *)dst;
626
struct compute_memory_item *item = rdst->chunk;
627
628
if (is_item_in_pool(item)) {
629
dstx += 4 * item->start_in_dw;
630
dst = (struct pipe_resource *)pool->bo;
631
} else {
632
if (item->real_buffer == NULL) {
633
item->real_buffer =
634
r600_compute_buffer_alloc_vram(pool->screen,
635
item->size_in_dw * 4);
636
}
637
dst = (struct pipe_resource*)item->real_buffer;
638
}
639
}
640
641
r600_copy_buffer(ctx, dst, dstx, src, &new_src_box);
642
}
643
644
static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
645
uint64_t offset, uint64_t size, unsigned value,
646
enum r600_coherency coher)
647
{
648
struct r600_context *rctx = (struct r600_context*)ctx;
649
650
if (rctx->screen->b.has_cp_dma &&
651
rctx->b.chip_class >= EVERGREEN &&
652
offset % 4 == 0 && size % 4 == 0) {
653
evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value, coher);
654
} else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) {
655
union pipe_color_union clear_value;
656
clear_value.ui[0] = value;
657
658
r600_blitter_begin(ctx, R600_DISABLE_RENDER_COND);
659
util_blitter_clear_buffer(rctx->blitter, dst, offset, size,
660
1, &clear_value);
661
r600_blitter_end(ctx);
662
} else {
663
uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst),
664
PIPE_MAP_WRITE);
665
map += offset / 4;
666
size /= 4;
667
for (unsigned i = 0; i < size; i++)
668
*map++ = value;
669
}
670
}
671
672
void r600_resource_copy_region(struct pipe_context *ctx,
673
struct pipe_resource *dst,
674
unsigned dst_level,
675
unsigned dstx, unsigned dsty, unsigned dstz,
676
struct pipe_resource *src,
677
unsigned src_level,
678
const struct pipe_box *src_box)
679
{
680
struct r600_context *rctx = (struct r600_context *)ctx;
681
struct pipe_surface *dst_view, dst_templ;
682
struct pipe_sampler_view src_templ, *src_view;
683
unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL;
684
unsigned src_force_level = 0;
685
struct pipe_box sbox, dstbox;
686
687
/* Handle buffers first. */
688
if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
689
if ((src->bind & PIPE_BIND_GLOBAL) ||
690
(dst->bind & PIPE_BIND_GLOBAL)) {
691
r600_copy_global_buffer(ctx, dst, dstx, src, src_box);
692
} else {
693
r600_copy_buffer(ctx, dst, dstx, src, src_box);
694
}
695
return;
696
}
697
698
assert(u_max_sample(dst) == u_max_sample(src));
699
700
/* The driver doesn't decompress resources automatically while
701
* u_blitter is rendering. */
702
if (!r600_decompress_subresource(ctx, src, src_level,
703
src_box->z, src_box->z + src_box->depth - 1)) {
704
return; /* error */
705
}
706
707
dst_width = u_minify(dst->width0, dst_level);
708
dst_height = u_minify(dst->height0, dst_level);
709
src_width0 = src->width0;
710
src_height0 = src->height0;
711
src_widthFL = u_minify(src->width0, src_level);
712
src_heightFL = u_minify(src->height0, src_level);
713
714
util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
715
util_blitter_default_src_texture(rctx->blitter, &src_templ, src, src_level);
716
717
if (util_format_is_compressed(src->format) ||
718
util_format_is_compressed(dst->format)) {
719
unsigned blocksize = util_format_get_blocksize(src->format);
720
721
if (blocksize == 8)
722
src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
723
else
724
src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
725
dst_templ.format = src_templ.format;
726
727
dst_width = util_format_get_nblocksx(dst->format, dst_width);
728
dst_height = util_format_get_nblocksy(dst->format, dst_height);
729
src_width0 = util_format_get_nblocksx(src->format, src_width0);
730
src_height0 = util_format_get_nblocksy(src->format, src_height0);
731
src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
732
src_heightFL = util_format_get_nblocksy(src->format, src_heightFL);
733
734
dstx = util_format_get_nblocksx(dst->format, dstx);
735
dsty = util_format_get_nblocksy(dst->format, dsty);
736
737
sbox.x = util_format_get_nblocksx(src->format, src_box->x);
738
sbox.y = util_format_get_nblocksy(src->format, src_box->y);
739
sbox.z = src_box->z;
740
sbox.width = util_format_get_nblocksx(src->format, src_box->width);
741
sbox.height = util_format_get_nblocksy(src->format, src_box->height);
742
sbox.depth = src_box->depth;
743
src_box = &sbox;
744
745
src_force_level = src_level;
746
} else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src)) {
747
if (util_format_is_subsampled_422(src->format)) {
748
749
src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
750
dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
751
752
dst_width = util_format_get_nblocksx(dst->format, dst_width);
753
src_width0 = util_format_get_nblocksx(src->format, src_width0);
754
src_widthFL = util_format_get_nblocksx(src->format, src_widthFL);
755
756
dstx = util_format_get_nblocksx(dst->format, dstx);
757
758
sbox = *src_box;
759
sbox.x = util_format_get_nblocksx(src->format, src_box->x);
760
sbox.width = util_format_get_nblocksx(src->format, src_box->width);
761
src_box = &sbox;
762
} else {
763
unsigned blocksize = util_format_get_blocksize(src->format);
764
765
switch (blocksize) {
766
case 1:
767
dst_templ.format = PIPE_FORMAT_R8_UNORM;
768
src_templ.format = PIPE_FORMAT_R8_UNORM;
769
break;
770
case 2:
771
dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
772
src_templ.format = PIPE_FORMAT_R8G8_UNORM;
773
break;
774
case 4:
775
dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
776
src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
777
break;
778
case 8:
779
dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
780
src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
781
break;
782
case 16:
783
dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
784
src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
785
break;
786
default:
787
fprintf(stderr, "Unhandled format %s with blocksize %u\n",
788
util_format_short_name(src->format), blocksize);
789
assert(0);
790
}
791
}
792
}
793
794
dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
795
/* we don't care about these two for r600g */
796
dst->width0, dst->height0,
797
dst_width, dst_height);
798
799
if (rctx->b.chip_class >= EVERGREEN) {
800
src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ,
801
src_width0, src_height0,
802
src_force_level);
803
} else {
804
src_view = r600_create_sampler_view_custom(ctx, src, &src_templ,
805
src_widthFL, src_heightFL);
806
}
807
808
u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
809
abs(src_box->depth), &dstbox);
810
811
/* Copy. */
812
r600_blitter_begin(ctx, R600_COPY_TEXTURE);
813
util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox,
814
src_view, src_box, src_width0, src_height0,
815
PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
816
FALSE);
817
r600_blitter_end(ctx);
818
819
pipe_surface_reference(&dst_view, NULL);
820
pipe_sampler_view_reference(&src_view, NULL);
821
}
822
823
static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
824
const struct pipe_blit_info *info)
825
{
826
struct r600_context *rctx = (struct r600_context*)ctx;
827
struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
828
unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
829
unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
830
enum pipe_format format = info->src.format;
831
unsigned sample_mask =
832
rctx->b.chip_class == CAYMAN ? ~0 :
833
((1ull << MAX2(1, info->src.resource->nr_samples)) - 1);
834
struct pipe_resource *tmp, templ;
835
struct pipe_blit_info blit;
836
837
/* Check basic requirements for hw resolve. */
838
if (!(info->src.resource->nr_samples > 1 &&
839
info->dst.resource->nr_samples <= 1 &&
840
!util_format_is_pure_integer(format) &&
841
!util_format_is_depth_or_stencil(format) &&
842
util_max_layer(info->src.resource, 0) == 0))
843
return false;
844
845
/* Check the remaining requirements for hw resolve. */
846
if (util_max_layer(info->dst.resource, info->dst.level) == 0 &&
847
util_is_format_compatible(util_format_description(info->src.format),
848
util_format_description(info->dst.format)) &&
849
!info->scissor_enable &&
850
(info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
851
dst_width == info->src.resource->width0 &&
852
dst_height == info->src.resource->height0 &&
853
info->dst.box.x == 0 &&
854
info->dst.box.y == 0 &&
855
info->dst.box.width == dst_width &&
856
info->dst.box.height == dst_height &&
857
info->dst.box.depth == 1 &&
858
info->src.box.x == 0 &&
859
info->src.box.y == 0 &&
860
info->src.box.width == dst_width &&
861
info->src.box.height == dst_height &&
862
info->src.box.depth == 1 &&
863
dst->surface.u.legacy.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
864
(!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
865
r600_blitter_begin(ctx, R600_COLOR_RESOLVE |
866
(info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
867
util_blitter_custom_resolve_color(rctx->blitter,
868
info->dst.resource, info->dst.level,
869
info->dst.box.z,
870
info->src.resource, info->src.box.z,
871
sample_mask, rctx->custom_blend_resolve,
872
format);
873
r600_blitter_end(ctx);
874
return true;
875
}
876
877
/* Shader-based resolve is VERY SLOW. Instead, resolve into
878
* a temporary texture and blit.
879
*/
880
memset(&templ, 0, sizeof(templ));
881
templ.target = PIPE_TEXTURE_2D;
882
templ.format = info->src.resource->format;
883
templ.width0 = info->src.resource->width0;
884
templ.height0 = info->src.resource->height0;
885
templ.depth0 = 1;
886
templ.array_size = 1;
887
templ.usage = PIPE_USAGE_DEFAULT;
888
templ.flags = R600_RESOURCE_FLAG_FORCE_TILING;
889
890
tmp = ctx->screen->resource_create(ctx->screen, &templ);
891
if (!tmp)
892
return false;
893
894
/* resolve */
895
r600_blitter_begin(ctx, R600_COLOR_RESOLVE |
896
(info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
897
util_blitter_custom_resolve_color(rctx->blitter, tmp, 0, 0,
898
info->src.resource, info->src.box.z,
899
sample_mask, rctx->custom_blend_resolve,
900
format);
901
r600_blitter_end(ctx);
902
903
/* blit */
904
blit = *info;
905
blit.src.resource = tmp;
906
blit.src.box.z = 0;
907
908
r600_blitter_begin(ctx, R600_BLIT |
909
(info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
910
util_blitter_blit(rctx->blitter, &blit);
911
r600_blitter_end(ctx);
912
913
pipe_resource_reference(&tmp, NULL);
914
return true;
915
}
916
917
static void r600_blit(struct pipe_context *ctx,
918
const struct pipe_blit_info *info)
919
{
920
struct r600_context *rctx = (struct r600_context*)ctx;
921
struct r600_texture *rdst = (struct r600_texture *)info->dst.resource;
922
923
if (do_hardware_msaa_resolve(ctx, info)) {
924
return;
925
}
926
927
/* Using SDMA for copying to a linear texture in GTT is much faster.
928
* This improves DRI PRIME performance.
929
*
930
* resource_copy_region can't do this yet, because dma_copy calls it
931
* on failure (recursion).
932
*/
933
if (rdst->surface.u.legacy.level[info->dst.level].mode ==
934
RADEON_SURF_MODE_LINEAR_ALIGNED &&
935
rctx->b.dma_copy &&
936
util_can_blit_via_copy_region(info, false)) {
937
rctx->b.dma_copy(ctx, info->dst.resource, info->dst.level,
938
info->dst.box.x, info->dst.box.y,
939
info->dst.box.z,
940
info->src.resource, info->src.level,
941
&info->src.box);
942
return;
943
}
944
945
assert(util_blitter_is_blit_supported(rctx->blitter, info));
946
947
/* The driver doesn't decompress resources automatically while
948
* u_blitter is rendering. */
949
if (!r600_decompress_subresource(ctx, info->src.resource, info->src.level,
950
info->src.box.z,
951
info->src.box.z + info->src.box.depth - 1)) {
952
return; /* error */
953
}
954
955
if (rctx->screen->b.debug_flags & DBG_FORCE_DMA &&
956
util_try_blit_via_copy_region(ctx, info))
957
return;
958
959
r600_blitter_begin(ctx, R600_BLIT |
960
(info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND));
961
util_blitter_blit(rctx->blitter, info);
962
r600_blitter_end(ctx);
963
}
964
965
static void r600_flush_resource(struct pipe_context *ctx,
966
struct pipe_resource *res)
967
{
968
struct r600_texture *rtex = (struct r600_texture*)res;
969
970
assert(res->target != PIPE_BUFFER);
971
972
if (!rtex->is_depth && rtex->cmask.size) {
973
r600_blit_decompress_color(ctx, rtex, 0, res->last_level,
974
0, util_max_layer(res, 0));
975
}
976
}
977
978
void r600_init_blit_functions(struct r600_context *rctx)
979
{
980
rctx->b.b.clear = r600_clear;
981
rctx->b.b.clear_render_target = r600_clear_render_target;
982
rctx->b.b.clear_depth_stencil = r600_clear_depth_stencil;
983
rctx->b.b.resource_copy_region = r600_resource_copy_region;
984
rctx->b.b.blit = r600_blit;
985
rctx->b.b.flush_resource = r600_flush_resource;
986
rctx->b.clear_buffer = r600_clear_buffer;
987
rctx->b.blit_decompress_depth = r600_blit_decompress_depth;
988
}
989
990