Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/radeon/radeon_vcn_dec.c
4570 views
1
/**************************************************************************
2
*
3
* Copyright 2017 Advanced Micro Devices, Inc.
4
* All Rights Reserved.
5
*
6
* Permission is hereby granted, free of charge, to any person obtaining a
7
* copy of this software and associated documentation files (the
8
* "Software"), to deal in the Software without restriction, including
9
* without limitation the rights to use, copy, modify, merge, publish,
10
* distribute, sub license, and/or sell copies of the Software, and to
11
* permit persons to whom the Software is furnished to do so, subject to
12
* the following conditions:
13
*
14
* The above copyright notice and this permission notice (including the
15
* next paragraph) shall be included in all copies or substantial portions
16
* of the Software.
17
*
18
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21
* IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
*
26
**************************************************************************/
27
28
#include "radeon_vcn_dec.h"
29
30
#include "pipe/p_video_codec.h"
31
#include "radeon_video.h"
32
#include "radeonsi/si_pipe.h"
33
#include "util/u_memory.h"
34
#include "util/u_video.h"
35
#include "vl/vl_mpeg12_decoder.h"
36
#include "vl/vl_probs_table.h"
37
#include "pspdecryptionparam.h"
38
39
#include <assert.h>
40
#include <stdio.h>
41
42
#include "radeon_vcn_av1_default.h"
43
44
#define FB_BUFFER_OFFSET 0x1000
45
#define FB_BUFFER_SIZE 2048
46
#define IT_SCALING_TABLE_SIZE 992
47
#define VP9_PROBS_TABLE_SIZE (RDECODE_VP9_PROBS_DATA_SIZE + 256)
48
#define RDECODE_SESSION_CONTEXT_SIZE (128 * 1024)
49
50
#define RDECODE_VCN1_GPCOM_VCPU_CMD 0x2070c
51
#define RDECODE_VCN1_GPCOM_VCPU_DATA0 0x20710
52
#define RDECODE_VCN1_GPCOM_VCPU_DATA1 0x20714
53
#define RDECODE_VCN1_ENGINE_CNTL 0x20718
54
55
#define RDECODE_VCN2_GPCOM_VCPU_CMD (0x503 << 2)
56
#define RDECODE_VCN2_GPCOM_VCPU_DATA0 (0x504 << 2)
57
#define RDECODE_VCN2_GPCOM_VCPU_DATA1 (0x505 << 2)
58
#define RDECODE_VCN2_ENGINE_CNTL (0x506 << 2)
59
60
#define RDECODE_VCN2_5_GPCOM_VCPU_CMD 0x3c
61
#define RDECODE_VCN2_5_GPCOM_VCPU_DATA0 0x40
62
#define RDECODE_VCN2_5_GPCOM_VCPU_DATA1 0x44
63
#define RDECODE_VCN2_5_ENGINE_CNTL 0x9b4
64
65
#define NUM_MPEG2_REFS 6
66
#define NUM_H264_REFS 17
67
#define NUM_VC1_REFS 5
68
#define NUM_VP9_REFS 8
69
#define NUM_AV1_REFS 8
70
#define NUM_AV1_REFS_PER_FRAME 7
71
72
static unsigned calc_dpb_size(struct radeon_decoder *dec);
73
static unsigned calc_ctx_size_h264_perf(struct radeon_decoder *dec);
74
static unsigned calc_ctx_size_h265_main(struct radeon_decoder *dec);
75
static unsigned calc_ctx_size_h265_main10(struct radeon_decoder *dec,
76
struct pipe_h265_picture_desc *pic);
77
78
static rvcn_dec_message_avc_t get_h264_msg(struct radeon_decoder *dec,
79
struct pipe_h264_picture_desc *pic)
80
{
81
rvcn_dec_message_avc_t result;
82
83
memset(&result, 0, sizeof(result));
84
switch (pic->base.profile) {
85
case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
86
case PIPE_VIDEO_PROFILE_MPEG4_AVC_CONSTRAINED_BASELINE:
87
result.profile = RDECODE_H264_PROFILE_BASELINE;
88
break;
89
90
case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
91
result.profile = RDECODE_H264_PROFILE_MAIN;
92
break;
93
94
case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
95
result.profile = RDECODE_H264_PROFILE_HIGH;
96
break;
97
98
default:
99
assert(0);
100
break;
101
}
102
103
result.level = dec->base.level;
104
105
result.sps_info_flags = 0;
106
result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
107
result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
108
result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
109
result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
110
result.sps_info_flags |= 1 << RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT;
111
112
result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
113
result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
114
result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4;
115
result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type;
116
result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
117
118
switch (dec->base.chroma_format) {
119
case PIPE_VIDEO_CHROMA_FORMAT_NONE:
120
break;
121
case PIPE_VIDEO_CHROMA_FORMAT_400:
122
result.chroma_format = 0;
123
break;
124
case PIPE_VIDEO_CHROMA_FORMAT_420:
125
result.chroma_format = 1;
126
break;
127
case PIPE_VIDEO_CHROMA_FORMAT_422:
128
result.chroma_format = 2;
129
break;
130
case PIPE_VIDEO_CHROMA_FORMAT_444:
131
result.chroma_format = 3;
132
break;
133
}
134
135
result.pps_info_flags = 0;
136
result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0;
137
result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1;
138
result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2;
139
result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3;
140
result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4;
141
result.pps_info_flags |= pic->pps->weighted_pred_flag << 6;
142
result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7;
143
result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8;
144
145
result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1;
146
result.slice_group_map_type = pic->pps->slice_group_map_type;
147
result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1;
148
result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26;
149
result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset;
150
result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset;
151
152
memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6 * 16);
153
memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2 * 64);
154
155
memcpy(dec->it, result.scaling_list_4x4, 6 * 16);
156
memcpy((dec->it + 96), result.scaling_list_8x8, 2 * 64);
157
158
result.num_ref_frames = pic->num_ref_frames;
159
160
result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
161
result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
162
163
result.frame_num = pic->frame_num;
164
memcpy(result.frame_num_list, pic->frame_num_list, 4 * 16);
165
result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
166
result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
167
memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4 * 16 * 2);
168
169
result.decoded_pic_idx = pic->frame_num;
170
171
return result;
172
}
173
174
static void radeon_dec_destroy_associated_data(void *data)
175
{
176
/* NOOP, since we only use an intptr */
177
}
178
179
static rvcn_dec_message_hevc_t get_h265_msg(struct radeon_decoder *dec,
180
struct pipe_video_buffer *target,
181
struct pipe_h265_picture_desc *pic)
182
{
183
rvcn_dec_message_hevc_t result;
184
unsigned i, j;
185
186
memset(&result, 0, sizeof(result));
187
result.sps_info_flags = 0;
188
result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0;
189
result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1;
190
result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2;
191
result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3;
192
result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4;
193
result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5;
194
result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6;
195
result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7;
196
result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8;
197
if (((struct si_screen *)dec->screen)->info.family == CHIP_CARRIZO)
198
result.sps_info_flags |= 1 << 9;
199
if (pic->UseRefPicList == true)
200
result.sps_info_flags |= 1 << 10;
201
if (pic->UseStRpsBits == true && pic->pps->st_rps_bits != 0) {
202
result.sps_info_flags |= 1 << 11;
203
result.st_rps_bits = pic->pps->st_rps_bits;
204
}
205
206
result.chroma_format = pic->pps->sps->chroma_format_idc;
207
result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
208
result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
209
result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
210
result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1;
211
result.log2_min_luma_coding_block_size_minus3 =
212
pic->pps->sps->log2_min_luma_coding_block_size_minus3;
213
result.log2_diff_max_min_luma_coding_block_size =
214
pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
215
result.log2_min_transform_block_size_minus2 =
216
pic->pps->sps->log2_min_transform_block_size_minus2;
217
result.log2_diff_max_min_transform_block_size =
218
pic->pps->sps->log2_diff_max_min_transform_block_size;
219
result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter;
220
result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra;
221
result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1;
222
result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1;
223
result.log2_min_pcm_luma_coding_block_size_minus3 =
224
pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3;
225
result.log2_diff_max_min_pcm_luma_coding_block_size =
226
pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size;
227
result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets;
228
229
result.pps_info_flags = 0;
230
result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0;
231
result.pps_info_flags |= pic->pps->output_flag_present_flag << 1;
232
result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2;
233
result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3;
234
result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4;
235
result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5;
236
result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6;
237
result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7;
238
result.pps_info_flags |= pic->pps->weighted_pred_flag << 8;
239
result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9;
240
result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10;
241
result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11;
242
result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12;
243
result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13;
244
result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14;
245
result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15;
246
result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16;
247
result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17;
248
result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18;
249
result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19;
250
251
result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits;
252
result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps;
253
result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1;
254
result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1;
255
result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset;
256
result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset;
257
result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2;
258
result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2;
259
result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth;
260
result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1;
261
result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
262
result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
263
result.init_qp_minus26 = pic->pps->init_qp_minus26;
264
265
for (i = 0; i < 19; ++i)
266
result.column_width_minus1[i] = pic->pps->column_width_minus1[i];
267
268
for (i = 0; i < 21; ++i)
269
result.row_height_minus1[i] = pic->pps->row_height_minus1[i];
270
271
result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx;
272
result.curr_poc = pic->CurrPicOrderCntVal;
273
274
for (i = 0; i < ARRAY_SIZE(dec->render_pic_list); i++) {
275
for (j = 0;
276
(pic->ref[j] != NULL) && (j < ARRAY_SIZE(dec->render_pic_list));
277
j++) {
278
if (dec->render_pic_list[i] == pic->ref[j])
279
break;
280
if (j == ARRAY_SIZE(dec->render_pic_list) - 1)
281
dec->render_pic_list[i] = NULL;
282
else if (pic->ref[j + 1] == NULL)
283
dec->render_pic_list[i] = NULL;
284
}
285
}
286
for (i = 0; i < ARRAY_SIZE(dec->render_pic_list); i++) {
287
if (dec->render_pic_list[i] == NULL) {
288
dec->render_pic_list[i] = target;
289
result.curr_idx = i;
290
break;
291
}
292
}
293
294
vl_video_buffer_set_associated_data(target, &dec->base, (void *)(uintptr_t)result.curr_idx,
295
&radeon_dec_destroy_associated_data);
296
297
for (i = 0; i < 16; ++i) {
298
struct pipe_video_buffer *ref = pic->ref[i];
299
uintptr_t ref_pic = 0;
300
301
result.poc_list[i] = pic->PicOrderCntVal[i];
302
303
if (ref)
304
ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
305
else
306
ref_pic = 0x7F;
307
result.ref_pic_list[i] = ref_pic;
308
}
309
310
for (i = 0; i < 8; ++i) {
311
result.ref_pic_set_st_curr_before[i] = 0xFF;
312
result.ref_pic_set_st_curr_after[i] = 0xFF;
313
result.ref_pic_set_lt_curr[i] = 0xFF;
314
}
315
316
for (i = 0; i < pic->NumPocStCurrBefore; ++i)
317
result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i];
318
319
for (i = 0; i < pic->NumPocStCurrAfter; ++i)
320
result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i];
321
322
for (i = 0; i < pic->NumPocLtCurr; ++i)
323
result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i];
324
325
for (i = 0; i < 6; ++i)
326
result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i];
327
328
for (i = 0; i < 2; ++i)
329
result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i];
330
331
memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16);
332
memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64);
333
memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64);
334
memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64);
335
336
for (i = 0; i < 2; i++) {
337
for (j = 0; j < 15; j++)
338
result.direct_reflist[i][j] = pic->RefPicList[i][j];
339
}
340
341
if (pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
342
if (target->buffer_format == PIPE_FORMAT_P010 || target->buffer_format == PIPE_FORMAT_P016) {
343
result.p010_mode = 1;
344
result.msb_mode = 1;
345
} else {
346
result.p010_mode = 0;
347
result.luma_10to8 = 5;
348
result.chroma_10to8 = 5;
349
result.hevc_reserved[0] = 4; /* sclr_luma10to8 */
350
result.hevc_reserved[1] = 4; /* sclr_chroma10to8 */
351
}
352
}
353
354
return result;
355
}
356
357
static void fill_probs_table(void *ptr)
358
{
359
rvcn_dec_vp9_probs_t *probs = (rvcn_dec_vp9_probs_t *)ptr;
360
361
memcpy(&probs->coef_probs[0], default_coef_probs_4x4, sizeof(default_coef_probs_4x4));
362
memcpy(&probs->coef_probs[1], default_coef_probs_8x8, sizeof(default_coef_probs_8x8));
363
memcpy(&probs->coef_probs[2], default_coef_probs_16x16, sizeof(default_coef_probs_16x16));
364
memcpy(&probs->coef_probs[3], default_coef_probs_32x32, sizeof(default_coef_probs_32x32));
365
memcpy(probs->y_mode_prob, default_if_y_probs, sizeof(default_if_y_probs));
366
memcpy(probs->uv_mode_prob, default_if_uv_probs, sizeof(default_if_uv_probs));
367
memcpy(probs->single_ref_prob, default_single_ref_p, sizeof(default_single_ref_p));
368
memcpy(probs->switchable_interp_prob, default_switchable_interp_prob,
369
sizeof(default_switchable_interp_prob));
370
memcpy(probs->partition_prob, default_partition_probs, sizeof(default_partition_probs));
371
memcpy(probs->inter_mode_probs, default_inter_mode_probs, sizeof(default_inter_mode_probs));
372
memcpy(probs->mbskip_probs, default_skip_probs, sizeof(default_skip_probs));
373
memcpy(probs->intra_inter_prob, default_intra_inter_p, sizeof(default_intra_inter_p));
374
memcpy(probs->comp_inter_prob, default_comp_inter_p, sizeof(default_comp_inter_p));
375
memcpy(probs->comp_ref_prob, default_comp_ref_p, sizeof(default_comp_ref_p));
376
memcpy(probs->tx_probs_32x32, default_tx_probs_32x32, sizeof(default_tx_probs_32x32));
377
memcpy(probs->tx_probs_16x16, default_tx_probs_16x16, sizeof(default_tx_probs_16x16));
378
memcpy(probs->tx_probs_8x8, default_tx_probs_8x8, sizeof(default_tx_probs_8x8));
379
memcpy(probs->mv_joints, default_nmv_joints, sizeof(default_nmv_joints));
380
memcpy(&probs->mv_comps[0], default_nmv_components, sizeof(default_nmv_components));
381
memset(&probs->nmvc_mask, 0, sizeof(rvcn_dec_vp9_nmv_ctx_mask_t));
382
}
383
384
static rvcn_dec_message_vp9_t get_vp9_msg(struct radeon_decoder *dec,
385
struct pipe_video_buffer *target,
386
struct pipe_vp9_picture_desc *pic)
387
{
388
rvcn_dec_message_vp9_t result;
389
unsigned i ,j;
390
391
memset(&result, 0, sizeof(result));
392
393
/* segment table */
394
rvcn_dec_vp9_probs_segment_t *prbs = (rvcn_dec_vp9_probs_segment_t *)(dec->probs);
395
396
if (pic->picture_parameter.pic_fields.segmentation_enabled) {
397
for (i = 0; i < 8; ++i) {
398
prbs->seg.feature_data[i] =
399
(pic->slice_parameter.seg_param[i].alt_quant & 0xffff) |
400
((pic->slice_parameter.seg_param[i].alt_lf & 0xff) << 16) |
401
((pic->slice_parameter.seg_param[i].segment_flags.segment_reference & 0xf) << 24);
402
prbs->seg.feature_mask[i] =
403
(pic->slice_parameter.seg_param[i].alt_quant_enabled << 0) |
404
(pic->slice_parameter.seg_param[i].alt_lf_enabled << 1) |
405
(pic->slice_parameter.seg_param[i].segment_flags.segment_reference_enabled << 2) |
406
(pic->slice_parameter.seg_param[i].segment_flags.segment_reference_skipped << 3);
407
}
408
409
for (i = 0; i < 7; ++i)
410
prbs->seg.tree_probs[i] = pic->picture_parameter.mb_segment_tree_probs[i];
411
412
for (i = 0; i < 3; ++i)
413
prbs->seg.pred_probs[i] = pic->picture_parameter.segment_pred_probs[i];
414
415
prbs->seg.abs_delta = pic->picture_parameter.abs_delta;
416
} else
417
memset(&prbs->seg, 0, 256);
418
419
result.frame_header_flags = (pic->picture_parameter.pic_fields.frame_type
420
<< RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_SHIFT) &
421
RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_MASK;
422
423
result.frame_header_flags |= (pic->picture_parameter.pic_fields.error_resilient_mode
424
<< RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_SHIFT) &
425
RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_MASK;
426
427
result.frame_header_flags |= (pic->picture_parameter.pic_fields.intra_only
428
<< RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_SHIFT) &
429
RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_MASK;
430
431
result.frame_header_flags |= (pic->picture_parameter.pic_fields.allow_high_precision_mv
432
<< RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_SHIFT) &
433
RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_MASK;
434
435
result.frame_header_flags |= (pic->picture_parameter.pic_fields.frame_parallel_decoding_mode
436
<< RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_SHIFT) &
437
RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_MASK;
438
439
result.frame_header_flags |= (pic->picture_parameter.pic_fields.refresh_frame_context
440
<< RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_SHIFT) &
441
RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_MASK;
442
443
result.frame_header_flags |= (pic->picture_parameter.pic_fields.segmentation_enabled
444
<< RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_SHIFT) &
445
RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_MASK;
446
447
result.frame_header_flags |= (pic->picture_parameter.pic_fields.segmentation_update_map
448
<< RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_SHIFT) &
449
RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_MASK;
450
451
result.frame_header_flags |= (pic->picture_parameter.pic_fields.segmentation_temporal_update
452
<< RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_SHIFT) &
453
RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_MASK;
454
455
result.frame_header_flags |= (pic->picture_parameter.mode_ref_delta_enabled
456
<< RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_SHIFT) &
457
RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_MASK;
458
459
result.frame_header_flags |= (pic->picture_parameter.mode_ref_delta_update
460
<< RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_SHIFT) &
461
RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_MASK;
462
463
result.frame_header_flags |=
464
((dec->show_frame && !pic->picture_parameter.pic_fields.error_resilient_mode)
465
<< RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_SHIFT) &
466
RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_MASK;
467
dec->show_frame = pic->picture_parameter.pic_fields.show_frame;
468
469
result.interp_filter = pic->picture_parameter.pic_fields.mcomp_filter_type;
470
471
result.frame_context_idx = pic->picture_parameter.pic_fields.frame_context_idx;
472
result.reset_frame_context = pic->picture_parameter.pic_fields.reset_frame_context;
473
474
result.filter_level = pic->picture_parameter.filter_level;
475
result.sharpness_level = pic->picture_parameter.sharpness_level;
476
477
for (i = 0; i < 8; ++i)
478
memcpy(result.lf_adj_level[i], pic->slice_parameter.seg_param[i].filter_level, 4 * 2);
479
480
if (pic->picture_parameter.pic_fields.lossless_flag) {
481
result.base_qindex = 0;
482
result.y_dc_delta_q = 0;
483
result.uv_ac_delta_q = 0;
484
result.uv_dc_delta_q = 0;
485
} else {
486
result.base_qindex = pic->picture_parameter.base_qindex;
487
result.y_dc_delta_q = pic->picture_parameter.y_dc_delta_q;
488
result.uv_ac_delta_q = pic->picture_parameter.uv_ac_delta_q;
489
result.uv_dc_delta_q = pic->picture_parameter.uv_dc_delta_q;
490
}
491
492
result.log2_tile_cols = pic->picture_parameter.log2_tile_columns;
493
result.log2_tile_rows = pic->picture_parameter.log2_tile_rows;
494
result.chroma_format = 1;
495
result.bit_depth_luma_minus8 = result.bit_depth_chroma_minus8 =
496
(pic->picture_parameter.bit_depth - 8);
497
498
result.vp9_frame_size = align(dec->bs_size, 128);
499
result.uncompressed_header_size = pic->picture_parameter.frame_header_length_in_bytes;
500
result.compressed_header_size = pic->picture_parameter.first_partition_size;
501
502
assert(dec->base.max_references + 1 <= ARRAY_SIZE(dec->render_pic_list));
503
504
//clear the dec->render list if it is not used as a reference
505
for (i = 0; i < ARRAY_SIZE(dec->render_pic_list); i++) {
506
if (dec->render_pic_list[i]) {
507
for (j=0;j<8;j++) {
508
if (dec->render_pic_list[i] == pic->ref[j])
509
break;
510
}
511
if(j == 8)
512
dec->render_pic_list[i] = NULL;
513
}
514
}
515
516
for (i = 0; i < ARRAY_SIZE(dec->render_pic_list); ++i) {
517
if (dec->render_pic_list[i] && dec->render_pic_list[i] == target) {
518
if (target->codec != NULL){
519
result.curr_pic_idx =(uintptr_t)vl_video_buffer_get_associated_data(target, &dec->base);
520
} else {
521
result.curr_pic_idx = i;
522
vl_video_buffer_set_associated_data(target, &dec->base, (void *)(uintptr_t)i,
523
&radeon_dec_destroy_associated_data);
524
}
525
break;
526
} else if (!dec->render_pic_list[i]) {
527
dec->render_pic_list[i] = target;
528
result.curr_pic_idx = i;
529
vl_video_buffer_set_associated_data(target, &dec->base, (void *)(uintptr_t)i,
530
&radeon_dec_destroy_associated_data);
531
break;
532
}
533
}
534
535
for (i = 0; i < 8; i++) {
536
result.ref_frame_map[i] =
537
(pic->ref[i]) ? (uintptr_t)vl_video_buffer_get_associated_data(pic->ref[i], &dec->base)
538
: 0x7f;
539
}
540
541
result.frame_refs[0] = result.ref_frame_map[pic->picture_parameter.pic_fields.last_ref_frame];
542
result.ref_frame_sign_bias[0] = pic->picture_parameter.pic_fields.last_ref_frame_sign_bias;
543
result.frame_refs[1] = result.ref_frame_map[pic->picture_parameter.pic_fields.golden_ref_frame];
544
result.ref_frame_sign_bias[1] = pic->picture_parameter.pic_fields.golden_ref_frame_sign_bias;
545
result.frame_refs[2] = result.ref_frame_map[pic->picture_parameter.pic_fields.alt_ref_frame];
546
result.ref_frame_sign_bias[2] = pic->picture_parameter.pic_fields.alt_ref_frame_sign_bias;
547
548
if (pic->base.profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2) {
549
if (target->buffer_format == PIPE_FORMAT_P010 || target->buffer_format == PIPE_FORMAT_P016) {
550
result.p010_mode = 1;
551
result.msb_mode = 1;
552
} else {
553
result.p010_mode = 0;
554
result.luma_10to8 = 1;
555
result.chroma_10to8 = 1;
556
}
557
}
558
559
if (dec->dpb_type == DPB_DYNAMIC_TIER_2) {
560
dec->ref_codec.bts = (pic->base.profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2) ?
561
CODEC_10_BITS : CODEC_8_BITS;
562
dec->ref_codec.index = result.curr_pic_idx;
563
dec->ref_codec.ref_size = 8;
564
memset(dec->ref_codec.ref_list, 0x7f, sizeof(dec->ref_codec.ref_list));
565
memcpy(dec->ref_codec.ref_list, result.ref_frame_map, sizeof(result.ref_frame_map));
566
}
567
568
return result;
569
}
570
571
static void set_drm_keys(rvcn_dec_message_drm_t *drm, DECRYPT_PARAMETERS *decrypted)
572
{
573
int cbc = decrypted->u.s.cbc;
574
int ctr = decrypted->u.s.ctr;
575
int id = decrypted->u.s.drm_id;
576
int ekc = 1;
577
int data1 = 1;
578
int data2 = 1;
579
580
drm->drm_cmd = 0;
581
drm->drm_cntl = 0;
582
583
drm->drm_cntl = 1 << DRM_CNTL_BYPASS_SHIFT;
584
585
if (cbc || ctr) {
586
drm->drm_cntl = 0 << DRM_CNTL_BYPASS_SHIFT;
587
drm->drm_cmd |= 0xff << DRM_CMD_BYTE_MASK_SHIFT;
588
589
if (ctr)
590
drm->drm_cmd |= 0x00 << DRM_CMD_ALGORITHM_SHIFT;
591
else if (cbc)
592
drm->drm_cmd |= 0x02 << DRM_CMD_ALGORITHM_SHIFT;
593
594
drm->drm_cmd |= 1 << DRM_CMD_GEN_MASK_SHIFT;
595
drm->drm_cmd |= ekc << DRM_CMD_UNWRAP_KEY_SHIFT;
596
drm->drm_cmd |= 0 << DRM_CMD_OFFSET_SHIFT;
597
drm->drm_cmd |= data2 << DRM_CMD_CNT_DATA_SHIFT;
598
drm->drm_cmd |= data1 << DRM_CMD_CNT_KEY_SHIFT;
599
drm->drm_cmd |= ekc << DRM_CMD_KEY_SHIFT;
600
drm->drm_cmd |= id << DRM_CMD_SESSION_SEL_SHIFT;
601
602
if (ekc)
603
memcpy(drm->drm_wrapped_key, decrypted->encrypted_key, 16);
604
if (data1)
605
memcpy(drm->drm_key, decrypted->session_iv, 16);
606
if (data2)
607
memcpy(drm->drm_counter, decrypted->encrypted_iv, 16);
608
drm->drm_offset = 0;
609
}
610
}
611
612
static rvcn_dec_message_av1_t get_av1_msg(struct radeon_decoder *dec,
613
struct pipe_video_buffer *target,
614
struct pipe_av1_picture_desc *pic)
615
{
616
rvcn_dec_message_av1_t result;
617
unsigned i, j;
618
619
memset(&result, 0, sizeof(result));
620
621
result.frame_header_flags = (pic->picture_parameter.pic_info_fields.show_frame
622
<< RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_SHIFT) &
623
RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_MASK;
624
625
result.frame_header_flags |= (pic->picture_parameter.pic_info_fields.disable_cdf_update
626
<< RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_SHIFT) &
627
RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_MASK;
628
629
result.frame_header_flags |= ((!pic->picture_parameter.pic_info_fields.disable_frame_end_update_cdf)
630
<< RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_SHIFT) &
631
RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_MASK;
632
633
result.frame_header_flags |= ((pic->picture_parameter.pic_info_fields.frame_type ==
634
2 /* INTRA_ONLY_FRAME */) << RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_SHIFT) &
635
RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_MASK;
636
637
result.frame_header_flags |= (pic->picture_parameter.pic_info_fields.allow_intrabc
638
<< RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_SHIFT) &
639
RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_MASK;
640
641
result.frame_header_flags |= (pic->picture_parameter.pic_info_fields.allow_high_precision_mv
642
<< RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_SHIFT) &
643
RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_MASK;
644
645
result.frame_header_flags |= (pic->picture_parameter.seq_info_fields.mono_chrome
646
<< RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_SHIFT) &
647
RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_MASK;
648
649
result.frame_header_flags |= (pic->picture_parameter.mode_control_fields.skip_mode_present
650
<< RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_SHIFT) &
651
RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_MASK;
652
653
result.frame_header_flags |= (((pic->picture_parameter.qmatrix_fields.qm_y == 0xf) ? 0 : 1)
654
<< RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_SHIFT) &
655
RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_MASK;
656
657
result.frame_header_flags |= (pic->picture_parameter.seq_info_fields.enable_filter_intra
658
<< RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_SHIFT) &
659
RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_MASK;
660
661
result.frame_header_flags |= (pic->picture_parameter.seq_info_fields.enable_intra_edge_filter
662
<< RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_SHIFT) &
663
RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_MASK;
664
665
result.frame_header_flags |= (pic->picture_parameter.seq_info_fields.enable_interintra_compound
666
<< RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_SHIFT) &
667
RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_MASK;
668
669
result.frame_header_flags |= (pic->picture_parameter.seq_info_fields.enable_masked_compound
670
<< RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_SHIFT) &
671
RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_MASK;
672
673
result.frame_header_flags |= (pic->picture_parameter.pic_info_fields.allow_warped_motion
674
<< RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_SHIFT) &
675
RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_MASK;
676
677
result.frame_header_flags |= (pic->picture_parameter.seq_info_fields.enable_dual_filter
678
<< RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_SHIFT) &
679
RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_MASK;
680
681
result.frame_header_flags |= (pic->picture_parameter.seq_info_fields.enable_order_hint
682
<< RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_SHIFT) &
683
RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_MASK;
684
685
result.frame_header_flags |= (pic->picture_parameter.seq_info_fields.enable_jnt_comp
686
<< RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_SHIFT) &
687
RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_MASK;
688
689
result.frame_header_flags |= (pic->picture_parameter.pic_info_fields.use_ref_frame_mvs
690
<< RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_SHIFT) &
691
RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_MASK;
692
693
result.frame_header_flags |= (pic->picture_parameter.pic_info_fields.allow_screen_content_tools
694
<< RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_SHIFT) &
695
RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_MASK;
696
697
result.frame_header_flags |= (pic->picture_parameter.pic_info_fields.force_integer_mv
698
<< RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_SHIFT) &
699
RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_MASK;
700
701
result.frame_header_flags |= (pic->picture_parameter.loop_filter_info_fields.mode_ref_delta_enabled
702
<< RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_SHIFT) &
703
RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_MASK;
704
705
result.frame_header_flags |= (pic->picture_parameter.loop_filter_info_fields.mode_ref_delta_update
706
<< RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_SHIFT) &
707
RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_MASK;
708
709
result.frame_header_flags |= (pic->picture_parameter.mode_control_fields.delta_q_present_flag
710
<< RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_SHIFT) &
711
RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_MASK;
712
713
result.frame_header_flags |= (pic->picture_parameter.mode_control_fields.delta_lf_present_flag
714
<< RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_SHIFT) &
715
RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_MASK;
716
717
result.frame_header_flags |= (pic->picture_parameter.mode_control_fields.reduced_tx_set_used
718
<< RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_SHIFT) &
719
RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_MASK;
720
721
result.frame_header_flags |= (pic->picture_parameter.seg_info.segment_info_fields.enabled
722
<< RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_SHIFT) &
723
RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_MASK;
724
725
result.frame_header_flags |= (pic->picture_parameter.seg_info.segment_info_fields.update_map
726
<< RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_SHIFT) &
727
RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_MASK;
728
729
result.frame_header_flags |= (pic->picture_parameter.seg_info.segment_info_fields.temporal_update
730
<< RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_SHIFT) &
731
RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_MASK;
732
733
result.frame_header_flags |= (pic->picture_parameter.mode_control_fields.delta_lf_multi
734
<< RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_SHIFT) &
735
RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_MASK;
736
737
result.frame_header_flags |= (pic->picture_parameter.pic_info_fields.is_motion_mode_switchable
738
<< RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_SHIFT) &
739
RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_MASK;
740
741
result.frame_header_flags |= ((!pic->picture_parameter.refresh_frame_flags)
742
<< RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_SHIFT) &
743
RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_MASK;
744
745
result.frame_header_flags |= ((!pic->picture_parameter.seq_info_fields.ref_frame_mvs)
746
<< RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_SHIFT) &
747
RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_MASK;
748
749
result.current_frame_id = pic->picture_parameter.current_frame_id;
750
result.frame_offset = pic->picture_parameter.order_hint;
751
752
result.profile = pic->picture_parameter.profile;
753
result.is_annexb = 0;
754
result.frame_type = pic->picture_parameter.pic_info_fields.frame_type;
755
result.primary_ref_frame = pic->picture_parameter.primary_ref_frame;
756
for (i = 0; i < ARRAY_SIZE(dec->render_pic_list); ++i) {
757
if (dec->render_pic_list[i] && dec->render_pic_list[i] == target) {
758
result.curr_pic_idx = (uintptr_t)vl_video_buffer_get_associated_data(target, &dec->base);
759
break;
760
} else if (!dec->render_pic_list[i]) {
761
dec->render_pic_list[i] = target;
762
result.curr_pic_idx = dec->ref_idx;
763
vl_video_buffer_set_associated_data(target, &dec->base, (void *)(uintptr_t)dec->ref_idx++,
764
&radeon_dec_destroy_associated_data);
765
break;
766
}
767
}
768
769
result.sb_size = pic->picture_parameter.seq_info_fields.use_128x128_superblock;
770
result.interp_filter = pic->picture_parameter.interp_filter;
771
for (i = 0; i < 2; ++i)
772
result.filter_level[i] = pic->picture_parameter.filter_level[i];
773
result.filter_level_u = pic->picture_parameter.filter_level_u;
774
result.filter_level_v = pic->picture_parameter.filter_level_v;
775
result.sharpness_level = pic->picture_parameter.loop_filter_info_fields.sharpness_level;
776
for (i = 0; i < 8; ++i)
777
result.ref_deltas[i] = pic->picture_parameter.ref_deltas[i];
778
for (i = 0; i < 2; ++i)
779
result.mode_deltas[i] = pic->picture_parameter.mode_deltas[i];
780
result.base_qindex = pic->picture_parameter.base_qindex;
781
result.y_dc_delta_q = pic->picture_parameter.y_dc_delta_q;
782
result.u_dc_delta_q = pic->picture_parameter.u_dc_delta_q;
783
result.v_dc_delta_q = pic->picture_parameter.v_dc_delta_q;
784
result.u_ac_delta_q = pic->picture_parameter.u_ac_delta_q;
785
result.v_ac_delta_q = pic->picture_parameter.v_ac_delta_q;
786
result.qm_y = pic->picture_parameter.qmatrix_fields.qm_y | 0xf0;
787
result.qm_u = pic->picture_parameter.qmatrix_fields.qm_u | 0xf0;
788
result.qm_v = pic->picture_parameter.qmatrix_fields.qm_v | 0xf0;
789
result.delta_q_res = 1 << pic->picture_parameter.mode_control_fields.log2_delta_q_res;
790
result.delta_lf_res = 1 << pic->picture_parameter.mode_control_fields.log2_delta_lf_res;
791
792
result.tile_cols = pic->picture_parameter.tile_cols;
793
result.tile_rows = pic->picture_parameter.tile_rows;
794
result.tx_mode = pic->picture_parameter.mode_control_fields.tx_mode;
795
result.reference_mode = (pic->picture_parameter.mode_control_fields.reference_select == 1) ? 2 : 0;
796
result.chroma_format = pic->picture_parameter.seq_info_fields.mono_chrome ? 0 : 1;
797
result.tile_size_bytes = 0xff;
798
result.context_update_tile_id = pic->picture_parameter.context_update_tile_id;
799
for (i = 0; i < 65; ++i) {
800
result.tile_col_start_sb[i] = pic->picture_parameter.tile_col_start_sb[i];
801
result.tile_row_start_sb[i] = pic->picture_parameter.tile_row_start_sb[i];
802
}
803
result.max_width = pic->picture_parameter.max_width;
804
result.max_height = pic->picture_parameter.max_height;
805
if (pic->picture_parameter.pic_info_fields.use_superres) {
806
result.width = (pic->picture_parameter.frame_width * 8 + pic->picture_parameter.superres_scale_denominator / 2) /
807
pic->picture_parameter.superres_scale_denominator;
808
result.superres_scale_denominator = pic->picture_parameter.superres_scale_denominator;
809
} else {
810
result.width = pic->picture_parameter.frame_width;
811
result.superres_scale_denominator = pic->picture_parameter.superres_scale_denominator;
812
}
813
result.height = pic->picture_parameter.frame_height;
814
result.superres_upscaled_width = pic->picture_parameter.frame_width;
815
result.order_hint_bits = pic->picture_parameter.order_hint_bits_minus_1 + 1;
816
817
for (i = 0; i < NUM_AV1_REFS; ++i) {
818
result.ref_frame_map[i] =
819
(pic->ref[i]) ? (uintptr_t)vl_video_buffer_get_associated_data(pic->ref[i], &dec->base)
820
: 0x7f;
821
}
822
for (i = 0; i < NUM_AV1_REFS_PER_FRAME; ++i)
823
result.frame_refs[i] = result.ref_frame_map[pic->picture_parameter.ref_frame_idx[i]];
824
825
result.bit_depth_luma_minus8 = result.bit_depth_chroma_minus8 = pic->picture_parameter.bit_depth_idx << 1;
826
827
for (i = 0; i < 8; ++i) {
828
for (j = 0; j < 8; ++j)
829
result.feature_data[i][j] = pic->picture_parameter.seg_info.feature_data[i][j];
830
result.feature_mask[i] = pic->picture_parameter.seg_info.feature_mask[i];
831
}
832
memcpy(dec->probs, &pic->picture_parameter.seg_info.feature_data, 128);
833
memcpy((dec->probs + 128), &pic->picture_parameter.seg_info.feature_mask, 8);
834
835
result.cdef_damping = pic->picture_parameter.cdef_damping_minus_3 + 3;
836
result.cdef_bits = pic->picture_parameter.cdef_bits;
837
for (i = 0; i < 8; ++i) {
838
result.cdef_strengths[i] = pic->picture_parameter.cdef_y_strengths[i];
839
result.cdef_uv_strengths[i] = pic->picture_parameter.cdef_uv_strengths[i];
840
}
841
result.frame_restoration_type[0] = pic->picture_parameter.loop_restoration_fields.yframe_restoration_type;
842
result.frame_restoration_type[1] = pic->picture_parameter.loop_restoration_fields.cbframe_restoration_type;
843
result.frame_restoration_type[2] = pic->picture_parameter.loop_restoration_fields.crframe_restoration_type;
844
for (i = 0; i < 3; ++i) {
845
int log2_num = 0;
846
int unit_size = pic->picture_parameter.lr_unit_size[i];
847
if (unit_size) {
848
while (unit_size >>= 1)
849
log2_num++;
850
result.log2_restoration_unit_size_minus5[i] = log2_num - 5;
851
} else {
852
result.log2_restoration_unit_size_minus5[i] = 0;
853
}
854
}
855
856
result.p010_mode = 0;
857
result.msb_mode = 0;
858
if (!pic->picture_parameter.bit_depth_idx) {
859
result.luma_10to8 = 0;
860
result.chroma_10to8 = 0;
861
} else {
862
result.luma_10to8 = 1;
863
result.chroma_10to8 = 1;
864
}
865
866
result.preskip_segid = 0;
867
result.last_active_segid = 0;
868
for (i = 0; i < 8; i++) {
869
for (j = 0; j < 8; j++) {
870
if (pic->picture_parameter.seg_info.feature_mask[i] & (1 << j)) {
871
result.last_active_segid = i;
872
if (j >= 5)
873
result.preskip_segid = 1;
874
}
875
}
876
}
877
878
result.seg_lossless_flag = 0;
879
for (i = 0; i < 8; ++i) {
880
int av1_get_qindex, qindex;
881
int segfeature_active = pic->picture_parameter.seg_info.feature_mask[i] & (1 << 0);
882
if (segfeature_active) {
883
int seg_qindex = pic->picture_parameter.base_qindex +
884
pic->picture_parameter.seg_info.feature_data[i][0];
885
av1_get_qindex = seg_qindex < 0 ? 0 : (seg_qindex > 255 ? 255 : seg_qindex);
886
} else {
887
av1_get_qindex = pic->picture_parameter.base_qindex;
888
}
889
qindex = pic->picture_parameter.seg_info.segment_info_fields.enabled ?
890
av1_get_qindex :
891
pic->picture_parameter.base_qindex;
892
result.seg_lossless_flag |= (((qindex == 0) && result.y_dc_delta_q == 0 &&
893
result.u_dc_delta_q == 0 && result.v_dc_delta_q == 0 &&
894
result.u_ac_delta_q == 0 && result.v_ac_delta_q == 0) << i);
895
}
896
897
rvcn_dec_film_grain_params_t* fg_params = &result.film_grain;
898
fg_params->apply_grain = pic->picture_parameter.film_grain_info.film_grain_info_fields.apply_grain;
899
if (fg_params->apply_grain) {
900
fg_params->random_seed = pic->picture_parameter.film_grain_info.grain_seed;
901
fg_params->grain_scale_shift =
902
pic->picture_parameter.film_grain_info.film_grain_info_fields.grain_scale_shift;
903
fg_params->scaling_shift =
904
pic->picture_parameter.film_grain_info.film_grain_info_fields.grain_scaling_minus_8 + 8;
905
fg_params->chroma_scaling_from_luma =
906
pic->picture_parameter.film_grain_info.film_grain_info_fields.chroma_scaling_from_luma;
907
fg_params->num_y_points = pic->picture_parameter.film_grain_info.num_y_points;
908
fg_params->num_cb_points = pic->picture_parameter.film_grain_info.num_cb_points;
909
fg_params->num_cr_points = pic->picture_parameter.film_grain_info.num_cr_points;
910
fg_params->cb_mult = pic->picture_parameter.film_grain_info.cb_mult;
911
fg_params->cb_luma_mult = pic->picture_parameter.film_grain_info.cb_luma_mult;
912
fg_params->cb_offset = pic->picture_parameter.film_grain_info.cb_offset;
913
fg_params->cr_mult = pic->picture_parameter.film_grain_info.cr_mult;
914
fg_params->cr_luma_mult = pic->picture_parameter.film_grain_info.cr_luma_mult;
915
fg_params->cr_offset = pic->picture_parameter.film_grain_info.cr_offset;
916
fg_params->bit_depth_minus_8 = pic->picture_parameter.bit_depth_idx << 1;
917
918
for (i = 0; i < fg_params->num_y_points; ++i) {
919
fg_params->scaling_points_y[i][0] = pic->picture_parameter.film_grain_info.point_y_value[i];
920
fg_params->scaling_points_y[i][1] = pic->picture_parameter.film_grain_info.point_y_scaling[i];
921
}
922
for (i = 0; i < fg_params->num_cb_points; ++i) {
923
fg_params->scaling_points_cb[i][0] = pic->picture_parameter.film_grain_info.point_cb_value[i];
924
fg_params->scaling_points_cb[i][1] = pic->picture_parameter.film_grain_info.point_cb_scaling[i];
925
}
926
for (i = 0; i < fg_params->num_cr_points; ++i) {
927
fg_params->scaling_points_cr[i][0] = pic->picture_parameter.film_grain_info.point_cr_value[i];
928
fg_params->scaling_points_cr[i][1] = pic->picture_parameter.film_grain_info.point_cr_scaling[i];
929
}
930
931
fg_params->ar_coeff_lag = pic->picture_parameter.film_grain_info.film_grain_info_fields.ar_coeff_lag;
932
fg_params->ar_coeff_shift =
933
pic->picture_parameter.film_grain_info.film_grain_info_fields.ar_coeff_shift_minus_6 + 6;
934
935
for (i = 0; i < 24; ++i)
936
fg_params->ar_coeffs_y[i] = pic->picture_parameter.film_grain_info.ar_coeffs_y[i];
937
938
for (i = 0; i < 25; ++i) {
939
fg_params->ar_coeffs_cb[i] = pic->picture_parameter.film_grain_info.ar_coeffs_cb[i];
940
fg_params->ar_coeffs_cr[i] = pic->picture_parameter.film_grain_info.ar_coeffs_cr[i];
941
}
942
943
fg_params->overlap_flag = pic->picture_parameter.film_grain_info.film_grain_info_fields.overlap_flag;
944
fg_params->clip_to_restricted_range =
945
pic->picture_parameter.film_grain_info.film_grain_info_fields.clip_to_restricted_range;
946
}
947
948
result.uncompressed_header_size = 0;
949
for (i = 0; i < 7; ++i) {
950
result.global_motion[i + 1].wmtype = (rvcn_dec_transformation_type_e)pic->picture_parameter.wm[i].wmtype;
951
for (j = 0; j < 6; ++j)
952
result.global_motion[i + 1].wmmat[j] = pic->picture_parameter.wm[i].wmmat[j];
953
}
954
for (i = 0; i < 256; ++i) {
955
result.tile_info[i].offset = pic->slice_parameter.slice_data_offset[i];
956
result.tile_info[i].size = pic->slice_parameter.slice_data_size[i];
957
}
958
959
if (dec->dpb_type == DPB_DYNAMIC_TIER_2) {
960
dec->ref_codec.bts = pic->picture_parameter.bit_depth_idx ? CODEC_10_BITS : CODEC_8_BITS;
961
dec->ref_codec.index = result.curr_pic_idx;
962
dec->ref_codec.ref_size = 8;
963
memset(dec->ref_codec.ref_list, 0x7f, sizeof(dec->ref_codec.ref_list));
964
memcpy(dec->ref_codec.ref_list, result.ref_frame_map, sizeof(result.ref_frame_map));
965
}
966
967
return result;
968
}
969
970
static void rvcn_init_mode_probs(void *prob)
971
{
972
rvcn_av1_frame_context_t * fc = (rvcn_av1_frame_context_t*)prob;
973
int i;
974
975
memcpy(fc->palette_y_size_cdf, default_palette_y_size_cdf, sizeof(default_palette_y_size_cdf));
976
memcpy(fc->palette_uv_size_cdf, default_palette_uv_size_cdf, sizeof(default_palette_uv_size_cdf));
977
memcpy(fc->palette_y_color_index_cdf, default_palette_y_color_index_cdf, sizeof(default_palette_y_color_index_cdf));
978
memcpy(fc->palette_uv_color_index_cdf, default_palette_uv_color_index_cdf, sizeof(default_palette_uv_color_index_cdf));
979
memcpy(fc->kf_y_cdf, default_kf_y_mode_cdf, sizeof(default_kf_y_mode_cdf));
980
memcpy(fc->angle_delta_cdf, default_angle_delta_cdf, sizeof(default_angle_delta_cdf));
981
memcpy(fc->comp_inter_cdf, default_comp_inter_cdf, sizeof(default_comp_inter_cdf));
982
memcpy(fc->comp_ref_type_cdf, default_comp_ref_type_cdf,sizeof(default_comp_ref_type_cdf));
983
memcpy(fc->uni_comp_ref_cdf, default_uni_comp_ref_cdf, sizeof(default_uni_comp_ref_cdf));
984
memcpy(fc->palette_y_mode_cdf, default_palette_y_mode_cdf, sizeof(default_palette_y_mode_cdf));
985
memcpy(fc->palette_uv_mode_cdf, default_palette_uv_mode_cdf, sizeof(default_palette_uv_mode_cdf));
986
memcpy(fc->comp_ref_cdf, default_comp_ref_cdf, sizeof(default_comp_ref_cdf));
987
memcpy(fc->comp_bwdref_cdf, default_comp_bwdref_cdf, sizeof(default_comp_bwdref_cdf));
988
memcpy(fc->single_ref_cdf, default_single_ref_cdf, sizeof(default_single_ref_cdf));
989
memcpy(fc->txfm_partition_cdf, default_txfm_partition_cdf, sizeof(default_txfm_partition_cdf));
990
memcpy(fc->compound_index_cdf, default_compound_idx_cdfs, sizeof(default_compound_idx_cdfs));
991
memcpy(fc->comp_group_idx_cdf, default_comp_group_idx_cdfs, sizeof(default_comp_group_idx_cdfs));
992
memcpy(fc->newmv_cdf, default_newmv_cdf, sizeof(default_newmv_cdf));
993
memcpy(fc->zeromv_cdf, default_zeromv_cdf, sizeof(default_zeromv_cdf));
994
memcpy(fc->refmv_cdf, default_refmv_cdf, sizeof(default_refmv_cdf));
995
memcpy(fc->drl_cdf, default_drl_cdf, sizeof(default_drl_cdf));
996
memcpy(fc->motion_mode_cdf, default_motion_mode_cdf, sizeof(default_motion_mode_cdf));
997
memcpy(fc->obmc_cdf, default_obmc_cdf, sizeof(default_obmc_cdf));
998
memcpy(fc->inter_compound_mode_cdf, default_inter_compound_mode_cdf, sizeof(default_inter_compound_mode_cdf));
999
memcpy(fc->compound_type_cdf, default_compound_type_cdf, sizeof(default_compound_type_cdf));
1000
memcpy(fc->wedge_idx_cdf, default_wedge_idx_cdf, sizeof(default_wedge_idx_cdf));
1001
memcpy(fc->interintra_cdf, default_interintra_cdf, sizeof(default_interintra_cdf));
1002
memcpy(fc->wedge_interintra_cdf, default_wedge_interintra_cdf, sizeof(default_wedge_interintra_cdf));
1003
memcpy(fc->interintra_mode_cdf, default_interintra_mode_cdf, sizeof(default_interintra_mode_cdf));
1004
memcpy(fc->pred_cdf, default_segment_pred_cdf, sizeof(default_segment_pred_cdf));
1005
memcpy(fc->switchable_restore_cdf, default_switchable_restore_cdf, sizeof(default_switchable_restore_cdf));
1006
memcpy(fc->wiener_restore_cdf, default_wiener_restore_cdf, sizeof(default_wiener_restore_cdf));
1007
memcpy(fc->sgrproj_restore_cdf, default_sgrproj_restore_cdf, sizeof(default_sgrproj_restore_cdf));
1008
memcpy(fc->y_mode_cdf, default_if_y_mode_cdf, sizeof(default_if_y_mode_cdf));
1009
memcpy(fc->uv_mode_cdf, default_uv_mode_cdf, sizeof(default_uv_mode_cdf));
1010
memcpy(fc->switchable_interp_cdf, default_switchable_interp_cdf, sizeof(default_switchable_interp_cdf));
1011
memcpy(fc->partition_cdf, default_partition_cdf, sizeof(default_partition_cdf));
1012
memcpy(fc->intra_ext_tx_cdf, default_intra_ext_tx_cdf, sizeof(default_intra_ext_tx_cdf));
1013
memcpy(fc->inter_ext_tx_cdf, default_inter_ext_tx_cdf, sizeof(default_inter_ext_tx_cdf));
1014
memcpy(fc->skip_cdfs, default_skip_cdfs, sizeof(default_skip_cdfs));
1015
memcpy(fc->intra_inter_cdf, default_intra_inter_cdf, sizeof(default_intra_inter_cdf));
1016
memcpy(fc->tree_cdf, default_seg_tree_cdf, sizeof(default_seg_tree_cdf));
1017
for (i = 0; i < SPATIAL_PREDICTION_PROBS; ++i)
1018
memcpy(fc->spatial_pred_seg_cdf[i], default_spatial_pred_seg_tree_cdf[i], sizeof(default_spatial_pred_seg_tree_cdf[i]));
1019
memcpy(fc->tx_size_cdf, default_tx_size_cdf, sizeof(default_tx_size_cdf));
1020
memcpy(fc->delta_q_cdf, default_delta_q_cdf, sizeof(default_delta_q_cdf));
1021
memcpy(fc->skip_mode_cdfs, default_skip_mode_cdfs, sizeof(default_skip_mode_cdfs));
1022
memcpy(fc->delta_lf_cdf, default_delta_lf_cdf, sizeof(default_delta_lf_cdf));
1023
memcpy(fc->delta_lf_multi_cdf, default_delta_lf_multi_cdf, sizeof(default_delta_lf_multi_cdf));
1024
memcpy(fc->cfl_sign_cdf, default_cfl_sign_cdf, sizeof(default_cfl_sign_cdf));
1025
memcpy(fc->cfl_alpha_cdf, default_cfl_alpha_cdf, sizeof(default_cfl_alpha_cdf));
1026
memcpy(fc->filter_intra_cdfs, default_filter_intra_cdfs, sizeof(default_filter_intra_cdfs));
1027
memcpy(fc->filter_intra_mode_cdf, default_filter_intra_mode_cdf, sizeof(default_filter_intra_mode_cdf));
1028
memcpy(fc->intrabc_cdf, default_intrabc_cdf, sizeof(default_intrabc_cdf));
1029
}
1030
1031
static void rvcn_av1_init_mv_probs(void *prob)
1032
{
1033
rvcn_av1_frame_context_t * fc = (rvcn_av1_frame_context_t*)prob;
1034
1035
memcpy(fc->nmvc_joints_cdf, default_nmv_context.joints_cdf, sizeof(default_nmv_context.joints_cdf));
1036
memcpy(fc->nmvc_0_bits_cdf, default_nmv_context.comps[0].bits_cdf, sizeof(default_nmv_context.comps[0].bits_cdf));
1037
memcpy(fc->nmvc_0_class0_cdf, default_nmv_context.comps[0].class0_cdf, sizeof(default_nmv_context.comps[0].class0_cdf));
1038
memcpy(fc->nmvc_0_class0_fp_cdf, default_nmv_context.comps[0].class0_fp_cdf, sizeof(default_nmv_context.comps[0].class0_fp_cdf));
1039
memcpy(fc->nmvc_0_class0_hp_cdf, default_nmv_context.comps[0].class0_hp_cdf, sizeof(default_nmv_context.comps[0].class0_hp_cdf));
1040
memcpy(fc->nmvc_0_classes_cdf, default_nmv_context.comps[0].classes_cdf, sizeof(default_nmv_context.comps[0].classes_cdf));
1041
memcpy(fc->nmvc_0_fp_cdf, default_nmv_context.comps[0].fp_cdf, sizeof(default_nmv_context.comps[0].fp_cdf));
1042
memcpy(fc->nmvc_0_hp_cdf, default_nmv_context.comps[0].hp_cdf, sizeof(default_nmv_context.comps[0].hp_cdf));
1043
memcpy(fc->nmvc_0_sign_cdf, default_nmv_context.comps[0].sign_cdf, sizeof(default_nmv_context.comps[0].sign_cdf));
1044
memcpy(fc->nmvc_1_bits_cdf, default_nmv_context.comps[1].bits_cdf, sizeof(default_nmv_context.comps[1].bits_cdf));
1045
memcpy(fc->nmvc_1_class0_cdf, default_nmv_context.comps[1].class0_cdf, sizeof(default_nmv_context.comps[1].class0_cdf));
1046
memcpy(fc->nmvc_1_class0_fp_cdf, default_nmv_context.comps[1].class0_fp_cdf, sizeof(default_nmv_context.comps[1].class0_fp_cdf));
1047
memcpy(fc->nmvc_1_class0_hp_cdf, default_nmv_context.comps[1].class0_hp_cdf, sizeof(default_nmv_context.comps[1].class0_hp_cdf));
1048
memcpy(fc->nmvc_1_classes_cdf, default_nmv_context.comps[1].classes_cdf, sizeof(default_nmv_context.comps[1].classes_cdf));
1049
memcpy(fc->nmvc_1_fp_cdf, default_nmv_context.comps[1].fp_cdf, sizeof(default_nmv_context.comps[1].fp_cdf));
1050
memcpy(fc->nmvc_1_hp_cdf, default_nmv_context.comps[1].hp_cdf, sizeof(default_nmv_context.comps[1].hp_cdf));
1051
memcpy(fc->nmvc_1_sign_cdf, default_nmv_context.comps[1].sign_cdf, sizeof(default_nmv_context.comps[1].sign_cdf));
1052
memcpy(fc->ndvc_joints_cdf, default_nmv_context.joints_cdf, sizeof(default_nmv_context.joints_cdf));
1053
memcpy(fc->ndvc_0_bits_cdf, default_nmv_context.comps[0].bits_cdf, sizeof(default_nmv_context.comps[0].bits_cdf));
1054
memcpy(fc->ndvc_0_class0_cdf, default_nmv_context.comps[0].class0_cdf, sizeof(default_nmv_context.comps[0].class0_cdf));
1055
memcpy(fc->ndvc_0_class0_fp_cdf, default_nmv_context.comps[0].class0_fp_cdf, sizeof(default_nmv_context.comps[0].class0_fp_cdf));
1056
memcpy(fc->ndvc_0_class0_hp_cdf, default_nmv_context.comps[0].class0_hp_cdf, sizeof(default_nmv_context.comps[0].class0_hp_cdf));
1057
memcpy(fc->ndvc_0_classes_cdf, default_nmv_context.comps[0].classes_cdf, sizeof(default_nmv_context.comps[0].classes_cdf));
1058
memcpy(fc->ndvc_0_fp_cdf, default_nmv_context.comps[0].fp_cdf, sizeof(default_nmv_context.comps[0].fp_cdf));
1059
memcpy(fc->ndvc_0_hp_cdf, default_nmv_context.comps[0].hp_cdf, sizeof(default_nmv_context.comps[0].hp_cdf));
1060
memcpy(fc->ndvc_0_sign_cdf, default_nmv_context.comps[0].sign_cdf, sizeof(default_nmv_context.comps[0].sign_cdf));
1061
memcpy(fc->ndvc_1_bits_cdf, default_nmv_context.comps[1].bits_cdf, sizeof(default_nmv_context.comps[1].bits_cdf));
1062
memcpy(fc->ndvc_1_class0_cdf, default_nmv_context.comps[1].class0_cdf, sizeof(default_nmv_context.comps[1].class0_cdf));
1063
memcpy(fc->ndvc_1_class0_fp_cdf, default_nmv_context.comps[1].class0_fp_cdf, sizeof(default_nmv_context.comps[1].class0_fp_cdf));
1064
memcpy(fc->ndvc_1_class0_hp_cdf, default_nmv_context.comps[1].class0_hp_cdf, sizeof(default_nmv_context.comps[1].class0_hp_cdf));
1065
memcpy(fc->ndvc_1_classes_cdf, default_nmv_context.comps[1].classes_cdf, sizeof(default_nmv_context.comps[1].classes_cdf));
1066
memcpy(fc->ndvc_1_fp_cdf, default_nmv_context.comps[1].fp_cdf, sizeof(default_nmv_context.comps[1].fp_cdf));
1067
memcpy(fc->ndvc_1_hp_cdf, default_nmv_context.comps[1].hp_cdf, sizeof(default_nmv_context.comps[1].hp_cdf));
1068
memcpy(fc->ndvc_1_sign_cdf, default_nmv_context.comps[1].sign_cdf, sizeof(default_nmv_context.comps[1].sign_cdf));
1069
}
1070
1071
static void rvcn_av1_default_coef_probs(void *prob, int index)
1072
{
1073
rvcn_av1_frame_context_t * fc = (rvcn_av1_frame_context_t*)prob;
1074
1075
memcpy(fc->txb_skip_cdf, av1_default_txb_skip_cdfs[index], sizeof(av1_default_txb_skip_cdfs[index]));
1076
memcpy(fc->eob_extra_cdf, av1_default_eob_extra_cdfs[index], sizeof(av1_default_eob_extra_cdfs[index]));
1077
memcpy(fc->dc_sign_cdf, av1_default_dc_sign_cdfs[index], sizeof(av1_default_dc_sign_cdfs[index]));
1078
memcpy(fc->coeff_br_cdf, av1_default_coeff_lps_multi_cdfs[index], sizeof(av1_default_coeff_lps_multi_cdfs[index]));
1079
memcpy(fc->coeff_base_cdf, av1_default_coeff_base_multi_cdfs[index], sizeof(av1_default_coeff_base_multi_cdfs[index]));
1080
memcpy(fc->coeff_base_eob_cdf, av1_default_coeff_base_eob_multi_cdfs[index], sizeof(av1_default_coeff_base_eob_multi_cdfs[index]));
1081
memcpy(fc->eob_flag_cdf16, av1_default_eob_multi16_cdfs[index], sizeof(av1_default_eob_multi16_cdfs[index]));
1082
memcpy(fc->eob_flag_cdf32, av1_default_eob_multi32_cdfs[index], sizeof(av1_default_eob_multi32_cdfs[index]));
1083
memcpy(fc->eob_flag_cdf64, av1_default_eob_multi64_cdfs[index], sizeof(av1_default_eob_multi64_cdfs[index]));
1084
memcpy(fc->eob_flag_cdf128, av1_default_eob_multi128_cdfs[index], sizeof(av1_default_eob_multi128_cdfs[index]));
1085
memcpy(fc->eob_flag_cdf256, av1_default_eob_multi256_cdfs[index], sizeof(av1_default_eob_multi256_cdfs[index]));
1086
memcpy(fc->eob_flag_cdf512, av1_default_eob_multi512_cdfs[index], sizeof(av1_default_eob_multi512_cdfs[index]));
1087
memcpy(fc->eob_flag_cdf1024, av1_default_eob_multi1024_cdfs[index], sizeof(av1_default_eob_multi1024_cdfs[index]));
1088
}
1089
1090
static unsigned calc_ctx_size_h265_main(struct radeon_decoder *dec)
1091
{
1092
unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
1093
unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
1094
1095
unsigned max_references = dec->base.max_references + 1;
1096
1097
if (dec->base.width * dec->base.height >= 4096 * 2000)
1098
max_references = MAX2(max_references, 8);
1099
else
1100
max_references = MAX2(max_references, 17);
1101
1102
width = align(width, 16);
1103
height = align(height, 16);
1104
return ((width + 255) / 16) * ((height + 255) / 16) * 16 * max_references + 52 * 1024;
1105
}
1106
1107
static unsigned calc_ctx_size_h265_main10(struct radeon_decoder *dec,
1108
struct pipe_h265_picture_desc *pic)
1109
{
1110
unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
1111
unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
1112
unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
1113
1114
unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
1115
unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
1116
unsigned coeff_10bit =
1117
(pic->pps->sps->bit_depth_luma_minus8 || pic->pps->sps->bit_depth_chroma_minus8) ? 2 : 1;
1118
1119
unsigned max_references = dec->base.max_references + 1;
1120
1121
if (dec->base.width * dec->base.height >= 4096 * 2000)
1122
max_references = MAX2(max_references, 8);
1123
else
1124
max_references = MAX2(max_references, 17);
1125
1126
log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 +
1127
pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
1128
1129
width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
1130
height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
1131
1132
num_16x16_block_per_ctb = ((1 << log2_ctb_size) >> 4) * ((1 << log2_ctb_size) >> 4);
1133
context_buffer_size_per_ctb_row = align(width_in_ctb * num_16x16_block_per_ctb * 16, 256);
1134
max_mb_address = (unsigned)ceil(height * 8 / 2048.0);
1135
1136
cm_buffer_size = max_references * context_buffer_size_per_ctb_row * height_in_ctb;
1137
db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024);
1138
1139
return cm_buffer_size + db_left_tile_ctx_size + db_left_tile_pxl_size;
1140
}
1141
1142
static rvcn_dec_message_vc1_t get_vc1_msg(struct pipe_vc1_picture_desc *pic)
1143
{
1144
rvcn_dec_message_vc1_t result;
1145
1146
memset(&result, 0, sizeof(result));
1147
switch (pic->base.profile) {
1148
case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
1149
result.profile = RDECODE_VC1_PROFILE_SIMPLE;
1150
result.level = 1;
1151
break;
1152
1153
case PIPE_VIDEO_PROFILE_VC1_MAIN:
1154
result.profile = RDECODE_VC1_PROFILE_MAIN;
1155
result.level = 2;
1156
break;
1157
1158
case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
1159
result.profile = RDECODE_VC1_PROFILE_ADVANCED;
1160
result.level = 4;
1161
break;
1162
1163
default:
1164
assert(0);
1165
}
1166
1167
result.sps_info_flags |= pic->postprocflag << 7;
1168
result.sps_info_flags |= pic->pulldown << 6;
1169
result.sps_info_flags |= pic->interlace << 5;
1170
result.sps_info_flags |= pic->tfcntrflag << 4;
1171
result.sps_info_flags |= pic->finterpflag << 3;
1172
result.sps_info_flags |= pic->psf << 1;
1173
1174
result.pps_info_flags |= pic->range_mapy_flag << 31;
1175
result.pps_info_flags |= pic->range_mapy << 28;
1176
result.pps_info_flags |= pic->range_mapuv_flag << 27;
1177
result.pps_info_flags |= pic->range_mapuv << 24;
1178
result.pps_info_flags |= pic->multires << 21;
1179
result.pps_info_flags |= pic->maxbframes << 16;
1180
result.pps_info_flags |= pic->overlap << 11;
1181
result.pps_info_flags |= pic->quantizer << 9;
1182
result.pps_info_flags |= pic->panscan_flag << 7;
1183
result.pps_info_flags |= pic->refdist_flag << 6;
1184
result.pps_info_flags |= pic->vstransform << 0;
1185
1186
if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
1187
result.pps_info_flags |= pic->syncmarker << 20;
1188
result.pps_info_flags |= pic->rangered << 19;
1189
result.pps_info_flags |= pic->loopfilter << 5;
1190
result.pps_info_flags |= pic->fastuvmc << 4;
1191
result.pps_info_flags |= pic->extended_mv << 3;
1192
result.pps_info_flags |= pic->extended_dmv << 8;
1193
result.pps_info_flags |= pic->dquant << 1;
1194
}
1195
1196
result.chroma_format = 1;
1197
1198
return result;
1199
}
1200
1201
static uint32_t get_ref_pic_idx(struct radeon_decoder *dec, struct pipe_video_buffer *ref)
1202
{
1203
uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
1204
uint32_t max = MAX2(dec->frame_number, 1) - 1;
1205
uintptr_t frame;
1206
1207
/* seems to be the most sane fallback */
1208
if (!ref)
1209
return max;
1210
1211
/* get the frame number from the associated data */
1212
frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
1213
1214
/* limit the frame number to a valid range */
1215
return MAX2(MIN2(frame, max), min);
1216
}
1217
1218
static rvcn_dec_message_mpeg2_vld_t get_mpeg2_msg(struct radeon_decoder *dec,
1219
struct pipe_mpeg12_picture_desc *pic)
1220
{
1221
const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
1222
rvcn_dec_message_mpeg2_vld_t result;
1223
unsigned i;
1224
1225
memset(&result, 0, sizeof(result));
1226
result.decoded_pic_idx = dec->frame_number;
1227
1228
result.forward_ref_pic_idx = get_ref_pic_idx(dec, pic->ref[0]);
1229
result.backward_ref_pic_idx = get_ref_pic_idx(dec, pic->ref[1]);
1230
1231
if (pic->intra_matrix) {
1232
result.load_intra_quantiser_matrix = 1;
1233
for (i = 0; i < 64; ++i) {
1234
result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
1235
}
1236
}
1237
if (pic->non_intra_matrix) {
1238
result.load_nonintra_quantiser_matrix = 1;
1239
for (i = 0; i < 64; ++i) {
1240
result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
1241
}
1242
}
1243
1244
result.profile_and_level_indication = 0;
1245
result.chroma_format = 0x1;
1246
1247
result.picture_coding_type = pic->picture_coding_type;
1248
result.f_code[0][0] = pic->f_code[0][0] + 1;
1249
result.f_code[0][1] = pic->f_code[0][1] + 1;
1250
result.f_code[1][0] = pic->f_code[1][0] + 1;
1251
result.f_code[1][1] = pic->f_code[1][1] + 1;
1252
result.intra_dc_precision = pic->intra_dc_precision;
1253
result.pic_structure = pic->picture_structure;
1254
result.top_field_first = pic->top_field_first;
1255
result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
1256
result.concealment_motion_vectors = pic->concealment_motion_vectors;
1257
result.q_scale_type = pic->q_scale_type;
1258
result.intra_vlc_format = pic->intra_vlc_format;
1259
result.alternate_scan = pic->alternate_scan;
1260
1261
return result;
1262
}
1263
1264
static rvcn_dec_message_mpeg4_asp_vld_t get_mpeg4_msg(struct radeon_decoder *dec,
1265
struct pipe_mpeg4_picture_desc *pic)
1266
{
1267
rvcn_dec_message_mpeg4_asp_vld_t result;
1268
unsigned i;
1269
1270
memset(&result, 0, sizeof(result));
1271
result.decoded_pic_idx = dec->frame_number;
1272
1273
result.forward_ref_pic_idx = get_ref_pic_idx(dec, pic->ref[0]);
1274
result.backward_ref_pic_idx = get_ref_pic_idx(dec, pic->ref[1]);
1275
1276
result.variant_type = 0;
1277
result.profile_and_level_indication = 0xF0;
1278
1279
result.video_object_layer_verid = 0x5;
1280
result.video_object_layer_shape = 0x0;
1281
1282
result.video_object_layer_width = dec->base.width;
1283
result.video_object_layer_height = dec->base.height;
1284
1285
result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
1286
1287
result.short_video_header = pic->short_video_header;
1288
result.interlaced = pic->interlaced;
1289
result.load_intra_quant_mat = 1;
1290
result.load_nonintra_quant_mat = 1;
1291
result.quarter_sample = pic->quarter_sample;
1292
result.complexity_estimation_disable = 1;
1293
result.resync_marker_disable = pic->resync_marker_disable;
1294
result.newpred_enable = 0;
1295
result.reduced_resolution_vop_enable = 0;
1296
1297
result.quant_type = pic->quant_type;
1298
1299
for (i = 0; i < 64; ++i) {
1300
result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
1301
result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
1302
}
1303
1304
return result;
1305
}
1306
1307
static void rvcn_dec_message_create(struct radeon_decoder *dec)
1308
{
1309
rvcn_dec_message_header_t *header = dec->msg;
1310
rvcn_dec_message_create_t *create = dec->msg + sizeof(rvcn_dec_message_header_t);
1311
unsigned sizes = sizeof(rvcn_dec_message_header_t) + sizeof(rvcn_dec_message_create_t);
1312
1313
memset(dec->msg, 0, sizes);
1314
header->header_size = sizeof(rvcn_dec_message_header_t);
1315
header->total_size = sizes;
1316
header->num_buffers = 1;
1317
header->msg_type = RDECODE_MSG_CREATE;
1318
header->stream_handle = dec->stream_handle;
1319
header->status_report_feedback_number = 0;
1320
1321
header->index[0].message_id = RDECODE_MESSAGE_CREATE;
1322
header->index[0].offset = sizeof(rvcn_dec_message_header_t);
1323
header->index[0].size = sizeof(rvcn_dec_message_create_t);
1324
header->index[0].filled = 0;
1325
1326
create->stream_type = dec->stream_type;
1327
create->session_flags = 0;
1328
create->width_in_samples = dec->base.width;
1329
create->height_in_samples = dec->base.height;
1330
}
1331
1332
static unsigned rvcn_dec_dynamic_dpb_t2_message(struct radeon_decoder *dec, rvcn_dec_message_decode_t *decode,
1333
rvcn_dec_message_dynamic_dpb_t2_t *dynamic_dpb_t2)
1334
{
1335
struct rvcn_dec_dynamic_dpb_t2 *dpb = NULL;
1336
unsigned width, height, size;
1337
uint64_t addr;
1338
int i;
1339
1340
width = align(decode->width_in_samples, dec->db_alignment);
1341
height = align(decode->height_in_samples, dec->db_alignment);
1342
size = align((width * height * 3) / 2, 256);
1343
if (dec->ref_codec.bts == CODEC_10_BITS)
1344
size = size * 3 / 2;
1345
1346
list_for_each_entry_safe(struct rvcn_dec_dynamic_dpb_t2, d, &dec->dpb_ref_list, list) {
1347
for (i = 0; i < dec->ref_codec.ref_size; ++i) {
1348
if ((dec->ref_codec.ref_list[i] != 0x7f) && (d->index == (dec->ref_codec.ref_list[i] & 0x7f))) {
1349
addr = dec->ws->buffer_get_virtual_address(d->dpb.res->buf);
1350
dynamic_dpb_t2->dpbAddrLo[i] = addr;
1351
dynamic_dpb_t2->dpbAddrHi[i] = addr >> 32;
1352
++dynamic_dpb_t2->dpbArraySize;
1353
break;
1354
}
1355
}
1356
if (i == dec->ref_codec.ref_size) {
1357
list_del(&d->list);
1358
list_addtail(&d->list, &dec->dpb_unref_list);
1359
}
1360
}
1361
1362
list_for_each_entry_safe(struct rvcn_dec_dynamic_dpb_t2, d, &dec->dpb_ref_list, list) {
1363
if (d->dpb.res->b.b.width0 * d->dpb.res->b.b.height0 == size && d->index == dec->ref_codec.index) {
1364
dpb = d;
1365
break;
1366
}
1367
}
1368
1369
if (!dpb) {
1370
list_for_each_entry_safe(struct rvcn_dec_dynamic_dpb_t2, d, &dec->dpb_unref_list, list) {
1371
if (d->dpb.res->b.b.width0 * d->dpb.res->b.b.height0 == size) {
1372
d->index = dec->ref_codec.index;
1373
list_del(&d->list);
1374
list_addtail(&d->list, &dec->dpb_ref_list);
1375
dpb = d;
1376
break;
1377
}
1378
}
1379
}
1380
1381
list_for_each_entry_safe(struct rvcn_dec_dynamic_dpb_t2, d, &dec->dpb_unref_list, list) {
1382
list_del(&d->list);
1383
si_vid_destroy_buffer(&d->dpb);
1384
FREE(d);
1385
}
1386
1387
if (!dpb) {
1388
dpb = CALLOC_STRUCT(rvcn_dec_dynamic_dpb_t2);
1389
if (!dpb)
1390
return 1;
1391
dpb->index = dec->ref_codec.index;
1392
if (!si_vid_create_buffer(dec->screen, &dpb->dpb, size, PIPE_USAGE_DEFAULT)) {
1393
RVID_ERR("Can't allocated dpb buffer.\n");
1394
FREE(dpb);
1395
return 1;
1396
}
1397
list_addtail(&dpb->list, &dec->dpb_ref_list);
1398
}
1399
1400
dec->ws->cs_add_buffer(&dec->cs, dpb->dpb.res->buf,
1401
RADEON_USAGE_READWRITE | RADEON_USAGE_SYNCHRONIZED, RADEON_DOMAIN_VRAM, 0);
1402
addr = dec->ws->buffer_get_virtual_address(dpb->dpb.res->buf);
1403
dynamic_dpb_t2->dpbCurrLo = addr;
1404
dynamic_dpb_t2->dpbCurrHi = addr >> 32;
1405
1406
decode->decode_flags = 1;
1407
dynamic_dpb_t2->dpbConfigFlags = 0;
1408
dynamic_dpb_t2->dpbLumaPitch = align(decode->width_in_samples, dec->db_alignment);
1409
dynamic_dpb_t2->dpbLumaAlignedHeight = align(decode->height_in_samples, dec->db_alignment);
1410
dynamic_dpb_t2->dpbLumaAlignedSize = dynamic_dpb_t2->dpbLumaPitch *
1411
dynamic_dpb_t2->dpbLumaAlignedHeight;
1412
dynamic_dpb_t2->dpbChromaPitch = dynamic_dpb_t2->dpbLumaPitch >> 1;
1413
dynamic_dpb_t2->dpbChromaAlignedHeight = dynamic_dpb_t2->dpbLumaAlignedHeight >> 1;
1414
dynamic_dpb_t2->dpbChromaAlignedSize = dynamic_dpb_t2->dpbChromaPitch *
1415
dynamic_dpb_t2->dpbChromaAlignedHeight * 2;
1416
1417
if (dec->ref_codec.bts == CODEC_10_BITS) {
1418
dynamic_dpb_t2->dpbLumaAlignedSize = dynamic_dpb_t2->dpbLumaAlignedSize * 3 / 2;
1419
dynamic_dpb_t2->dpbChromaAlignedSize = dynamic_dpb_t2->dpbChromaAlignedSize * 3 / 2;
1420
}
1421
1422
return 0;
1423
}
1424
1425
static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
1426
struct pipe_video_buffer *target,
1427
struct pipe_picture_desc *picture)
1428
{
1429
DECRYPT_PARAMETERS *decrypt = (DECRYPT_PARAMETERS *)picture->decrypt_key;
1430
bool encrypted = (DECRYPT_PARAMETERS *)picture->protected_playback;
1431
struct si_texture *luma = (struct si_texture *)((struct vl_video_buffer *)target)->resources[0];
1432
struct si_texture *chroma =
1433
(struct si_texture *)((struct vl_video_buffer *)target)->resources[1];
1434
ASSERTED struct si_screen *sscreen = (struct si_screen *)dec->screen;
1435
rvcn_dec_message_header_t *header;
1436
rvcn_dec_message_index_t *index_codec;
1437
rvcn_dec_message_index_t *index_drm = NULL;
1438
rvcn_dec_message_index_t *index_dynamic_dpb = NULL;
1439
rvcn_dec_message_decode_t *decode;
1440
unsigned sizes = 0, offset_decode, offset_codec;
1441
unsigned offset_drm = 0, offset_dynamic_dpb = 0;
1442
void *codec;
1443
rvcn_dec_message_drm_t *drm = NULL;
1444
rvcn_dec_message_dynamic_dpb_t *dynamic_dpb = NULL;
1445
rvcn_dec_message_dynamic_dpb_t2_t *dynamic_dpb_t2 = NULL;
1446
1447
header = dec->msg;
1448
sizes += sizeof(rvcn_dec_message_header_t);
1449
1450
index_codec = (void*)header + sizes;
1451
sizes += sizeof(rvcn_dec_message_index_t);
1452
1453
if (encrypted) {
1454
index_drm = (void*)header + sizes;
1455
sizes += sizeof(rvcn_dec_message_index_t);
1456
}
1457
1458
if (dec->dpb_type >= DPB_DYNAMIC_TIER_1) {
1459
index_dynamic_dpb = (void*)header + sizes;
1460
sizes += sizeof(rvcn_dec_message_index_t);
1461
}
1462
1463
offset_decode = sizes;
1464
decode = (void*)header + sizes;
1465
sizes += sizeof(rvcn_dec_message_decode_t);
1466
1467
if (encrypted) {
1468
offset_drm = sizes;
1469
drm = (void*)header + sizes;
1470
sizes += sizeof(rvcn_dec_message_drm_t);
1471
}
1472
1473
if (dec->dpb_type >= DPB_DYNAMIC_TIER_1) {
1474
offset_dynamic_dpb = sizes;
1475
if (dec->dpb_type == DPB_DYNAMIC_TIER_1) {
1476
dynamic_dpb = (void*)header + sizes;
1477
sizes += sizeof(rvcn_dec_message_dynamic_dpb_t);
1478
}
1479
else if (dec->dpb_type == DPB_DYNAMIC_TIER_2) {
1480
dynamic_dpb_t2 = (void*)header + sizes;
1481
sizes += sizeof(rvcn_dec_message_dynamic_dpb_t2_t);
1482
}
1483
}
1484
1485
offset_codec = sizes;
1486
codec = (void*)header + sizes;
1487
1488
memset(dec->msg, 0, sizes);
1489
header->header_size = sizeof(rvcn_dec_message_header_t);
1490
header->total_size = sizes;
1491
header->msg_type = RDECODE_MSG_DECODE;
1492
header->stream_handle = dec->stream_handle;
1493
header->status_report_feedback_number = dec->frame_number;
1494
1495
header->index[0].message_id = RDECODE_MESSAGE_DECODE;
1496
header->index[0].offset = offset_decode;
1497
header->index[0].size = sizeof(rvcn_dec_message_decode_t);
1498
header->index[0].filled = 0;
1499
header->num_buffers = 1;
1500
1501
index_codec->offset = offset_codec;
1502
index_codec->size = sizeof(rvcn_dec_message_avc_t);
1503
index_codec->filled = 0;
1504
++header->num_buffers;
1505
1506
if (encrypted) {
1507
index_drm->message_id = RDECODE_MESSAGE_DRM;
1508
index_drm->offset = offset_drm;
1509
index_drm->size = sizeof(rvcn_dec_message_drm_t);
1510
index_drm->filled = 0;
1511
++header->num_buffers;
1512
}
1513
1514
if (dec->dpb_type >= DPB_DYNAMIC_TIER_1) {
1515
index_dynamic_dpb->message_id = RDECODE_MESSAGE_DYNAMIC_DPB;
1516
index_dynamic_dpb->offset = offset_dynamic_dpb;
1517
index_dynamic_dpb->filled = 0;
1518
++header->num_buffers;
1519
if (dec->dpb_type == DPB_DYNAMIC_TIER_1)
1520
index_dynamic_dpb->size = sizeof(rvcn_dec_message_dynamic_dpb_t);
1521
else if (dec->dpb_type == DPB_DYNAMIC_TIER_2)
1522
index_dynamic_dpb->size = sizeof(rvcn_dec_message_dynamic_dpb_t2_t);
1523
}
1524
1525
decode->stream_type = dec->stream_type;
1526
decode->decode_flags = 0;
1527
decode->width_in_samples = dec->base.width;
1528
decode->height_in_samples = dec->base.height;
1529
1530
decode->bsd_size = align(dec->bs_size, 128);
1531
1532
if (!dec->dpb.res && dec->dpb_type != DPB_DYNAMIC_TIER_2) {
1533
bool r;
1534
if (dec->dpb_size) {
1535
if (encrypted) {
1536
r = si_vid_create_tmz_buffer(dec->screen, &dec->dpb, dec->dpb_size, PIPE_USAGE_DEFAULT);
1537
} else {
1538
r = si_vid_create_buffer(dec->screen, &dec->dpb, dec->dpb_size, PIPE_USAGE_DEFAULT);
1539
}
1540
assert(encrypted == (bool)(dec->dpb.res->flags & RADEON_FLAG_ENCRYPTED));
1541
if (!r) {
1542
RVID_ERR("Can't allocated dpb.\n");
1543
return NULL;
1544
}
1545
si_vid_clear_buffer(dec->base.context, &dec->dpb);
1546
}
1547
}
1548
1549
if (!dec->ctx.res) {
1550
enum pipe_video_format fmt = u_reduce_video_profile(picture->profile);
1551
if (dec->stream_type == RDECODE_CODEC_H264_PERF) {
1552
unsigned ctx_size = calc_ctx_size_h264_perf(dec);
1553
bool r;
1554
if (encrypted && dec->tmz_ctx) {
1555
r = si_vid_create_tmz_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT);
1556
} else {
1557
r = si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT);
1558
}
1559
assert((encrypted && dec->tmz_ctx) == (bool)(dec->ctx.res->flags & RADEON_FLAG_ENCRYPTED));
1560
1561
if (!r) {
1562
RVID_ERR("Can't allocated context buffer.\n");
1563
return NULL;
1564
}
1565
si_vid_clear_buffer(dec->base.context, &dec->ctx);
1566
} else if (fmt == PIPE_VIDEO_FORMAT_VP9) {
1567
unsigned ctx_size;
1568
uint8_t *ptr;
1569
bool r;
1570
1571
/* default probability + probability data */
1572
ctx_size = 2304 * 5;
1573
1574
if (((struct si_screen *)dec->screen)->info.family >= CHIP_RENOIR) {
1575
/* SRE collocated context data */
1576
ctx_size += 32 * 2 * 128 * 68;
1577
/* SMP collocated context data */
1578
ctx_size += 9 * 64 * 2 * 128 * 68;
1579
/* SDB left tile pixel */
1580
ctx_size += 8 * 2 * 2 * 8192;
1581
} else {
1582
ctx_size += 32 * 2 * 64 * 64;
1583
ctx_size += 9 * 64 * 2 * 64 * 64;
1584
ctx_size += 8 * 2 * 4096;
1585
}
1586
1587
if (dec->base.profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2)
1588
ctx_size += 8 * 2 * 4096;
1589
1590
if (encrypted && dec->tmz_ctx) {
1591
r = si_vid_create_tmz_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT);
1592
} else {
1593
r = si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT);
1594
}
1595
if (!r) {
1596
RVID_ERR("Can't allocated context buffer.\n");
1597
return NULL;
1598
}
1599
si_vid_clear_buffer(dec->base.context, &dec->ctx);
1600
1601
/* ctx needs probs table */
1602
ptr = dec->ws->buffer_map(dec->ws, dec->ctx.res->buf, &dec->cs,
1603
PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
1604
fill_probs_table(ptr);
1605
dec->ws->buffer_unmap(dec->ws, dec->ctx.res->buf);
1606
dec->bs_ptr = NULL;
1607
} else if (fmt == PIPE_VIDEO_FORMAT_HEVC) {
1608
unsigned ctx_size;
1609
bool r;
1610
if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
1611
ctx_size = calc_ctx_size_h265_main10(dec, (struct pipe_h265_picture_desc *)picture);
1612
else
1613
ctx_size = calc_ctx_size_h265_main(dec);
1614
1615
if (encrypted && dec->tmz_ctx) {
1616
r = si_vid_create_tmz_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT);
1617
} else {
1618
r = si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT);
1619
}
1620
if (!r) {
1621
RVID_ERR("Can't allocated context buffer.\n");
1622
return NULL;
1623
}
1624
si_vid_clear_buffer(dec->base.context, &dec->ctx);
1625
}
1626
}
1627
if (encrypted != dec->ws->cs_is_secure(&dec->cs)) {
1628
dec->ws->cs_flush(&dec->cs, RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION, NULL);
1629
}
1630
1631
decode->dpb_size = (dec->dpb_type != DPB_DYNAMIC_TIER_2) ? dec->dpb.res->buf->size : 0;
1632
decode->dt_size = si_resource(((struct vl_video_buffer *)target)->resources[0])->buf->size +
1633
si_resource(((struct vl_video_buffer *)target)->resources[1])->buf->size;
1634
1635
decode->sct_size = 0;
1636
decode->sc_coeff_size = 0;
1637
1638
decode->sw_ctxt_size = RDECODE_SESSION_CONTEXT_SIZE;
1639
decode->db_pitch = align(dec->base.width, dec->db_alignment);
1640
1641
if (((struct si_screen*)dec->screen)->info.family >= CHIP_SIENNA_CICHLID &&
1642
(dec->stream_type == RDECODE_CODEC_VP9 || dec->stream_type == RDECODE_CODEC_AV1 ||
1643
dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10))
1644
decode->db_aligned_height = align(dec->base.height, 64);
1645
1646
decode->db_surf_tile_config = 0;
1647
1648
decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w;
1649
decode->dt_uv_pitch = chroma->surface.u.gfx9.surf_pitch * chroma->surface.blk_w;
1650
1651
if (luma->surface.meta_offset) {
1652
RVID_ERR("DCC surfaces not supported.\n");
1653
return NULL;
1654
}
1655
1656
decode->dt_tiling_mode = 0;
1657
decode->dt_swizzle_mode = luma->surface.u.gfx9.swizzle_mode;
1658
decode->dt_array_mode = RDECODE_ARRAY_MODE_LINEAR;
1659
decode->dt_field_mode = ((struct vl_video_buffer *)target)->base.interlaced;
1660
decode->dt_surf_tile_config = 0;
1661
decode->dt_uv_surf_tile_config = 0;
1662
1663
decode->dt_luma_top_offset = luma->surface.u.gfx9.surf_offset;
1664
decode->dt_chroma_top_offset = chroma->surface.u.gfx9.surf_offset;
1665
if (decode->dt_field_mode) {
1666
decode->dt_luma_bottom_offset =
1667
luma->surface.u.gfx9.surf_offset + luma->surface.u.gfx9.surf_slice_size;
1668
decode->dt_chroma_bottom_offset =
1669
chroma->surface.u.gfx9.surf_offset + chroma->surface.u.gfx9.surf_slice_size;
1670
} else {
1671
decode->dt_luma_bottom_offset = decode->dt_luma_top_offset;
1672
decode->dt_chroma_bottom_offset = decode->dt_chroma_top_offset;
1673
}
1674
if (dec->stream_type == RDECODE_CODEC_AV1)
1675
decode->db_pitch_uv = chroma->surface.u.gfx9.surf_pitch * chroma->surface.blk_w;
1676
1677
if (encrypted) {
1678
assert(sscreen->info.has_tmz_support);
1679
set_drm_keys(drm, decrypt);
1680
}
1681
1682
if (dec->dpb_type == DPB_DYNAMIC_TIER_1) {
1683
decode->decode_flags = 1;
1684
dynamic_dpb->dpbArraySize = NUM_VP9_REFS + 1;
1685
dynamic_dpb->dpbLumaPitch = align(decode->width_in_samples, dec->db_alignment);
1686
dynamic_dpb->dpbLumaAlignedHeight = align(decode->height_in_samples, dec->db_alignment);
1687
dynamic_dpb->dpbLumaAlignedSize =
1688
dynamic_dpb->dpbLumaPitch * dynamic_dpb->dpbLumaAlignedHeight;
1689
dynamic_dpb->dpbChromaPitch = dynamic_dpb->dpbLumaPitch >> 1;
1690
dynamic_dpb->dpbChromaAlignedHeight = dynamic_dpb->dpbLumaAlignedHeight >> 1;
1691
dynamic_dpb->dpbChromaAlignedSize =
1692
dynamic_dpb->dpbChromaPitch * dynamic_dpb->dpbChromaAlignedHeight * 2;
1693
dynamic_dpb->dpbReserved0[0] = dec->db_alignment;
1694
1695
if (dec->base.profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2) {
1696
dynamic_dpb->dpbLumaAlignedSize = dynamic_dpb->dpbLumaAlignedSize * 3 / 2;
1697
dynamic_dpb->dpbChromaAlignedSize = dynamic_dpb->dpbChromaAlignedSize * 3 / 2;
1698
}
1699
}
1700
1701
switch (u_reduce_video_profile(picture->profile)) {
1702
case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
1703
rvcn_dec_message_avc_t avc = get_h264_msg(dec, (struct pipe_h264_picture_desc *)picture);
1704
memcpy(codec, (void *)&avc, sizeof(rvcn_dec_message_avc_t));
1705
index_codec->message_id = RDECODE_MESSAGE_AVC;
1706
break;
1707
}
1708
case PIPE_VIDEO_FORMAT_HEVC: {
1709
rvcn_dec_message_hevc_t hevc =
1710
get_h265_msg(dec, target, (struct pipe_h265_picture_desc *)picture);
1711
1712
memcpy(codec, (void *)&hevc, sizeof(rvcn_dec_message_hevc_t));
1713
index_codec->message_id = RDECODE_MESSAGE_HEVC;
1714
break;
1715
}
1716
case PIPE_VIDEO_FORMAT_VC1: {
1717
rvcn_dec_message_vc1_t vc1 = get_vc1_msg((struct pipe_vc1_picture_desc *)picture);
1718
1719
memcpy(codec, (void *)&vc1, sizeof(rvcn_dec_message_vc1_t));
1720
if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) ||
1721
(picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) {
1722
decode->width_in_samples = align(decode->width_in_samples, 16) / 16;
1723
decode->height_in_samples = align(decode->height_in_samples, 16) / 16;
1724
}
1725
index_codec->message_id = RDECODE_MESSAGE_VC1;
1726
break;
1727
}
1728
case PIPE_VIDEO_FORMAT_MPEG12: {
1729
rvcn_dec_message_mpeg2_vld_t mpeg2 =
1730
get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc *)picture);
1731
1732
memcpy(codec, (void *)&mpeg2, sizeof(rvcn_dec_message_mpeg2_vld_t));
1733
index_codec->message_id = RDECODE_MESSAGE_MPEG2_VLD;
1734
break;
1735
}
1736
case PIPE_VIDEO_FORMAT_MPEG4: {
1737
rvcn_dec_message_mpeg4_asp_vld_t mpeg4 =
1738
get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc *)picture);
1739
1740
memcpy(codec, (void *)&mpeg4, sizeof(rvcn_dec_message_mpeg4_asp_vld_t));
1741
index_codec->message_id = RDECODE_MESSAGE_MPEG4_ASP_VLD;
1742
break;
1743
}
1744
case PIPE_VIDEO_FORMAT_VP9: {
1745
rvcn_dec_message_vp9_t vp9 =
1746
get_vp9_msg(dec, target, (struct pipe_vp9_picture_desc *)picture);
1747
1748
memcpy(codec, (void *)&vp9, sizeof(rvcn_dec_message_vp9_t));
1749
index_codec->message_id = RDECODE_MESSAGE_VP9;
1750
break;
1751
}
1752
case PIPE_VIDEO_FORMAT_AV1: {
1753
rvcn_dec_message_av1_t av1 =
1754
get_av1_msg(dec, target, (struct pipe_av1_picture_desc *)picture);
1755
1756
memcpy(codec, (void *)&av1, sizeof(rvcn_dec_message_av1_t));
1757
index_codec->message_id = RDECODE_MESSAGE_AV1;
1758
1759
if (dec->ctx.res == NULL) {
1760
unsigned ctx_size = (9 + 4) * align(sizeof(rvcn_av1_hw_frame_context_t), 2048) +
1761
9 * 64 * 34 * 512 + 9 * 64 * 34 * 256 * 5;
1762
int num_64x64_CTB_8k = 68;
1763
int num_128x128_CTB_8k = 34;
1764
int sdb_pitch_64x64 = align(32 * num_64x64_CTB_8k, 256);
1765
int sdb_pitch_128x128 = align(32 * num_128x128_CTB_8k, 256);
1766
int sdb_lf_size_ctb_64x64 = sdb_pitch_64x64 * (1728 / 32);
1767
int sdb_lf_size_ctb_128x128 = sdb_pitch_128x128 * (3008 / 32);
1768
int sdb_superres_size_ctb_64x64 = sdb_pitch_64x64 * (3232 / 32);
1769
int sdb_superres_size_ctb_128x128 = sdb_pitch_128x128 * (6208 / 32);
1770
int sdb_output_size_ctb_64x64 = sdb_pitch_64x64 * (1312 / 32);
1771
int sdb_output_size_ctb_128x128 = sdb_pitch_128x128 * (2336 / 32);
1772
int sdb_fg_avg_luma_size_ctb_64x64 = sdb_pitch_64x64 * (384 / 32);
1773
int sdb_fg_avg_luma_size_ctb_128x128 = sdb_pitch_128x128 * (640 / 32);
1774
uint8_t *ptr;
1775
int i;
1776
1777
ctx_size += (MAX2(sdb_lf_size_ctb_64x64, sdb_lf_size_ctb_128x128) +
1778
MAX2(sdb_superres_size_ctb_64x64, sdb_superres_size_ctb_128x128) +
1779
MAX2(sdb_output_size_ctb_64x64, sdb_output_size_ctb_128x128) +
1780
MAX2(sdb_fg_avg_luma_size_ctb_64x64, sdb_fg_avg_luma_size_ctb_128x128)) * 2 + 68 * 512;
1781
1782
if (!si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT))
1783
RVID_ERR("Can't allocated context buffer.\n");
1784
si_vid_clear_buffer(dec->base.context, &dec->ctx);
1785
1786
ptr = dec->ws->buffer_map(dec->ws, dec->ctx.res->buf, &dec->cs, PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
1787
1788
for (i = 0; i < 4; ++i) {
1789
rvcn_init_mode_probs((void*)(ptr + i * align(sizeof(rvcn_av1_frame_context_t), 2048)));
1790
rvcn_av1_init_mv_probs((void*)(ptr + i * align(sizeof(rvcn_av1_frame_context_t), 2048)));
1791
rvcn_av1_default_coef_probs((void*)(ptr + i * align(sizeof(rvcn_av1_frame_context_t), 2048)), i);
1792
}
1793
dec->ws->buffer_unmap(dec->ws, dec->ctx.res->buf);
1794
}
1795
1796
break;
1797
}
1798
default:
1799
assert(0);
1800
return NULL;
1801
}
1802
1803
if (dec->ctx.res)
1804
decode->hw_ctxt_size = dec->ctx.res->buf->size;
1805
1806
if (dec->dpb_type == DPB_DYNAMIC_TIER_2)
1807
if (rvcn_dec_dynamic_dpb_t2_message(dec, decode, dynamic_dpb_t2))
1808
return NULL;
1809
1810
return luma->buffer.buf;
1811
}
1812
1813
static void rvcn_dec_message_destroy(struct radeon_decoder *dec)
1814
{
1815
rvcn_dec_message_header_t *header = dec->msg;
1816
1817
memset(dec->msg, 0, sizeof(rvcn_dec_message_header_t));
1818
header->header_size = sizeof(rvcn_dec_message_header_t);
1819
header->total_size = sizeof(rvcn_dec_message_header_t) - sizeof(rvcn_dec_message_index_t);
1820
header->num_buffers = 0;
1821
header->msg_type = RDECODE_MSG_DESTROY;
1822
header->stream_handle = dec->stream_handle;
1823
header->status_report_feedback_number = 0;
1824
}
1825
1826
static void rvcn_dec_message_feedback(struct radeon_decoder *dec)
1827
{
1828
rvcn_dec_feedback_header_t *header = (void *)dec->fb;
1829
1830
header->header_size = sizeof(rvcn_dec_feedback_header_t);
1831
header->total_size = sizeof(rvcn_dec_feedback_header_t);
1832
header->num_buffers = 0;
1833
}
1834
1835
/* flush IB to the hardware */
1836
static int flush(struct radeon_decoder *dec, unsigned flags)
1837
{
1838
return dec->ws->cs_flush(&dec->cs, flags, NULL);
1839
}
1840
1841
/* add a new set register command to the IB */
1842
static void set_reg(struct radeon_decoder *dec, unsigned reg, uint32_t val)
1843
{
1844
radeon_emit(&dec->cs, RDECODE_PKT0(reg >> 2, 0));
1845
radeon_emit(&dec->cs, val);
1846
}
1847
1848
/* send a command to the VCPU through the GPCOM registers */
1849
static void send_cmd(struct radeon_decoder *dec, unsigned cmd, struct pb_buffer *buf, uint32_t off,
1850
enum radeon_bo_usage usage, enum radeon_bo_domain domain)
1851
{
1852
uint64_t addr;
1853
1854
dec->ws->cs_add_buffer(&dec->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED, domain, 0);
1855
addr = dec->ws->buffer_get_virtual_address(buf);
1856
addr = addr + off;
1857
1858
set_reg(dec, dec->reg.data0, addr);
1859
set_reg(dec, dec->reg.data1, addr >> 32);
1860
set_reg(dec, dec->reg.cmd, cmd << 1);
1861
}
1862
1863
/* do the codec needs an IT buffer ?*/
1864
static bool have_it(struct radeon_decoder *dec)
1865
{
1866
return dec->stream_type == RDECODE_CODEC_H264_PERF || dec->stream_type == RDECODE_CODEC_H265;
1867
}
1868
1869
/* do the codec needs an probs buffer? */
1870
static bool have_probs(struct radeon_decoder *dec)
1871
{
1872
return (dec->stream_type == RDECODE_CODEC_VP9 || dec->stream_type == RDECODE_CODEC_AV1);
1873
}
1874
1875
/* map the next available message/feedback/itscaling buffer */
1876
static void map_msg_fb_it_probs_buf(struct radeon_decoder *dec)
1877
{
1878
struct rvid_buffer *buf;
1879
uint8_t *ptr;
1880
1881
/* grab the current message/feedback buffer */
1882
buf = &dec->msg_fb_it_probs_buffers[dec->cur_buffer];
1883
1884
/* and map it for CPU access */
1885
ptr =
1886
dec->ws->buffer_map(dec->ws, buf->res->buf, &dec->cs, PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
1887
1888
/* calc buffer offsets */
1889
dec->msg = ptr;
1890
1891
dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET);
1892
if (have_it(dec))
1893
dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + FB_BUFFER_SIZE);
1894
else if (have_probs(dec))
1895
dec->probs = (uint8_t *)(ptr + FB_BUFFER_OFFSET + FB_BUFFER_SIZE);
1896
}
1897
1898
/* unmap and send a message command to the VCPU */
1899
static void send_msg_buf(struct radeon_decoder *dec)
1900
{
1901
struct rvid_buffer *buf;
1902
1903
/* ignore the request if message/feedback buffer isn't mapped */
1904
if (!dec->msg || !dec->fb)
1905
return;
1906
1907
/* grab the current message buffer */
1908
buf = &dec->msg_fb_it_probs_buffers[dec->cur_buffer];
1909
1910
/* unmap the buffer */
1911
dec->ws->buffer_unmap(dec->ws, buf->res->buf);
1912
dec->bs_ptr = NULL;
1913
dec->msg = NULL;
1914
dec->fb = NULL;
1915
dec->it = NULL;
1916
dec->probs = NULL;
1917
1918
if (dec->sessionctx.res)
1919
send_cmd(dec, RDECODE_CMD_SESSION_CONTEXT_BUFFER, dec->sessionctx.res->buf, 0,
1920
RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1921
1922
/* and send it to the hardware */
1923
send_cmd(dec, RDECODE_CMD_MSG_BUFFER, buf->res->buf, 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1924
}
1925
1926
/* cycle to the next set of buffers */
1927
static void next_buffer(struct radeon_decoder *dec)
1928
{
1929
++dec->cur_buffer;
1930
dec->cur_buffer %= NUM_BUFFERS;
1931
}
1932
1933
static unsigned calc_ctx_size_h264_perf(struct radeon_decoder *dec)
1934
{
1935
unsigned width_in_mb, height_in_mb, ctx_size;
1936
unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
1937
unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
1938
1939
unsigned max_references = dec->base.max_references + 1;
1940
1941
// picture width & height in 16 pixel units
1942
width_in_mb = width / VL_MACROBLOCK_WIDTH;
1943
height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
1944
1945
unsigned fs_in_mb = width_in_mb * height_in_mb;
1946
unsigned num_dpb_buffer;
1947
switch (dec->base.level) {
1948
case 30:
1949
num_dpb_buffer = 8100 / fs_in_mb;
1950
break;
1951
case 31:
1952
num_dpb_buffer = 18000 / fs_in_mb;
1953
break;
1954
case 32:
1955
num_dpb_buffer = 20480 / fs_in_mb;
1956
break;
1957
case 41:
1958
num_dpb_buffer = 32768 / fs_in_mb;
1959
break;
1960
case 42:
1961
num_dpb_buffer = 34816 / fs_in_mb;
1962
break;
1963
case 50:
1964
num_dpb_buffer = 110400 / fs_in_mb;
1965
break;
1966
case 51:
1967
num_dpb_buffer = 184320 / fs_in_mb;
1968
break;
1969
default:
1970
num_dpb_buffer = 184320 / fs_in_mb;
1971
break;
1972
}
1973
num_dpb_buffer++;
1974
max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
1975
ctx_size = max_references * align(width_in_mb * height_in_mb * 192, 256);
1976
1977
return ctx_size;
1978
}
1979
1980
/* calculate size of reference picture buffer */
1981
static unsigned calc_dpb_size(struct radeon_decoder *dec)
1982
{
1983
unsigned width_in_mb, height_in_mb, image_size, dpb_size;
1984
1985
// always align them to MB size for dpb calculation
1986
unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
1987
unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
1988
1989
// always one more for currently decoded picture
1990
unsigned max_references = dec->base.max_references + 1;
1991
1992
// aligned size of a single frame
1993
image_size = align(width, 32) * height;
1994
image_size += image_size / 2;
1995
image_size = align(image_size, 1024);
1996
1997
// picture width & height in 16 pixel units
1998
width_in_mb = width / VL_MACROBLOCK_WIDTH;
1999
height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
2000
2001
switch (u_reduce_video_profile(dec->base.profile)) {
2002
case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
2003
unsigned fs_in_mb = width_in_mb * height_in_mb;
2004
unsigned num_dpb_buffer;
2005
2006
switch (dec->base.level) {
2007
case 30:
2008
num_dpb_buffer = 8100 / fs_in_mb;
2009
break;
2010
case 31:
2011
num_dpb_buffer = 18000 / fs_in_mb;
2012
break;
2013
case 32:
2014
num_dpb_buffer = 20480 / fs_in_mb;
2015
break;
2016
case 41:
2017
num_dpb_buffer = 32768 / fs_in_mb;
2018
break;
2019
case 42:
2020
num_dpb_buffer = 34816 / fs_in_mb;
2021
break;
2022
case 50:
2023
num_dpb_buffer = 110400 / fs_in_mb;
2024
break;
2025
case 51:
2026
num_dpb_buffer = 184320 / fs_in_mb;
2027
break;
2028
default:
2029
num_dpb_buffer = 184320 / fs_in_mb;
2030
break;
2031
}
2032
num_dpb_buffer++;
2033
max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
2034
dpb_size = image_size * max_references;
2035
break;
2036
}
2037
2038
case PIPE_VIDEO_FORMAT_HEVC:
2039
if (dec->base.width * dec->base.height >= 4096 * 2000)
2040
max_references = MAX2(max_references, 8);
2041
else
2042
max_references = MAX2(max_references, 17);
2043
2044
width = align(width, 16);
2045
height = align(height, 16);
2046
if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
2047
dpb_size = align((align(width, 64) * align(height, 64) * 9) / 4, 256) * max_references;
2048
else
2049
dpb_size = align((align(width, 32) * height * 3) / 2, 256) * max_references;
2050
break;
2051
2052
case PIPE_VIDEO_FORMAT_VC1:
2053
// the firmware seems to allways assume a minimum of ref frames
2054
max_references = MAX2(NUM_VC1_REFS, max_references);
2055
2056
// reference picture buffer
2057
dpb_size = image_size * max_references;
2058
2059
// CONTEXT_BUFFER
2060
dpb_size += width_in_mb * height_in_mb * 128;
2061
2062
// IT surface buffer
2063
dpb_size += width_in_mb * 64;
2064
2065
// DB surface buffer
2066
dpb_size += width_in_mb * 128;
2067
2068
// BP
2069
dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
2070
break;
2071
2072
case PIPE_VIDEO_FORMAT_MPEG12:
2073
// reference picture buffer, must be big enough for all frames
2074
dpb_size = image_size * NUM_MPEG2_REFS;
2075
break;
2076
2077
case PIPE_VIDEO_FORMAT_MPEG4:
2078
// reference picture buffer
2079
dpb_size = image_size * max_references;
2080
2081
// CM
2082
dpb_size += width_in_mb * height_in_mb * 64;
2083
2084
// IT surface buffer
2085
dpb_size += align(width_in_mb * height_in_mb * 32, 64);
2086
2087
dpb_size = MAX2(dpb_size, 30 * 1024 * 1024);
2088
break;
2089
2090
case PIPE_VIDEO_FORMAT_VP9:
2091
max_references = MAX2(max_references, 9);
2092
2093
if (dec->dpb_type == DPB_MAX_RES)
2094
dpb_size = (((struct si_screen *)dec->screen)->info.family >= CHIP_RENOIR)
2095
? (8192 * 4320 * 3 / 2) * max_references
2096
: (4096 * 3000 * 3 / 2) * max_references;
2097
else
2098
dpb_size = (align(dec->base.width, dec->db_alignment) *
2099
align(dec->base.height, dec->db_alignment) * 3 / 2) * max_references;
2100
2101
if (dec->base.profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2)
2102
dpb_size = dpb_size * 3 / 2;
2103
break;
2104
2105
case PIPE_VIDEO_FORMAT_AV1:
2106
max_references = MAX2(max_references, 9);
2107
dpb_size = 8192 * 4320 * 3 / 2 * max_references * 3 / 2;
2108
break;
2109
2110
case PIPE_VIDEO_FORMAT_JPEG:
2111
dpb_size = 0;
2112
break;
2113
2114
default:
2115
// something is missing here
2116
assert(0);
2117
2118
// at least use a sane default value
2119
dpb_size = 32 * 1024 * 1024;
2120
break;
2121
}
2122
return dpb_size;
2123
}
2124
2125
/**
2126
* destroy this video decoder
2127
*/
2128
static void radeon_dec_destroy(struct pipe_video_codec *decoder)
2129
{
2130
struct radeon_decoder *dec = (struct radeon_decoder *)decoder;
2131
unsigned i;
2132
2133
assert(decoder);
2134
2135
map_msg_fb_it_probs_buf(dec);
2136
rvcn_dec_message_destroy(dec);
2137
send_msg_buf(dec);
2138
2139
flush(dec, 0);
2140
2141
dec->ws->cs_destroy(&dec->cs);
2142
2143
for (i = 0; i < NUM_BUFFERS; ++i) {
2144
si_vid_destroy_buffer(&dec->msg_fb_it_probs_buffers[i]);
2145
si_vid_destroy_buffer(&dec->bs_buffers[i]);
2146
}
2147
2148
if (dec->dpb_type != DPB_DYNAMIC_TIER_2) {
2149
si_vid_destroy_buffer(&dec->dpb);
2150
} else {
2151
list_for_each_entry_safe(struct rvcn_dec_dynamic_dpb_t2, d, &dec->dpb_ref_list, list) {
2152
list_del(&d->list);
2153
si_vid_destroy_buffer(&d->dpb);
2154
FREE(d);
2155
}
2156
}
2157
si_vid_destroy_buffer(&dec->ctx);
2158
si_vid_destroy_buffer(&dec->sessionctx);
2159
2160
FREE(dec);
2161
}
2162
2163
/**
2164
* start decoding of a new frame
2165
*/
2166
static void radeon_dec_begin_frame(struct pipe_video_codec *decoder,
2167
struct pipe_video_buffer *target,
2168
struct pipe_picture_desc *picture)
2169
{
2170
struct radeon_decoder *dec = (struct radeon_decoder *)decoder;
2171
uintptr_t frame;
2172
2173
assert(decoder);
2174
2175
frame = ++dec->frame_number;
2176
if (dec->stream_type != RDECODE_CODEC_VP9 && dec->stream_type != RDECODE_CODEC_AV1)
2177
vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
2178
&radeon_dec_destroy_associated_data);
2179
2180
dec->bs_size = 0;
2181
dec->bs_ptr = dec->ws->buffer_map(dec->ws, dec->bs_buffers[dec->cur_buffer].res->buf, &dec->cs,
2182
PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
2183
}
2184
2185
/**
2186
* decode a macroblock
2187
*/
2188
static void radeon_dec_decode_macroblock(struct pipe_video_codec *decoder,
2189
struct pipe_video_buffer *target,
2190
struct pipe_picture_desc *picture,
2191
const struct pipe_macroblock *macroblocks,
2192
unsigned num_macroblocks)
2193
{
2194
/* not supported (yet) */
2195
assert(0);
2196
}
2197
2198
/**
2199
* decode a bitstream
2200
*/
2201
static void radeon_dec_decode_bitstream(struct pipe_video_codec *decoder,
2202
struct pipe_video_buffer *target,
2203
struct pipe_picture_desc *picture, unsigned num_buffers,
2204
const void *const *buffers, const unsigned *sizes)
2205
{
2206
struct radeon_decoder *dec = (struct radeon_decoder *)decoder;
2207
unsigned i;
2208
2209
assert(decoder);
2210
2211
if (!dec->bs_ptr)
2212
return;
2213
2214
for (i = 0; i < num_buffers; ++i) {
2215
struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
2216
unsigned new_size = dec->bs_size + sizes[i];
2217
2218
if (new_size > buf->res->buf->size) {
2219
dec->ws->buffer_unmap(dec->ws, buf->res->buf);
2220
dec->bs_ptr = NULL;
2221
if (!si_vid_resize_buffer(dec->screen, &dec->cs, buf, new_size)) {
2222
RVID_ERR("Can't resize bitstream buffer!");
2223
return;
2224
}
2225
2226
dec->bs_ptr = dec->ws->buffer_map(dec->ws, buf->res->buf, &dec->cs,
2227
PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
2228
if (!dec->bs_ptr)
2229
return;
2230
2231
dec->bs_ptr += dec->bs_size;
2232
}
2233
2234
memcpy(dec->bs_ptr, buffers[i], sizes[i]);
2235
dec->bs_size += sizes[i];
2236
dec->bs_ptr += sizes[i];
2237
}
2238
}
2239
2240
/**
2241
* send cmd for vcn dec
2242
*/
2243
void send_cmd_dec(struct radeon_decoder *dec, struct pipe_video_buffer *target,
2244
struct pipe_picture_desc *picture)
2245
{
2246
struct pb_buffer *dt;
2247
struct rvid_buffer *msg_fb_it_probs_buf, *bs_buf;
2248
2249
msg_fb_it_probs_buf = &dec->msg_fb_it_probs_buffers[dec->cur_buffer];
2250
bs_buf = &dec->bs_buffers[dec->cur_buffer];
2251
2252
memset(dec->bs_ptr, 0, align(dec->bs_size, 128) - dec->bs_size);
2253
dec->ws->buffer_unmap(dec->ws, bs_buf->res->buf);
2254
dec->bs_ptr = NULL;
2255
2256
map_msg_fb_it_probs_buf(dec);
2257
dt = rvcn_dec_message_decode(dec, target, picture);
2258
rvcn_dec_message_feedback(dec);
2259
send_msg_buf(dec);
2260
2261
if (dec->dpb_type != DPB_DYNAMIC_TIER_2)
2262
send_cmd(dec, RDECODE_CMD_DPB_BUFFER, dec->dpb.res->buf, 0, RADEON_USAGE_READWRITE,
2263
RADEON_DOMAIN_VRAM);
2264
if (dec->ctx.res)
2265
send_cmd(dec, RDECODE_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0, RADEON_USAGE_READWRITE,
2266
RADEON_DOMAIN_VRAM);
2267
send_cmd(dec, RDECODE_CMD_BITSTREAM_BUFFER, bs_buf->res->buf, 0, RADEON_USAGE_READ,
2268
RADEON_DOMAIN_GTT);
2269
send_cmd(dec, RDECODE_CMD_DECODING_TARGET_BUFFER, dt, 0, RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
2270
send_cmd(dec, RDECODE_CMD_FEEDBACK_BUFFER, msg_fb_it_probs_buf->res->buf, FB_BUFFER_OFFSET,
2271
RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
2272
if (have_it(dec))
2273
send_cmd(dec, RDECODE_CMD_IT_SCALING_TABLE_BUFFER, msg_fb_it_probs_buf->res->buf,
2274
FB_BUFFER_OFFSET + FB_BUFFER_SIZE, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
2275
else if (have_probs(dec))
2276
send_cmd(dec, RDECODE_CMD_PROB_TBL_BUFFER, msg_fb_it_probs_buf->res->buf,
2277
FB_BUFFER_OFFSET + FB_BUFFER_SIZE, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
2278
set_reg(dec, dec->reg.cntl, 1);
2279
}
2280
2281
/**
2282
* end decoding of the current frame
2283
*/
2284
static void radeon_dec_end_frame(struct pipe_video_codec *decoder, struct pipe_video_buffer *target,
2285
struct pipe_picture_desc *picture)
2286
{
2287
struct radeon_decoder *dec = (struct radeon_decoder *)decoder;
2288
2289
assert(decoder);
2290
2291
if (!dec->bs_ptr)
2292
return;
2293
2294
dec->send_cmd(dec, target, picture);
2295
flush(dec, PIPE_FLUSH_ASYNC);
2296
next_buffer(dec);
2297
}
2298
2299
/**
2300
* flush any outstanding command buffers to the hardware
2301
*/
2302
static void radeon_dec_flush(struct pipe_video_codec *decoder)
2303
{
2304
}
2305
2306
/**
2307
* create and HW decoder
2308
*/
2309
struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
2310
const struct pipe_video_codec *templ)
2311
{
2312
struct si_context *sctx = (struct si_context *)context;
2313
struct radeon_winsys *ws = sctx->ws;
2314
unsigned width = templ->width, height = templ->height;
2315
unsigned bs_buf_size, stream_type = 0, ring = RING_VCN_DEC;
2316
struct radeon_decoder *dec;
2317
int r, i;
2318
2319
switch (u_reduce_video_profile(templ->profile)) {
2320
case PIPE_VIDEO_FORMAT_MPEG12:
2321
if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM)
2322
return vl_create_mpeg12_decoder(context, templ);
2323
stream_type = RDECODE_CODEC_MPEG2_VLD;
2324
break;
2325
case PIPE_VIDEO_FORMAT_MPEG4:
2326
width = align(width, VL_MACROBLOCK_WIDTH);
2327
height = align(height, VL_MACROBLOCK_HEIGHT);
2328
stream_type = RDECODE_CODEC_MPEG4;
2329
break;
2330
case PIPE_VIDEO_FORMAT_VC1:
2331
stream_type = RDECODE_CODEC_VC1;
2332
break;
2333
case PIPE_VIDEO_FORMAT_MPEG4_AVC:
2334
width = align(width, VL_MACROBLOCK_WIDTH);
2335
height = align(height, VL_MACROBLOCK_HEIGHT);
2336
stream_type = RDECODE_CODEC_H264_PERF;
2337
break;
2338
case PIPE_VIDEO_FORMAT_HEVC:
2339
stream_type = RDECODE_CODEC_H265;
2340
break;
2341
case PIPE_VIDEO_FORMAT_VP9:
2342
stream_type = RDECODE_CODEC_VP9;
2343
break;
2344
case PIPE_VIDEO_FORMAT_AV1:
2345
stream_type = RDECODE_CODEC_AV1;
2346
break;
2347
case PIPE_VIDEO_FORMAT_JPEG:
2348
stream_type = RDECODE_CODEC_JPEG;
2349
ring = RING_VCN_JPEG;
2350
break;
2351
default:
2352
assert(0);
2353
break;
2354
}
2355
2356
dec = CALLOC_STRUCT(radeon_decoder);
2357
2358
if (!dec)
2359
return NULL;
2360
2361
dec->base = *templ;
2362
dec->base.context = context;
2363
dec->base.width = width;
2364
dec->base.height = height;
2365
2366
dec->base.destroy = radeon_dec_destroy;
2367
dec->base.begin_frame = radeon_dec_begin_frame;
2368
dec->base.decode_macroblock = radeon_dec_decode_macroblock;
2369
dec->base.decode_bitstream = radeon_dec_decode_bitstream;
2370
dec->base.end_frame = radeon_dec_end_frame;
2371
dec->base.flush = radeon_dec_flush;
2372
2373
dec->stream_type = stream_type;
2374
dec->stream_handle = si_vid_alloc_stream_handle();
2375
dec->screen = context->screen;
2376
dec->ws = ws;
2377
2378
if (!ws->cs_create(&dec->cs, sctx->ctx, ring, NULL, NULL, false)) {
2379
RVID_ERR("Can't get command submission context.\n");
2380
goto error;
2381
}
2382
2383
for (i = 0; i < ARRAY_SIZE(dec->render_pic_list); i++)
2384
dec->render_pic_list[i] = NULL;
2385
bs_buf_size = width * height * (512 / (16 * 16));
2386
for (i = 0; i < NUM_BUFFERS; ++i) {
2387
unsigned msg_fb_it_probs_size = FB_BUFFER_OFFSET + FB_BUFFER_SIZE;
2388
if (have_it(dec))
2389
msg_fb_it_probs_size += IT_SCALING_TABLE_SIZE;
2390
else if (have_probs(dec))
2391
msg_fb_it_probs_size += (dec->stream_type == RDECODE_CODEC_VP9) ?
2392
VP9_PROBS_TABLE_SIZE :
2393
sizeof(rvcn_dec_av1_segment_fg_t);
2394
/* use vram to improve performance, workaround an unknown bug */
2395
if (!si_vid_create_buffer(dec->screen, &dec->msg_fb_it_probs_buffers[i], msg_fb_it_probs_size,
2396
PIPE_USAGE_DEFAULT)) {
2397
RVID_ERR("Can't allocated message buffers.\n");
2398
goto error;
2399
}
2400
2401
if (!si_vid_create_buffer(dec->screen, &dec->bs_buffers[i], bs_buf_size,
2402
PIPE_USAGE_STAGING)) {
2403
RVID_ERR("Can't allocated bitstream buffers.\n");
2404
goto error;
2405
}
2406
2407
si_vid_clear_buffer(context, &dec->msg_fb_it_probs_buffers[i]);
2408
si_vid_clear_buffer(context, &dec->bs_buffers[i]);
2409
2410
if (have_probs(dec) && dec->stream_type == RDECODE_CODEC_VP9) {
2411
struct rvid_buffer *buf;
2412
void *ptr;
2413
2414
buf = &dec->msg_fb_it_probs_buffers[i];
2415
ptr = dec->ws->buffer_map(dec->ws, buf->res->buf, &dec->cs,
2416
PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
2417
ptr += FB_BUFFER_OFFSET + FB_BUFFER_SIZE;
2418
fill_probs_table(ptr);
2419
dec->ws->buffer_unmap(dec->ws, buf->res->buf);
2420
dec->bs_ptr = NULL;
2421
}
2422
}
2423
2424
if (sctx->family >= CHIP_SIENNA_CICHLID &&
2425
(stream_type == RDECODE_CODEC_VP9 || stream_type == RDECODE_CODEC_AV1))
2426
dec->dpb_type = DPB_DYNAMIC_TIER_2;
2427
else if (sctx->family <= CHIP_NAVI14 && stream_type == RDECODE_CODEC_VP9)
2428
dec->dpb_type = DPB_DYNAMIC_TIER_1;
2429
else
2430
dec->dpb_type = DPB_MAX_RES;
2431
2432
dec->db_alignment = (((struct si_screen *)dec->screen)->info.family >= CHIP_RENOIR &&
2433
dec->base.width > 32 && (dec->stream_type == RDECODE_CODEC_VP9 ||
2434
dec->stream_type == RDECODE_CODEC_AV1 ||
2435
dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)) ? 64 : 32;
2436
2437
dec->dpb_size = calc_dpb_size(dec);
2438
2439
if (!si_vid_create_buffer(dec->screen, &dec->sessionctx, RDECODE_SESSION_CONTEXT_SIZE,
2440
PIPE_USAGE_DEFAULT)) {
2441
RVID_ERR("Can't allocated session ctx.\n");
2442
goto error;
2443
}
2444
si_vid_clear_buffer(context, &dec->sessionctx);
2445
2446
switch (sctx->family) {
2447
case CHIP_RAVEN:
2448
case CHIP_RAVEN2:
2449
dec->reg.data0 = RDECODE_VCN1_GPCOM_VCPU_DATA0;
2450
dec->reg.data1 = RDECODE_VCN1_GPCOM_VCPU_DATA1;
2451
dec->reg.cmd = RDECODE_VCN1_GPCOM_VCPU_CMD;
2452
dec->reg.cntl = RDECODE_VCN1_ENGINE_CNTL;
2453
dec->jpg.direct_reg = false;
2454
break;
2455
case CHIP_NAVI10:
2456
case CHIP_NAVI12:
2457
case CHIP_NAVI14:
2458
case CHIP_RENOIR:
2459
dec->reg.data0 = RDECODE_VCN2_GPCOM_VCPU_DATA0;
2460
dec->reg.data1 = RDECODE_VCN2_GPCOM_VCPU_DATA1;
2461
dec->reg.cmd = RDECODE_VCN2_GPCOM_VCPU_CMD;
2462
dec->reg.cntl = RDECODE_VCN2_ENGINE_CNTL;
2463
dec->jpg.direct_reg = true;
2464
break;
2465
case CHIP_ARCTURUS:
2466
case CHIP_ALDEBARAN:
2467
case CHIP_SIENNA_CICHLID:
2468
case CHIP_NAVY_FLOUNDER:
2469
case CHIP_DIMGREY_CAVEFISH:
2470
case CHIP_BEIGE_GOBY:
2471
case CHIP_VANGOGH:
2472
case CHIP_YELLOW_CARP:
2473
dec->reg.data0 = RDECODE_VCN2_5_GPCOM_VCPU_DATA0;
2474
dec->reg.data1 = RDECODE_VCN2_5_GPCOM_VCPU_DATA1;
2475
dec->reg.cmd = RDECODE_VCN2_5_GPCOM_VCPU_CMD;
2476
dec->reg.cntl = RDECODE_VCN2_5_ENGINE_CNTL;
2477
dec->jpg.direct_reg = true;
2478
break;
2479
default:
2480
RVID_ERR("VCN is not supported.\n");
2481
goto error;
2482
}
2483
2484
map_msg_fb_it_probs_buf(dec);
2485
rvcn_dec_message_create(dec);
2486
send_msg_buf(dec);
2487
r = flush(dec, 0);
2488
if (r)
2489
goto error;
2490
2491
next_buffer(dec);
2492
2493
if (stream_type == RDECODE_CODEC_JPEG)
2494
dec->send_cmd = send_cmd_jpeg;
2495
else
2496
dec->send_cmd = send_cmd_dec;
2497
2498
2499
if (dec->dpb_type == DPB_DYNAMIC_TIER_2) {
2500
list_inithead(&dec->dpb_ref_list);
2501
list_inithead(&dec->dpb_unref_list);
2502
}
2503
2504
dec->tmz_ctx = sctx->family < CHIP_RENOIR;
2505
2506
return &dec->base;
2507
2508
error:
2509
dec->ws->cs_destroy(&dec->cs);
2510
2511
for (i = 0; i < NUM_BUFFERS; ++i) {
2512
si_vid_destroy_buffer(&dec->msg_fb_it_probs_buffers[i]);
2513
si_vid_destroy_buffer(&dec->bs_buffers[i]);
2514
}
2515
2516
if (dec->dpb_type != DPB_DYNAMIC_TIER_2)
2517
si_vid_destroy_buffer(&dec->dpb);
2518
si_vid_destroy_buffer(&dec->ctx);
2519
si_vid_destroy_buffer(&dec->sessionctx);
2520
2521
FREE(dec);
2522
2523
return NULL;
2524
}
2525
2526