CoCalc -- radeon_vcn

GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/radeon/radeon_vcn_dec.h
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/**************************************************************************
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 *
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 * Copyright 2017 Advanced Micro Devices, Inc.
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 * All Rights Reserved.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the
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 * "Software"), to deal in the Software without restriction, including
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the
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 * next paragraph) shall be included in all copies or substantial portions
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 * of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
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 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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 *
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 **************************************************************************/
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#ifndef _RADEON_VCN_DEC_H
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#define _RADEON_VCN_DEC_H
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#include "radeon_video.h"
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#include "util/list.h"
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#define RDECODE_PKT_TYPE_S(x)        (((unsigned)(x)&0x3) << 30)
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#define RDECODE_PKT_TYPE_G(x)        (((x) >> 30) & 0x3)
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#define RDECODE_PKT_TYPE_C           0x3FFFFFFF
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#define RDECODE_PKT_COUNT_S(x)       (((unsigned)(x)&0x3FFF) << 16)
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#define RDECODE_PKT_COUNT_G(x)       (((x) >> 16) & 0x3FFF)
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#define RDECODE_PKT_COUNT_C          0xC000FFFF
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#define RDECODE_PKT0_BASE_INDEX_S(x) (((unsigned)(x)&0xFFFF) << 0)
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#define RDECODE_PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF)
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#define RDECODE_PKT0_BASE_INDEX_C    0xFFFF0000
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#define RDECODE_PKT0(index, count)                                                                 \
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   (RDECODE_PKT_TYPE_S(0) | RDECODE_PKT0_BASE_INDEX_S(index) | RDECODE_PKT_COUNT_S(count))
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#define RDECODE_PKT2() (RDECODE_PKT_TYPE_S(2))
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#define RDECODE_PKT_REG_J(x)  ((unsigned)(x)&0x3FFFF)
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#define RDECODE_PKT_RES_J(x)  (((unsigned)(x)&0x3F) << 18)
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#define RDECODE_PKT_COND_J(x) (((unsigned)(x)&0xF) << 24)
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#define RDECODE_PKT_TYPE_J(x) (((unsigned)(x)&0xF) << 28)
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#define RDECODE_PKTJ(reg, cond, type)                                                              \
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   (RDECODE_PKT_REG_J(reg) | RDECODE_PKT_RES_J(0) | RDECODE_PKT_COND_J(cond) |                     \
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    RDECODE_PKT_TYPE_J(type))
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#define RDECODE_CMD_MSG_BUFFER                              0x00000000
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#define RDECODE_CMD_DPB_BUFFER                              0x00000001
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#define RDECODE_CMD_DECODING_TARGET_BUFFER                  0x00000002
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#define RDECODE_CMD_FEEDBACK_BUFFER                         0x00000003
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#define RDECODE_CMD_PROB_TBL_BUFFER                         0x00000004
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#define RDECODE_CMD_SESSION_CONTEXT_BUFFER                  0x00000005
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#define RDECODE_CMD_BITSTREAM_BUFFER                        0x00000100
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#define RDECODE_CMD_IT_SCALING_TABLE_BUFFER                 0x00000204
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#define RDECODE_CMD_CONTEXT_BUFFER                          0x00000206
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#define RDECODE_MSG_CREATE                                  0x00000000
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#define RDECODE_MSG_DECODE                                  0x00000001
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#define RDECODE_MSG_DESTROY                                 0x00000002
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#define RDECODE_CODEC_H264                                  0x00000000
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#define RDECODE_CODEC_VC1                                   0x00000001
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#define RDECODE_CODEC_MPEG2_VLD                             0x00000003
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#define RDECODE_CODEC_MPEG4                                 0x00000004
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#define RDECODE_CODEC_H264_PERF                             0x00000007
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#define RDECODE_CODEC_JPEG                                  0x00000008
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#define RDECODE_CODEC_H265                                  0x00000010
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#define RDECODE_CODEC_VP9                                   0x00000011
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#define RDECODE_CODEC_AV1                                   0x00000013
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#define RDECODE_ARRAY_MODE_LINEAR                           0x00000000
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#define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED         0x00000001
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#define RDECODE_ARRAY_MODE_1D_THIN                          0x00000002
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#define RDECODE_ARRAY_MODE_2D_THIN                          0x00000004
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#define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR         0x00000004
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#define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED          0x00000005
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#define RDECODE_H264_PROFILE_BASELINE                       0x00000000
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#define RDECODE_H264_PROFILE_MAIN                           0x00000001
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#define RDECODE_H264_PROFILE_HIGH                           0x00000002
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#define RDECODE_H264_PROFILE_STEREO_HIGH                    0x00000003
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#define RDECODE_H264_PROFILE_MVC                            0x00000004
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#define RDECODE_VC1_PROFILE_SIMPLE                          0x00000000
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#define RDECODE_VC1_PROFILE_MAIN                            0x00000001
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#define RDECODE_VC1_PROFILE_ADVANCED                        0x00000002
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#define RDECODE_SW_MODE_LINEAR                              0x00000000
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#define RDECODE_256B_S                                      0x00000001
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#define RDECODE_256B_D                                      0x00000002
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#define RDECODE_4KB_S                                       0x00000005
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#define RDECODE_4KB_D                                       0x00000006
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#define RDECODE_64KB_S                                      0x00000009
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#define RDECODE_64KB_D                                      0x0000000A
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#define RDECODE_4KB_S_X                                     0x00000015
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#define RDECODE_4KB_D_X                                     0x00000016
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#define RDECODE_64KB_S_X                                    0x00000019
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#define RDECODE_64KB_D_X                                    0x0000001A
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#define RDECODE_MESSAGE_NOT_SUPPORTED                       0x00000000
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#define RDECODE_MESSAGE_CREATE                              0x00000001
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#define RDECODE_MESSAGE_DECODE                              0x00000002
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#define RDECODE_MESSAGE_DRM                                 0x00000003
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#define RDECODE_MESSAGE_AVC                                 0x00000006
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#define RDECODE_MESSAGE_VC1                                 0x00000007
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#define RDECODE_MESSAGE_MPEG2_VLD                           0x0000000A
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#define RDECODE_MESSAGE_MPEG4_ASP_VLD                       0x0000000B
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#define RDECODE_MESSAGE_HEVC                                0x0000000D
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#define RDECODE_MESSAGE_VP9                                 0x0000000E
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#define RDECODE_MESSAGE_DYNAMIC_DPB                         0x00000010
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#define RDECODE_MESSAGE_AV1                                 0x00000011
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#define RDECODE_FEEDBACK_PROFILING                          0x00000001
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#define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT  7
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#define NUM_BUFFERS                                         4
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#define RDECODE_VP9_PROBS_DATA_SIZE                         2304
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#define mmUVD_JPEG_CNTL                                     0x0200
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#define mmUVD_JPEG_CNTL_BASE_IDX                            1
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#define mmUVD_JPEG_RB_BASE                                  0x0201
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#define mmUVD_JPEG_RB_BASE_BASE_IDX                         1
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#define mmUVD_JPEG_RB_WPTR                                  0x0202
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#define mmUVD_JPEG_RB_WPTR_BASE_IDX                         1
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#define mmUVD_JPEG_RB_RPTR                                  0x0203
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#define mmUVD_JPEG_RB_RPTR_BASE_IDX                         1
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#define mmUVD_JPEG_RB_SIZE                                  0x0204
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#define mmUVD_JPEG_RB_SIZE_BASE_IDX                         1
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#define mmUVD_JPEG_TIER_CNTL2                               0x021a
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#define mmUVD_JPEG_TIER_CNTL2_BASE_IDX                      1
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#define mmUVD_JPEG_UV_TILING_CTRL                           0x021c
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#define mmUVD_JPEG_UV_TILING_CTRL_BASE_IDX                  1
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#define mmUVD_JPEG_TILING_CTRL                              0x021e
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#define mmUVD_JPEG_TILING_CTRL_BASE_IDX                     1
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#define mmUVD_JPEG_OUTBUF_RPTR                              0x0220
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#define mmUVD_JPEG_OUTBUF_RPTR_BASE_IDX                     1
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#define mmUVD_JPEG_OUTBUF_WPTR                              0x0221
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#define mmUVD_JPEG_OUTBUF_WPTR_BASE_IDX                     1
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#define mmUVD_JPEG_PITCH                                    0x0222
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#define mmUVD_JPEG_PITCH_BASE_IDX                           1
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#define mmUVD_JPEG_INT_EN                                   0x0229
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#define mmUVD_JPEG_INT_EN_BASE_IDX                          1
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#define mmUVD_JPEG_UV_PITCH                                 0x022b
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#define mmUVD_JPEG_UV_PITCH_BASE_IDX                        1
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#define mmUVD_JPEG_INDEX                                    0x023e
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#define mmUVD_JPEG_INDEX_BASE_IDX                           1
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#define mmUVD_JPEG_DATA                                     0x023f
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#define mmUVD_JPEG_DATA_BASE_IDX                            1
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#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH                 0x0438
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#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH_BASE_IDX        1
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#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW                  0x0439
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#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW_BASE_IDX         1
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#define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH                  0x045a
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#define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH_BASE_IDX         1
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#define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW                   0x045b
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#define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW_BASE_IDX          1
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#define mmUVD_CTX_INDEX                                     0x0528
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#define mmUVD_CTX_INDEX_BASE_IDX                            1
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#define mmUVD_CTX_DATA                                      0x0529
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#define mmUVD_CTX_DATA_BASE_IDX                             1
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#define mmUVD_SOFT_RESET                                    0x05a0
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#define mmUVD_SOFT_RESET_BASE_IDX                           1
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#define vcnipUVD_JPEG_DEC_SOFT_RST                          0x402f
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#define vcnipUVD_JRBC_IB_COND_RD_TIMER                      0x408e
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#define vcnipUVD_JRBC_IB_REF_DATA                           0x408f
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#define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_HIGH               0x40e1
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#define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_LOW                0x40e0
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#define vcnipUVD_JPEG_RB_BASE                               0x4001
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#define vcnipUVD_JPEG_RB_SIZE                               0x4004
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#define vcnipUVD_JPEG_RB_WPTR                               0x4002
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#define vcnipUVD_JPEG_PITCH                                 0x401f
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#define vcnipUVD_JPEG_UV_PITCH                              0x4020
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#define vcnipJPEG_DEC_ADDR_MODE                             0x4027
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#define vcnipJPEG_DEC_Y_GFX10_TILING_SURFACE                0x4024
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#define vcnipJPEG_DEC_UV_GFX10_TILING_SURFACE               0x4025
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#define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH              0x40e3
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#define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW               0x40e2
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#define vcnipUVD_JPEG_INDEX                                 0x402c
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#define vcnipUVD_JPEG_DATA                                  0x402d
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#define vcnipUVD_JPEG_TIER_CNTL2                            0x400f
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#define vcnipUVD_JPEG_OUTBUF_RPTR                           0x401e
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#define vcnipUVD_JPEG_OUTBUF_CNTL                           0x401c
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#define vcnipUVD_JPEG_INT_EN                                0x400a
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#define vcnipUVD_JPEG_CNTL                                  0x4000
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#define vcnipUVD_JPEG_RB_RPTR                               0x4003
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#define vcnipUVD_JPEG_OUTBUF_WPTR                           0x401d
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#define UVD_BASE_INST0_SEG0                                 0x00007800
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#define UVD_BASE_INST0_SEG1                                 0x00007E00
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#define UVD_BASE_INST0_SEG2                                 0
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#define UVD_BASE_INST0_SEG3                                 0
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#define UVD_BASE_INST0_SEG4                                 0
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#define SOC15_REG_ADDR(reg) (UVD_BASE_INST0_SEG1 + reg)
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#define COND0 0
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#define COND1 1
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#define COND2 2
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#define COND3 3
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#define COND4 4
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#define COND5 5
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#define COND6 6
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#define COND7 7
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#define TYPE0 0
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#define TYPE1 1
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#define TYPE2 2
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#define TYPE3 3
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#define TYPE4 4
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#define TYPE5 5
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#define TYPE6 6
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#define TYPE7 7
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/* VP9 Frame header flags */
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#define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_SHIFT     (13)
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#define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_SHIFT        (12)
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#define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_SHIFT       (11)
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#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_SHIFT     (10)
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#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (9)
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#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_SHIFT      (8)
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#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_SHIFT         (7)
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#define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_SHIFT (6)
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#define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_SHIFT        (5)
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#define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_SHIFT      (4)
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#define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_SHIFT                   (3)
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#define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_SHIFT         (2)
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#define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_SHIFT                   (1)
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#define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_SHIFT          (0)
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#define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_MASK     (0x00002000)
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#define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_MASK        (0x00001000)
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#define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_MASK       (0x00000800)
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#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_MASK     (0x00000400)
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#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x00000200)
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#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_MASK      (0x00000100)
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#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_MASK         (0x00000080)
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#define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_MASK (0x00000040)
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#define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_MASK        (0x00000020)
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#define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_MASK      (0x00000010)
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#define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_MASK                   (0x00000008)
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#define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_MASK         (0x00000004)
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#define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_MASK                   (0x00000002)
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#define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_MASK          (0x00000001)
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/* Drm definitions */
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#define DRM_CMD_KEY_SHIFT              0
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#define DRM_CMD_CNT_KEY_SHIFT          1
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#define DRM_CMD_CNT_DATA_SHIFT         2
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#define DRM_CMD_OFFSET_SHIFT           3
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#define DRM_CMD_SESSION_SEL_SHIFT      4
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#define DRM_CMD_UNWRAP_KEY_SHIFT       8
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#define DRM_CMD_GEN_MASK_SHIFT         9
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#define DRM_CMD_ALGORITHM_SHIFT        10
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#define DRM_CMD_BYTE_MASK_SHIFT        16
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#define DRM_CMD_DRM_BYPASS_SHIFT       31
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#define DRM_CMD_KEY_MASK               (0x00000001)
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#define DRM_CMD_CNT_KEY_MASK           (0x00000002)
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#define DRM_CMD_CNT_DATA_MASK          (0x00000004)
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#define DRM_CMD_OFFSET_MASK            (0x00000008)
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#define DRM_CMD_SESSION_SEL_MASK       (0x000000F0)
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#define DRM_CMD_UNWRAP_KEY_MASK        (0x00000100)
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#define DRM_CMD_GEN_MASK_MASK          (0x00000200)
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#define DRM_CMD_ALGORITHM_MASK         (0x00000C00)
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#define DRM_CMD_BYTE_MASK_MASK         (0x00FF0000)
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#define DRM_CMD_DRM_BYPASS_MASK        (0x80000000)
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/* Drm_cntl definitions */
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#define DRM_CNTL_ENC_BYTECNT_SHIFT     (6)
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#define DRM_CNTL_CLR_BYTECNT_SHIFT     (16)
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#define DRM_CNTL_BYPASS_SHIFT          (24)
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#define DRM_CNTL_PARTIAL_MODE_SHIFT    (25)
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#define DRM_CNTL_OFFSET_MODE_SHIFT     (26)
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#define DRM_CNTL_HEADER_MODE_SHIFT     (27)
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#define DRM_CNTL_HEADER_BYTECNT_SHIFT  (28)
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#define DRM_CNTL_ENC_BYTECNT_MASK      (0x00000FC0)
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#define DRM_CNTL_CLR_BYTECNT_MASK      (0x003F0000)
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#define DRM_CNTL_BYPASS_MASK           (0x01000000)
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#define DRM_CNTL_PARTIAL_MODE_MASK     (0x02000000)
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#define DRM_CNTL_OFFSET_MODE_MASK      (0x04000000)
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#define DRM_CNTL_HEADER_MODE_MASK      (0x08000000)
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#define DRM_CNTL_HEADER_BYTECNT_MASK   (0xF0000000)
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#define SAMU_DRM_DISABLE 0x00000000
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#define SAMU_DRM_ENABLE  0x00000001
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/* AV1 Frame header flags */
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#define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_SHIFT        (31)
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#define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_SHIFT        (30)
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#define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_SHIFT         (29)
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#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_SHIFT               (28)
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#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (27)
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#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_SHIFT      (26)
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#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_SHIFT         (25)
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#define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_SHIFT          (24)
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#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_SHIFT        (23)
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#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_SHIFT         (22)
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#define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_SHIFT        (21)
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#define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_SHIFT       (20)
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#define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_SHIFT   (19)
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#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_SHIFT   (18)
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#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_SHIFT          (17)
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#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_SHIFT              (16)
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#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_SHIFT            (15)
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#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_SHIFT           (14)
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#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_SHIFT          (13)
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#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_SHIFT       (12)
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#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_SHIFT   (11)
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#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_SHIFT     (10)
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#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_SHIFT          (9)
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#define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_SHIFT                (8)
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#define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_SHIFT               (7)
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#define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_SHIFT                   (6)
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#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_SHIFT      (5)
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#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_SHIFT                (4)
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#define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_SHIFT                   (3)
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#define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_SHIFT        (2)
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#define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_SHIFT           (1)
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#define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_SHIFT                   (0)
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#define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_MASK         (0x80000000)
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#define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_MASK         (0x40000000)
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#define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_MASK          (0x20000000)
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#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_MASK                (0x10000000)
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#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_MASK  (0x08000000)
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#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_MASK       (0x04000000)
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#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_MASK          (0x02000000)
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#define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_MASK           (0x01000000)
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#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_MASK         (0x00800000)
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#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_MASK          (0x00400000)
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#define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_MASK         (0x00200000)
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#define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_MASK        (0x00100000)
346
#define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_MASK    (0x00080000)
347
#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_MASK    (0x00040000)
348
#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_MASK           (0x00020000)
349
#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_MASK               (0x00010000)
350
#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_MASK             (0x00008000)
351
#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_MASK            (0x00004000)
352
#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_MASK           (0x00002000)
353
#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_MASK        (0x00001000)
354
#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_MASK    (0x00000800)
355
#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_MASK      (0x00000400)
356
#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_MASK           (0x00000200)
357
#define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_MASK                 (0x00000100)
358
#define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_MASK                (0x00000080)
359
#define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_MASK                    (0x08000040)
360
#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_MASK       (0x00000020)
361
#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_MASK                 (0x00000010)
362
#define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_MASK                    (0x00000008)
363
#define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_MASK         (0x00000004)
364
#define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_MASK            (0x00000002)
365
#define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_MASK                    (0x00000001)
366

367
typedef struct rvcn_dec_message_index_s {
368
   unsigned int message_id;
369
   unsigned int offset;
370
   unsigned int size;
371
   unsigned int filled;
372
} rvcn_dec_message_index_t;
373

374
typedef struct rvcn_dec_message_header_s {
375
   unsigned int header_size;
376
   unsigned int total_size;
377
   unsigned int num_buffers;
378
   unsigned int msg_type;
379
   unsigned int stream_handle;
380
   unsigned int status_report_feedback_number;
381

382
   rvcn_dec_message_index_t index[1];
383
} rvcn_dec_message_header_t;
384

385
typedef struct rvcn_dec_message_create_s {
386
   unsigned int stream_type;
387
   unsigned int session_flags;
388
   unsigned int width_in_samples;
389
   unsigned int height_in_samples;
390
} rvcn_dec_message_create_t;
391

392
typedef struct rvcn_dec_message_decode_s {
393
   unsigned int stream_type;
394
   unsigned int decode_flags;
395
   unsigned int width_in_samples;
396
   unsigned int height_in_samples;
397

398
   unsigned int bsd_size;
399
   unsigned int dpb_size;
400
   unsigned int dt_size;
401
   unsigned int sct_size;
402
   unsigned int sc_coeff_size;
403
   unsigned int hw_ctxt_size;
404
   unsigned int sw_ctxt_size;
405
   unsigned int pic_param_size;
406
   unsigned int mb_cntl_size;
407
   unsigned int reserved0[4];
408
   unsigned int decode_buffer_flags;
409

410
   unsigned int db_pitch;
411
   unsigned int db_aligned_height;
412
   unsigned int db_tiling_mode;
413
   unsigned int db_swizzle_mode;
414
   unsigned int db_array_mode;
415
   unsigned int db_field_mode;
416
   unsigned int db_surf_tile_config;
417

418
   unsigned int dt_pitch;
419
   unsigned int dt_uv_pitch;
420
   unsigned int dt_tiling_mode;
421
   unsigned int dt_swizzle_mode;
422
   unsigned int dt_array_mode;
423
   unsigned int dt_field_mode;
424
   unsigned int dt_out_format;
425
   unsigned int dt_surf_tile_config;
426
   unsigned int dt_uv_surf_tile_config;
427
   unsigned int dt_luma_top_offset;
428
   unsigned int dt_luma_bottom_offset;
429
   unsigned int dt_chroma_top_offset;
430
   unsigned int dt_chroma_bottom_offset;
431
   unsigned int dt_chromaV_top_offset;
432
   unsigned int dt_chromaV_bottom_offset;
433

434
   unsigned int mif_wrc_en;
435
   unsigned int db_pitch_uv;
436

437
   unsigned char reserved1[20];
438
} rvcn_dec_message_decode_t;
439

440
typedef struct rvcn_dec_message_drm_s {
441
   unsigned int	drm_key[4];
442
   unsigned int	drm_counter[4];
443
   unsigned int	drm_wrapped_key[4];
444
   unsigned int	drm_offset;
445
   unsigned int	drm_cmd;
446
   unsigned int	drm_cntl;
447
   unsigned int	drm_reserved;
448
} rvcn_dec_message_drm_t;
449

450
typedef struct rvcn_dec_message_dynamic_dpb_s {
451
   unsigned int dpbConfigFlags;
452
   unsigned int dpbLumaPitch;
453
   unsigned int dpbLumaAlignedHeight;
454
   unsigned int dpbLumaAlignedSize;
455
   unsigned int dpbChromaPitch;
456
   unsigned int dpbChromaAlignedHeight;
457
   unsigned int dpbChromaAlignedSize;
458

459
   unsigned char dpbArraySize;
460
   unsigned char dpbCurArraySlice;
461
   unsigned char dpbRefArraySlice[16];
462
   unsigned char dpbReserved0[2];
463

464
   unsigned int dpbCurrOffset;
465
   unsigned int dpbAddrOffset[16];
466
} rvcn_dec_message_dynamic_dpb_t;
467

468
typedef struct rvcn_dec_message_dynamic_dpb_t2_s {
469
    unsigned int dpbConfigFlags;
470
    unsigned int dpbLumaPitch;
471
    unsigned int dpbLumaAlignedHeight;
472
    unsigned int dpbLumaAlignedSize;
473
    unsigned int dpbChromaPitch;
474
    unsigned int dpbChromaAlignedHeight;
475
    unsigned int dpbChromaAlignedSize;
476
    unsigned int dpbArraySize;
477

478
    unsigned int dpbCurrLo;
479
    unsigned int dpbCurrHi;
480
    unsigned int dpbAddrLo[16];
481
    unsigned int dpbAddrHi[16];
482
} rvcn_dec_message_dynamic_dpb_t2_t;
483

484
typedef struct {
485
   unsigned short viewOrderIndex;
486
   unsigned short viewId;
487
   unsigned short numOfAnchorRefsInL0;
488
   unsigned short viewIdOfAnchorRefsInL0[15];
489
   unsigned short numOfAnchorRefsInL1;
490
   unsigned short viewIdOfAnchorRefsInL1[15];
491
   unsigned short numOfNonAnchorRefsInL0;
492
   unsigned short viewIdOfNonAnchorRefsInL0[15];
493
   unsigned short numOfNonAnchorRefsInL1;
494
   unsigned short viewIdOfNonAnchorRefsInL1[15];
495
} radeon_mvcElement_t;
496

497
typedef struct rvcn_dec_message_avc_s {
498
   unsigned int profile;
499
   unsigned int level;
500

501
   unsigned int sps_info_flags;
502
   unsigned int pps_info_flags;
503
   unsigned char chroma_format;
504
   unsigned char bit_depth_luma_minus8;
505
   unsigned char bit_depth_chroma_minus8;
506
   unsigned char log2_max_frame_num_minus4;
507

508
   unsigned char pic_order_cnt_type;
509
   unsigned char log2_max_pic_order_cnt_lsb_minus4;
510
   unsigned char num_ref_frames;
511
   unsigned char reserved_8bit;
512

513
   signed char pic_init_qp_minus26;
514
   signed char pic_init_qs_minus26;
515
   signed char chroma_qp_index_offset;
516
   signed char second_chroma_qp_index_offset;
517

518
   unsigned char num_slice_groups_minus1;
519
   unsigned char slice_group_map_type;
520
   unsigned char num_ref_idx_l0_active_minus1;
521
   unsigned char num_ref_idx_l1_active_minus1;
522

523
   unsigned short slice_group_change_rate_minus1;
524
   unsigned short reserved_16bit_1;
525

526
   unsigned char scaling_list_4x4[6][16];
527
   unsigned char scaling_list_8x8[2][64];
528

529
   unsigned int frame_num;
530
   unsigned int frame_num_list[16];
531
   int curr_field_order_cnt_list[2];
532
   int field_order_cnt_list[16][2];
533

534
   unsigned int decoded_pic_idx;
535
   unsigned int curr_pic_ref_frame_num;
536
   unsigned char ref_frame_list[16];
537

538
   unsigned int reserved[122];
539

540
   struct {
541
      unsigned int numViews;
542
      unsigned int viewId0;
543
      radeon_mvcElement_t mvcElements[1];
544
   } mvc;
545

546
} rvcn_dec_message_avc_t;
547

548
typedef struct rvcn_dec_message_vc1_s {
549
   unsigned int profile;
550
   unsigned int level;
551
   unsigned int sps_info_flags;
552
   unsigned int pps_info_flags;
553
   unsigned int pic_structure;
554
   unsigned int chroma_format;
555
   unsigned short decoded_pic_idx;
556
   unsigned short deblocked_pic_idx;
557
   unsigned short forward_ref_idx;
558
   unsigned short backward_ref_idx;
559
   unsigned int cached_frame_flag;
560
} rvcn_dec_message_vc1_t;
561

562
typedef struct rvcn_dec_message_mpeg2_vld_s {
563
   unsigned int decoded_pic_idx;
564
   unsigned int forward_ref_pic_idx;
565
   unsigned int backward_ref_pic_idx;
566

567
   unsigned char load_intra_quantiser_matrix;
568
   unsigned char load_nonintra_quantiser_matrix;
569
   unsigned char reserved_quantiser_alignement[2];
570
   unsigned char intra_quantiser_matrix[64];
571
   unsigned char nonintra_quantiser_matrix[64];
572

573
   unsigned char profile_and_level_indication;
574
   unsigned char chroma_format;
575

576
   unsigned char picture_coding_type;
577

578
   unsigned char reserved_1;
579

580
   unsigned char f_code[2][2];
581
   unsigned char intra_dc_precision;
582
   unsigned char pic_structure;
583
   unsigned char top_field_first;
584
   unsigned char frame_pred_frame_dct;
585
   unsigned char concealment_motion_vectors;
586
   unsigned char q_scale_type;
587
   unsigned char intra_vlc_format;
588
   unsigned char alternate_scan;
589
} rvcn_dec_message_mpeg2_vld_t;
590

591
typedef struct rvcn_dec_message_mpeg4_asp_vld_s {
592
   unsigned int decoded_pic_idx;
593
   unsigned int forward_ref_pic_idx;
594
   unsigned int backward_ref_pic_idx;
595

596
   unsigned int variant_type;
597
   unsigned char profile_and_level_indication;
598

599
   unsigned char video_object_layer_verid;
600
   unsigned char video_object_layer_shape;
601

602
   unsigned char reserved_1;
603

604
   unsigned short video_object_layer_width;
605
   unsigned short video_object_layer_height;
606

607
   unsigned short vop_time_increment_resolution;
608

609
   unsigned short reserved_2;
610

611
   struct {
612
      unsigned int short_video_header : 1;
613
      unsigned int obmc_disable : 1;
614
      unsigned int interlaced : 1;
615
      unsigned int load_intra_quant_mat : 1;
616
      unsigned int load_nonintra_quant_mat : 1;
617
      unsigned int quarter_sample : 1;
618
      unsigned int complexity_estimation_disable : 1;
619
      unsigned int resync_marker_disable : 1;
620
      unsigned int data_partitioned : 1;
621
      unsigned int reversible_vlc : 1;
622
      unsigned int newpred_enable : 1;
623
      unsigned int reduced_resolution_vop_enable : 1;
624
      unsigned int scalability : 1;
625
      unsigned int is_object_layer_identifier : 1;
626
      unsigned int fixed_vop_rate : 1;
627
      unsigned int newpred_segment_type : 1;
628
      unsigned int reserved_bits : 16;
629
   };
630

631
   unsigned char quant_type;
632
   unsigned char reserved_3[3];
633
   unsigned char intra_quant_mat[64];
634
   unsigned char nonintra_quant_mat[64];
635

636
   struct {
637
      unsigned char sprite_enable;
638

639
      unsigned char reserved_4[3];
640

641
      unsigned short sprite_width;
642
      unsigned short sprite_height;
643
      short sprite_left_coordinate;
644
      short sprite_top_coordinate;
645

646
      unsigned char no_of_sprite_warping_points;
647
      unsigned char sprite_warping_accuracy;
648
      unsigned char sprite_brightness_change;
649
      unsigned char low_latency_sprite_enable;
650
   } sprite_config;
651

652
   struct {
653
      struct {
654
         unsigned int check_skip : 1;
655
         unsigned int switch_rounding : 1;
656
         unsigned int t311 : 1;
657
         unsigned int reserved_bits : 29;
658
      };
659

660
      unsigned char vol_mode;
661

662
      unsigned char reserved_5[3];
663
   } divx_311_config;
664

665
   struct {
666
      unsigned char vop_data_present;
667
      unsigned char vop_coding_type;
668
      unsigned char vop_quant;
669
      unsigned char vop_coded;
670
      unsigned char vop_rounding_type;
671
      unsigned char intra_dc_vlc_thr;
672
      unsigned char top_field_first;
673
      unsigned char alternate_vertical_scan_flag;
674
      unsigned char vop_fcode_forward;
675
      unsigned char vop_fcode_backward;
676
      unsigned int TRB[2];
677
      unsigned int TRD[2];
678
   } vop;
679

680
} rvcn_dec_message_mpeg4_asp_vld_t;
681

682
typedef struct rvcn_dec_message_hevc_s {
683
   unsigned int sps_info_flags;
684
   unsigned int pps_info_flags;
685
   unsigned char chroma_format;
686
   unsigned char bit_depth_luma_minus8;
687
   unsigned char bit_depth_chroma_minus8;
688
   unsigned char log2_max_pic_order_cnt_lsb_minus4;
689

690
   unsigned char sps_max_dec_pic_buffering_minus1;
691
   unsigned char log2_min_luma_coding_block_size_minus3;
692
   unsigned char log2_diff_max_min_luma_coding_block_size;
693
   unsigned char log2_min_transform_block_size_minus2;
694

695
   unsigned char log2_diff_max_min_transform_block_size;
696
   unsigned char max_transform_hierarchy_depth_inter;
697
   unsigned char max_transform_hierarchy_depth_intra;
698
   unsigned char pcm_sample_bit_depth_luma_minus1;
699

700
   unsigned char pcm_sample_bit_depth_chroma_minus1;
701
   unsigned char log2_min_pcm_luma_coding_block_size_minus3;
702
   unsigned char log2_diff_max_min_pcm_luma_coding_block_size;
703
   unsigned char num_extra_slice_header_bits;
704

705
   unsigned char num_short_term_ref_pic_sets;
706
   unsigned char num_long_term_ref_pic_sps;
707
   unsigned char num_ref_idx_l0_default_active_minus1;
708
   unsigned char num_ref_idx_l1_default_active_minus1;
709

710
   signed char pps_cb_qp_offset;
711
   signed char pps_cr_qp_offset;
712
   signed char pps_beta_offset_div2;
713
   signed char pps_tc_offset_div2;
714

715
   unsigned char diff_cu_qp_delta_depth;
716
   unsigned char num_tile_columns_minus1;
717
   unsigned char num_tile_rows_minus1;
718
   unsigned char log2_parallel_merge_level_minus2;
719

720
   unsigned short column_width_minus1[19];
721
   unsigned short row_height_minus1[21];
722

723
   signed char init_qp_minus26;
724
   unsigned char num_delta_pocs_ref_rps_idx;
725
   unsigned char curr_idx;
726
   unsigned char reserved[1];
727
   int curr_poc;
728
   unsigned char ref_pic_list[16];
729
   int poc_list[16];
730
   unsigned char ref_pic_set_st_curr_before[8];
731
   unsigned char ref_pic_set_st_curr_after[8];
732
   unsigned char ref_pic_set_lt_curr[8];
733

734
   unsigned char ucScalingListDCCoefSizeID2[6];
735
   unsigned char ucScalingListDCCoefSizeID3[2];
736

737
   unsigned char highestTid;
738
   unsigned char isNonRef;
739

740
   unsigned char p010_mode;
741
   unsigned char msb_mode;
742
   unsigned char luma_10to8;
743
   unsigned char chroma_10to8;
744

745
   unsigned char hevc_reserved[2];
746

747
   unsigned char direct_reflist[2][15];
748
   unsigned int st_rps_bits;
749
} rvcn_dec_message_hevc_t;
750

751
typedef struct rvcn_dec_message_vp9_s {
752
   unsigned int frame_header_flags;
753

754
   unsigned char frame_context_idx;
755
   unsigned char reset_frame_context;
756

757
   unsigned char curr_pic_idx;
758
   unsigned char interp_filter;
759

760
   unsigned char filter_level;
761
   unsigned char sharpness_level;
762
   unsigned char lf_adj_level[8][4][2];
763
   unsigned char base_qindex;
764
   signed char y_dc_delta_q;
765
   signed char uv_ac_delta_q;
766
   signed char uv_dc_delta_q;
767

768
   unsigned char log2_tile_cols;
769
   unsigned char log2_tile_rows;
770
   unsigned char tx_mode;
771
   unsigned char reference_mode;
772
   unsigned char chroma_format;
773

774
   unsigned char ref_frame_map[8];
775

776
   unsigned char frame_refs[3];
777
   unsigned char ref_frame_sign_bias[3];
778
   unsigned char frame_to_show;
779
   unsigned char bit_depth_luma_minus8;
780
   unsigned char bit_depth_chroma_minus8;
781

782
   unsigned char p010_mode;
783
   unsigned char msb_mode;
784
   unsigned char luma_10to8;
785
   unsigned char chroma_10to8;
786

787
   unsigned int vp9_frame_size;
788
   unsigned int compressed_header_size;
789
   unsigned int uncompressed_header_size;
790
} rvcn_dec_message_vp9_t;
791

792
typedef enum {
793
   RVCN_DEC_AV1_IDENTITY = 0,
794
   RVCN_DEC_AV1_TRANSLATION = 1,
795
   RVCN_DEC_AV1_ROTZOOM = 2,
796
   RVCN_DEC_AV1_AFFINE = 3,
797
   RVCN_DEC_AV1_HORTRAPEZOID = 4,
798
   RVCN_DEC_AV1_VERTRAPEZOID = 5,
799
   RVCN_DEC_AV1_HOMOGRAPHY = 6,
800
   RVCN_DEC_AV1_TRANS_TYPES = 7,
801
} rvcn_dec_transformation_type_e;
802

803
typedef struct {
804
   rvcn_dec_transformation_type_e wmtype;
805
   int wmmat[8];
806
   short alpha, beta, gamma, delta;
807
} rvcn_dec_warped_motion_params_t;
808

809
typedef struct {
810
   unsigned char apply_grain;
811
   unsigned char scaling_points_y[14][2];
812
   unsigned char num_y_points;
813
   unsigned char scaling_points_cb[10][2];
814
   unsigned char num_cb_points;
815
   unsigned char scaling_points_cr[10][2];
816
   unsigned char num_cr_points;
817
   unsigned char scaling_shift;
818
   unsigned char ar_coeff_lag;
819
   signed char ar_coeffs_y[24];
820
   signed char ar_coeffs_cb[25];
821
   signed char ar_coeffs_cr[25];
822
   unsigned char ar_coeff_shift;
823
   unsigned char cb_mult;
824
   unsigned char cb_luma_mult;
825
   unsigned short cb_offset;
826
   unsigned char cr_mult;
827
   unsigned char cr_luma_mult;
828
   unsigned short cr_offset;
829
   unsigned char overlap_flag;
830
   unsigned char clip_to_restricted_range;
831
   unsigned char bit_depth_minus_8;
832
   unsigned char chroma_scaling_from_luma;
833
   unsigned char grain_scale_shift;
834
   unsigned short random_seed;
835
} rvcn_dec_film_grain_params_t;
836

837
typedef struct rvcn_dec_av1_tile_info_s {
838
   unsigned int offset;
839
   unsigned int size;
840
} rvcn_dec_av1_tile_info_t;
841

842
typedef struct rvcn_dec_message_av1_s {
843
   unsigned int frame_header_flags;
844
   unsigned int current_frame_id;
845
   unsigned int frame_offset;
846

847
   unsigned char profile;
848
   unsigned char is_annexb;
849
   unsigned char frame_type;
850
   unsigned char primary_ref_frame;
851
   unsigned char curr_pic_idx;
852

853
   unsigned char sb_size;
854
   unsigned char interp_filter;
855
   unsigned char filter_level[2];
856
   unsigned char filter_level_u;
857
   unsigned char filter_level_v;
858
   unsigned char sharpness_level;
859
   signed char ref_deltas[8];
860
   signed char mode_deltas[2];
861
   unsigned char base_qindex;
862
   signed char y_dc_delta_q;
863
   signed char u_dc_delta_q;
864
   signed char v_dc_delta_q;
865
   signed char u_ac_delta_q;
866
   signed char v_ac_delta_q;
867
   signed char qm_y;
868
   signed char qm_u;
869
   signed char qm_v;
870
   signed char delta_q_res;
871
   signed char delta_lf_res;
872

873
   unsigned char tile_cols;
874
   unsigned char tile_rows;
875
   unsigned char tx_mode;
876
   unsigned char reference_mode;
877
   unsigned char chroma_format;
878
   unsigned int tile_size_bytes;
879
   unsigned int context_update_tile_id;
880
   unsigned int tile_col_start_sb[65];
881
   unsigned int tile_row_start_sb[65];
882
   unsigned int max_width;
883
   unsigned int max_height;
884
   unsigned int width;
885
   unsigned int height;
886
   unsigned int superres_upscaled_width;
887
   unsigned char superres_scale_denominator;
888
   unsigned char order_hint_bits;
889

890
   unsigned char ref_frame_map[8];
891
   unsigned int ref_frame_offset[8];
892
   unsigned char frame_refs[7];
893
   unsigned char ref_frame_sign_bias[7];
894

895
   unsigned char bit_depth_luma_minus8;
896
   unsigned char bit_depth_chroma_minus8;
897

898
   int feature_data[8][8];
899
   unsigned char feature_mask[8];
900

901
   unsigned char cdef_damping;
902
   unsigned char cdef_bits;
903
   unsigned short cdef_strengths[16];
904
   unsigned short cdef_uv_strengths[16];
905
   unsigned char frame_restoration_type[3];
906
   unsigned char log2_restoration_unit_size_minus5[3];
907

908
   unsigned char p010_mode;
909
   unsigned char msb_mode;
910
   unsigned char luma_10to8;
911
   unsigned char chroma_10to8;
912
   unsigned char preskip_segid;
913
   unsigned char last_active_segid;
914
   unsigned char seg_lossless_flag;
915
   unsigned char coded_lossless;
916
   rvcn_dec_film_grain_params_t film_grain;
917
   unsigned int uncompressed_header_size;
918
   rvcn_dec_warped_motion_params_t global_motion[8];
919
   rvcn_dec_av1_tile_info_t tile_info[256];
920
} rvcn_dec_message_av1_t;
921

922
typedef struct rvcn_dec_feature_index_s {
923
   unsigned int feature_id;
924
   unsigned int offset;
925
   unsigned int size;
926
   unsigned int filled;
927
} rvcn_dec_feature_index_t;
928

929
typedef struct rvcn_dec_feedback_header_s {
930
   unsigned int header_size;
931
   unsigned int total_size;
932
   unsigned int num_buffers;
933
   unsigned int status_report_feedback_number;
934
   unsigned int status;
935
   unsigned int value;
936
   unsigned int errorBits;
937
   rvcn_dec_feature_index_t index[1];
938
} rvcn_dec_feedback_header_t;
939

940
typedef struct rvcn_dec_feedback_profiling_s {
941
   unsigned int size;
942

943
   unsigned int decodingTime;
944
   unsigned int decodePlusOverhead;
945
   unsigned int masterTimerHits;
946
   unsigned int uvdLBSIREWaitCount;
947

948
   unsigned int avgMPCMemLatency;
949
   unsigned int maxMPCMemLatency;
950
   unsigned int uvdMPCLumaHits;
951
   unsigned int uvdMPCLumaHitPend;
952
   unsigned int uvdMPCLumaSearch;
953
   unsigned int uvdMPCChromaHits;
954
   unsigned int uvdMPCChromaHitPend;
955
   unsigned int uvdMPCChromaSearch;
956

957
   unsigned int uvdLMIPerfCountLo;
958
   unsigned int uvdLMIPerfCountHi;
959
   unsigned int uvdLMIAvgLatCntrEnvHit;
960
   unsigned int uvdLMILatCntr;
961

962
   unsigned int frameCRC0;
963
   unsigned int frameCRC1;
964
   unsigned int frameCRC2;
965
   unsigned int frameCRC3;
966

967
   unsigned int uvdLMIPerfMonCtrl;
968
   unsigned int uvdLMILatCtrl;
969
   unsigned int uvdMPCCntl;
970
   unsigned int reserved0[4];
971
   unsigned int decoderID;
972
   unsigned int codec;
973

974
   unsigned int dmaHwCrc32Enable;
975
   unsigned int dmaHwCrc32Value;
976
   unsigned int dmaHwCrc32Value2;
977
} rvcn_dec_feedback_profiling_t;
978

979
typedef struct rvcn_dec_vp9_nmv_ctx_mask_s {
980
   unsigned short classes_mask[2];
981
   unsigned short bits_mask[2];
982
   unsigned char joints_mask;
983
   unsigned char sign_mask[2];
984
   unsigned char class0_mask[2];
985
   unsigned char class0_fp_mask[2];
986
   unsigned char fp_mask[2];
987
   unsigned char class0_hp_mask[2];
988
   unsigned char hp_mask[2];
989
   unsigned char reserve[11];
990
} rvcn_dec_vp9_nmv_ctx_mask_t;
991

992
typedef struct rvcn_dec_vp9_nmv_component_s {
993
   unsigned char sign;
994
   unsigned char classes[10];
995
   unsigned char class0[1];
996
   unsigned char bits[10];
997
   unsigned char class0_fp[2][3];
998
   unsigned char fp[3];
999
   unsigned char class0_hp;
1000
   unsigned char hp;
1001
} rvcn_dec_vp9_nmv_component_t;
1002

1003
typedef struct rvcn_dec_vp9_probs_s {
1004
   rvcn_dec_vp9_nmv_ctx_mask_t nmvc_mask;
1005
   unsigned char coef_probs[4][2][2][6][6][3];
1006
   unsigned char y_mode_prob[4][9];
1007
   unsigned char uv_mode_prob[10][9];
1008
   unsigned char single_ref_prob[5][2];
1009
   unsigned char switchable_interp_prob[4][2];
1010
   unsigned char partition_prob[16][3];
1011
   unsigned char inter_mode_probs[7][3];
1012
   unsigned char mbskip_probs[3];
1013
   unsigned char intra_inter_prob[4];
1014
   unsigned char comp_inter_prob[5];
1015
   unsigned char comp_ref_prob[5];
1016
   unsigned char tx_probs_32x32[2][3];
1017
   unsigned char tx_probs_16x16[2][2];
1018
   unsigned char tx_probs_8x8[2][1];
1019
   unsigned char mv_joints[3];
1020
   rvcn_dec_vp9_nmv_component_t mv_comps[2];
1021
} rvcn_dec_vp9_probs_t;
1022

1023
typedef struct rvcn_dec_vp9_probs_segment_s {
1024
   union {
1025
      rvcn_dec_vp9_probs_t probs;
1026
      unsigned char probs_data[RDECODE_VP9_PROBS_DATA_SIZE];
1027
   };
1028

1029
   union {
1030
      struct {
1031
         unsigned int feature_data[8];
1032
         unsigned char tree_probs[7];
1033
         unsigned char pred_probs[3];
1034
         unsigned char abs_delta;
1035
         unsigned char feature_mask[8];
1036
      } seg;
1037
      unsigned char segment_data[256];
1038
   };
1039
} rvcn_dec_vp9_probs_segment_t;
1040

1041
typedef struct rvcn_dec_av1_fg_init_buf_s {
1042
   short luma_grain_block[64][96];
1043
   short cb_grain_block[32][48];
1044
   short cr_grain_block[32][48];
1045
   short scaling_lut_y[256];
1046
   short scaling_lut_cb[256];
1047
   short scaling_lut_cr[256];
1048
   unsigned short temp_tile_left_seed[256];
1049
} rvcn_dec_av1_fg_init_buf_t;
1050

1051
typedef struct rvcn_dec_av1_segment_fg_s {
1052
   union {
1053
      struct {
1054
         unsigned char feature_data[128];
1055
         unsigned char feature_mask[8];
1056
      } seg;
1057
      unsigned char segment_data[256];
1058
   };
1059
   rvcn_dec_av1_fg_init_buf_t fg_buf;
1060
} rvcn_dec_av1_segment_fg_t;
1061

1062
struct jpeg_params {
1063
   unsigned bsd_size;
1064
   unsigned dt_pitch;
1065
   unsigned dt_uv_pitch;
1066
   unsigned dt_luma_top_offset;
1067
   unsigned dt_chroma_top_offset;
1068
   bool direct_reg;
1069
};
1070

1071
struct rvcn_dec_dynamic_dpb_t2 {
1072
   struct list_head list;
1073
   uint8_t index;
1074
   struct rvid_buffer dpb;
1075
};
1076

1077
struct radeon_decoder {
1078
   struct pipe_video_codec base;
1079

1080
   unsigned stream_handle;
1081
   unsigned stream_type;
1082
   unsigned frame_number;
1083
   unsigned db_alignment;
1084
   unsigned dpb_size;
1085

1086
   struct pipe_screen *screen;
1087
   struct radeon_winsys *ws;
1088
   struct radeon_cmdbuf cs;
1089

1090
   void *msg;
1091
   uint32_t *fb;
1092
   uint8_t *it;
1093
   uint8_t *probs;
1094
   void *bs_ptr;
1095

1096
   struct rvid_buffer msg_fb_it_probs_buffers[NUM_BUFFERS];
1097
   struct rvid_buffer bs_buffers[NUM_BUFFERS];
1098
   struct rvid_buffer dpb;
1099
   struct rvid_buffer ctx;
1100
   struct rvid_buffer sessionctx;
1101

1102
   unsigned bs_size;
1103
   unsigned cur_buffer;
1104
   void *render_pic_list[32];
1105
   bool show_frame;
1106
   unsigned ref_idx;
1107
   bool tmz_ctx;
1108
   struct {
1109
      unsigned data0;
1110
      unsigned data1;
1111
      unsigned cmd;
1112
      unsigned cntl;
1113
   } reg;
1114
   struct jpeg_params jpg;
1115
   enum {
1116
      DPB_MAX_RES = 0,
1117
      DPB_DYNAMIC_TIER_1,
1118
      DPB_DYNAMIC_TIER_2
1119
   } dpb_type;
1120

1121
   struct {
1122
      enum {
1123
         CODEC_8_BITS = 0,
1124
         CODEC_10_BITS
1125
      } bts;
1126
      uint8_t index;
1127
      unsigned ref_size;
1128
      uint8_t ref_list[16];
1129
   } ref_codec;
1130

1131
   struct list_head dpb_ref_list;
1132
   struct list_head dpb_unref_list;
1133

1134
   void (*send_cmd)(struct radeon_decoder *dec, struct pipe_video_buffer *target,
1135
                    struct pipe_picture_desc *picture);
1136
};
1137

1138
void send_cmd_dec(struct radeon_decoder *dec, struct pipe_video_buffer *target,
1139
                  struct pipe_picture_desc *picture);
1140

1141
void send_cmd_jpeg(struct radeon_decoder *dec, struct pipe_video_buffer *target,
1142
                   struct pipe_picture_desc *picture);
1143

1144
struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
1145
                                               const struct pipe_video_codec *templat);
1146

1147
#endif
1148

1149
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