Path: blob/21.2-virgl/src/gallium/drivers/svga/include/svga3d_cmd.h
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/**********************************************************1* Copyright 1998-2017 VMware, Inc. All rights reserved.2*3* Permission is hereby granted, free of charge, to any person4* obtaining a copy of this software and associated documentation5* files (the "Software"), to deal in the Software without6* restriction, including without limitation the rights to use, copy,7* modify, merge, publish, distribute, sublicense, and/or sell copies8* of the Software, and to permit persons to whom the Software is9* furnished to do so, subject to the following conditions:10*11* The above copyright notice and this permission notice shall be12* included in all copies or substantial portions of the Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,15* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF16* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND17* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS18* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN19* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN20* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE21* SOFTWARE.22*23**********************************************************/2425/*26* svga3d_cmd.h --27*28* SVGA 3d hardware cmd definitions29*/3031#ifndef _SVGA3D_CMD_H_32#define _SVGA3D_CMD_H_3334#define INCLUDE_ALLOW_MODULE35#define INCLUDE_ALLOW_USERLEVEL36#define INCLUDE_ALLOW_VMCORE3738#include "includeCheck.h"39#include "svga3d_types.h"40#include "svga3d_limits.h"4142/*43* Identifiers for commands in the command FIFO.44*45* IDs between 1000 and 1039 (inclusive) were used by obsolete versions of46* the SVGA3D protocol and remain reserved; they should not be used in the47* future.48*49* IDs between 1040 and 2999 (inclusive) are available for use by the50* current SVGA3D protocol.51*52* FIFO clients other than SVGA3D should stay below 1000, or at 300053* and up.54*/5556typedef enum {57SVGA_3D_CMD_LEGACY_BASE = 1000,58SVGA_3D_CMD_BASE = 1040,5960SVGA_3D_CMD_SURFACE_DEFINE = 1040,61SVGA_3D_CMD_SURFACE_DESTROY = 1041,62SVGA_3D_CMD_SURFACE_COPY = 1042,63SVGA_3D_CMD_SURFACE_STRETCHBLT = 1043,64SVGA_3D_CMD_SURFACE_DMA = 1044,65SVGA_3D_CMD_CONTEXT_DEFINE = 1045,66SVGA_3D_CMD_CONTEXT_DESTROY = 1046,67SVGA_3D_CMD_SETTRANSFORM = 1047,68SVGA_3D_CMD_SETZRANGE = 1048,69SVGA_3D_CMD_SETRENDERSTATE = 1049,70SVGA_3D_CMD_SETRENDERTARGET = 1050,71SVGA_3D_CMD_SETTEXTURESTATE = 1051,72SVGA_3D_CMD_SETMATERIAL = 1052,73SVGA_3D_CMD_SETLIGHTDATA = 1053,74SVGA_3D_CMD_SETLIGHTENABLED = 1054,75SVGA_3D_CMD_SETVIEWPORT = 1055,76SVGA_3D_CMD_SETCLIPPLANE = 1056,77SVGA_3D_CMD_CLEAR = 1057,78SVGA_3D_CMD_PRESENT = 1058,79SVGA_3D_CMD_SHADER_DEFINE = 1059,80SVGA_3D_CMD_SHADER_DESTROY = 1060,81SVGA_3D_CMD_SET_SHADER = 1061,82SVGA_3D_CMD_SET_SHADER_CONST = 1062,83SVGA_3D_CMD_DRAW_PRIMITIVES = 1063,84SVGA_3D_CMD_SETSCISSORRECT = 1064,85SVGA_3D_CMD_BEGIN_QUERY = 1065,86SVGA_3D_CMD_END_QUERY = 1066,87SVGA_3D_CMD_WAIT_FOR_QUERY = 1067,88SVGA_3D_CMD_PRESENT_READBACK = 1068,89SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN = 1069,90SVGA_3D_CMD_SURFACE_DEFINE_V2 = 1070,91SVGA_3D_CMD_GENERATE_MIPMAPS = 1071,92SVGA_3D_CMD_DEAD4 = 1072,93SVGA_3D_CMD_DEAD5 = 1073,94SVGA_3D_CMD_DEAD6 = 1074,95SVGA_3D_CMD_DEAD7 = 1075,96SVGA_3D_CMD_DEAD8 = 1076,97SVGA_3D_CMD_DEAD9 = 1077,98SVGA_3D_CMD_DEAD10 = 1078,99SVGA_3D_CMD_DEAD11 = 1079,100SVGA_3D_CMD_ACTIVATE_SURFACE = 1080,101SVGA_3D_CMD_DEACTIVATE_SURFACE = 1081,102SVGA_3D_CMD_SCREEN_DMA = 1082,103SVGA_3D_CMD_DEAD1 = 1083,104SVGA_3D_CMD_DEAD2 = 1084,105106SVGA_3D_CMD_DEAD12 = 1085,107SVGA_3D_CMD_DEAD13 = 1086,108SVGA_3D_CMD_DEAD14 = 1087,109SVGA_3D_CMD_DEAD15 = 1088,110SVGA_3D_CMD_DEAD16 = 1089,111SVGA_3D_CMD_DEAD17 = 1090,112113SVGA_3D_CMD_SET_OTABLE_BASE = 1091,114SVGA_3D_CMD_READBACK_OTABLE = 1092,115116SVGA_3D_CMD_DEFINE_GB_MOB = 1093,117SVGA_3D_CMD_DESTROY_GB_MOB = 1094,118SVGA_3D_CMD_DEAD3 = 1095,119SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING = 1096,120121SVGA_3D_CMD_DEFINE_GB_SURFACE = 1097,122SVGA_3D_CMD_DESTROY_GB_SURFACE = 1098,123SVGA_3D_CMD_BIND_GB_SURFACE = 1099,124SVGA_3D_CMD_COND_BIND_GB_SURFACE = 1100,125SVGA_3D_CMD_UPDATE_GB_IMAGE = 1101,126SVGA_3D_CMD_UPDATE_GB_SURFACE = 1102,127SVGA_3D_CMD_READBACK_GB_IMAGE = 1103,128SVGA_3D_CMD_READBACK_GB_SURFACE = 1104,129SVGA_3D_CMD_INVALIDATE_GB_IMAGE = 1105,130SVGA_3D_CMD_INVALIDATE_GB_SURFACE = 1106,131132SVGA_3D_CMD_DEFINE_GB_CONTEXT = 1107,133SVGA_3D_CMD_DESTROY_GB_CONTEXT = 1108,134SVGA_3D_CMD_BIND_GB_CONTEXT = 1109,135SVGA_3D_CMD_READBACK_GB_CONTEXT = 1110,136SVGA_3D_CMD_INVALIDATE_GB_CONTEXT = 1111,137138SVGA_3D_CMD_DEFINE_GB_SHADER = 1112,139SVGA_3D_CMD_DESTROY_GB_SHADER = 1113,140SVGA_3D_CMD_BIND_GB_SHADER = 1114,141142SVGA_3D_CMD_SET_OTABLE_BASE64 = 1115,143144SVGA_3D_CMD_BEGIN_GB_QUERY = 1116,145SVGA_3D_CMD_END_GB_QUERY = 1117,146SVGA_3D_CMD_WAIT_FOR_GB_QUERY = 1118,147148SVGA_3D_CMD_NOP = 1119,149150SVGA_3D_CMD_ENABLE_GART = 1120,151SVGA_3D_CMD_DISABLE_GART = 1121,152SVGA_3D_CMD_MAP_MOB_INTO_GART = 1122,153SVGA_3D_CMD_UNMAP_GART_RANGE = 1123,154155SVGA_3D_CMD_DEFINE_GB_SCREENTARGET = 1124,156SVGA_3D_CMD_DESTROY_GB_SCREENTARGET = 1125,157SVGA_3D_CMD_BIND_GB_SCREENTARGET = 1126,158SVGA_3D_CMD_UPDATE_GB_SCREENTARGET = 1127,159160SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL = 1128,161SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL = 1129,162163SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE = 1130,164165SVGA_3D_CMD_GB_SCREEN_DMA = 1131,166SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH = 1132,167SVGA_3D_CMD_GB_MOB_FENCE = 1133,168SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 = 1134,169SVGA_3D_CMD_DEFINE_GB_MOB64 = 1135,170SVGA_3D_CMD_REDEFINE_GB_MOB64 = 1136,171SVGA_3D_CMD_NOP_ERROR = 1137,172173SVGA_3D_CMD_SET_VERTEX_STREAMS = 1138,174SVGA_3D_CMD_SET_VERTEX_DECLS = 1139,175SVGA_3D_CMD_SET_VERTEX_DIVISORS = 1140,176SVGA_3D_CMD_DRAW = 1141,177SVGA_3D_CMD_DRAW_INDEXED = 1142,178179/*180* DX10 Commands181*/182SVGA_3D_CMD_DX_MIN = 1143,183SVGA_3D_CMD_DX_DEFINE_CONTEXT = 1143,184SVGA_3D_CMD_DX_DESTROY_CONTEXT = 1144,185SVGA_3D_CMD_DX_BIND_CONTEXT = 1145,186SVGA_3D_CMD_DX_READBACK_CONTEXT = 1146,187SVGA_3D_CMD_DX_INVALIDATE_CONTEXT = 1147,188SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER = 1148,189SVGA_3D_CMD_DX_SET_SHADER_RESOURCES = 1149,190SVGA_3D_CMD_DX_SET_SHADER = 1150,191SVGA_3D_CMD_DX_SET_SAMPLERS = 1151,192SVGA_3D_CMD_DX_DRAW = 1152,193SVGA_3D_CMD_DX_DRAW_INDEXED = 1153,194SVGA_3D_CMD_DX_DRAW_INSTANCED = 1154,195SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED = 1155,196SVGA_3D_CMD_DX_DRAW_AUTO = 1156,197SVGA_3D_CMD_DX_SET_INPUT_LAYOUT = 1157,198SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS = 1158,199SVGA_3D_CMD_DX_SET_INDEX_BUFFER = 1159,200SVGA_3D_CMD_DX_SET_TOPOLOGY = 1160,201SVGA_3D_CMD_DX_SET_RENDERTARGETS = 1161,202SVGA_3D_CMD_DX_SET_BLEND_STATE = 1162,203SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE = 1163,204SVGA_3D_CMD_DX_SET_RASTERIZER_STATE = 1164,205SVGA_3D_CMD_DX_DEFINE_QUERY = 1165,206SVGA_3D_CMD_DX_DESTROY_QUERY = 1166,207SVGA_3D_CMD_DX_BIND_QUERY = 1167,208SVGA_3D_CMD_DX_SET_QUERY_OFFSET = 1168,209SVGA_3D_CMD_DX_BEGIN_QUERY = 1169,210SVGA_3D_CMD_DX_END_QUERY = 1170,211SVGA_3D_CMD_DX_READBACK_QUERY = 1171,212SVGA_3D_CMD_DX_SET_PREDICATION = 1172,213SVGA_3D_CMD_DX_SET_SOTARGETS = 1173,214SVGA_3D_CMD_DX_SET_VIEWPORTS = 1174,215SVGA_3D_CMD_DX_SET_SCISSORRECTS = 1175,216SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW = 1176,217SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW = 1177,218SVGA_3D_CMD_DX_PRED_COPY_REGION = 1178,219SVGA_3D_CMD_DX_PRED_COPY = 1179,220SVGA_3D_CMD_DX_PRESENTBLT = 1180,221SVGA_3D_CMD_DX_GENMIPS = 1181,222SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE = 1182,223SVGA_3D_CMD_DX_READBACK_SUBRESOURCE = 1183,224SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE = 1184,225SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW = 1185,226SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW = 1186,227SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW = 1187,228SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW = 1188,229SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW = 1189,230SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW = 1190,231SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT = 1191,232SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT = 1192,233SVGA_3D_CMD_DX_DEFINE_BLEND_STATE = 1193,234SVGA_3D_CMD_DX_DESTROY_BLEND_STATE = 1194,235SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE = 1195,236SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE = 1196,237SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE = 1197,238SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE = 1198,239SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE = 1199,240SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE = 1200,241SVGA_3D_CMD_DX_DEFINE_SHADER = 1201,242SVGA_3D_CMD_DX_DESTROY_SHADER = 1202,243SVGA_3D_CMD_DX_BIND_SHADER = 1203,244SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT = 1204,245SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT = 1205,246SVGA_3D_CMD_DX_SET_STREAMOUTPUT = 1206,247SVGA_3D_CMD_DX_SET_COTABLE = 1207,248SVGA_3D_CMD_DX_READBACK_COTABLE = 1208,249SVGA_3D_CMD_DX_BUFFER_COPY = 1209,250SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER = 1210,251SVGA_3D_CMD_DX_SURFACE_COPY_AND_READBACK = 1211,252SVGA_3D_CMD_DX_MOVE_QUERY = 1212,253SVGA_3D_CMD_DX_BIND_ALL_QUERY = 1213,254SVGA_3D_CMD_DX_READBACK_ALL_QUERY = 1214,255SVGA_3D_CMD_DX_PRED_TRANSFER_FROM_BUFFER = 1215,256SVGA_3D_CMD_DX_MOB_FENCE_64 = 1216,257SVGA_3D_CMD_DX_BIND_ALL_SHADER = 1217,258SVGA_3D_CMD_DX_HINT = 1218,259SVGA_3D_CMD_DX_BUFFER_UPDATE = 1219,260SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET = 1220,261SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET = 1221,262SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET = 1222,263SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET = 1223,264SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET = 1224,265SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET = 1225,266267SVGA_3D_CMD_DX_COND_BIND_ALL_SHADER = 1226,268SVGA_3D_CMD_DX_MAX = 1227,269270SVGA_3D_CMD_SCREEN_COPY = 1227,271272SVGA_3D_CMD_VIDEO_DEFINE_DECODER = 1228,273SVGA_3D_CMD_VIDEO_DESTROY_DECODER = 1229,274SVGA_3D_CMD_VIDEO_DEFINE_PROCESSOR = 1230,275SVGA_3D_CMD_VIDEO_DESTROY_PROCESSOR = 1231,276SVGA_3D_CMD_VIDEO_DECODE_FRAME = 1232,277SVGA_3D_CMD_VIDEO_PROCESS_FRAME = 1233,278SVGA_3D_CMD_VIDEO_BIND_DECODER_MOB = 1234,279SVGA_3D_CMD_VIDEO_READBACK_DECODER_MOB = 1235,280281SVGA_3D_CMD_GROW_OTABLE = 1236,282SVGA_3D_CMD_DX_GROW_COTABLE = 1237,283SVGA_3D_CMD_INTRA_SURFACE_COPY = 1238,284285SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 = 1239,286287SVGA_3D_CMD_DX_RESOLVE_COPY = 1240,288SVGA_3D_CMD_DX_PRED_RESOLVE_COPY = 1241,289SVGA_3D_CMD_DX_PRED_CONVERT_REGION = 1242,290SVGA_3D_CMD_DX_PRED_CONVERT = 1243,291SVGA_3D_CMD_WHOLE_SURFACE_COPY = 1244,292293SVGA_3D_CMD_DX_DEFINE_UA_VIEW = 1245,294SVGA_3D_CMD_DX_DESTROY_UA_VIEW = 1246,295SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT = 1247,296SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT = 1248,297SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT = 1249,298SVGA_3D_CMD_DX_SET_UA_VIEWS = 1250,299300SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT = 1251,301SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT = 1252,302SVGA_3D_CMD_DX_DISPATCH = 1253,303SVGA_3D_CMD_DX_DISPATCH_INDIRECT = 1254,304305SVGA_3D_CMD_WRITE_ZERO_SURFACE = 1255,306SVGA_3D_CMD_HINT_ZERO_SURFACE = 1256,307SVGA_3D_CMD_DX_TRANSFER_TO_BUFFER = 1257,308SVGA_3D_CMD_DX_SET_STRUCTURE_COUNT = 1258,309310SVGA_3D_CMD_LOGICOPS_BITBLT = 1259,311SVGA_3D_CMD_LOGICOPS_TRANSBLT = 1260,312SVGA_3D_CMD_LOGICOPS_STRETCHBLT = 1261,313SVGA_3D_CMD_LOGICOPS_COLORFILL = 1262,314SVGA_3D_CMD_LOGICOPS_ALPHABLEND = 1263,315SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND = 1264,316317SVGA_3D_CMD_DX_COPY_COTABLE_INTO_MOB = 1265,318319SVGA_3D_CMD_UPDATE_GB_SCREENTARGET_V2 = 1266,320SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 = 1267,321SVGA_3D_CMD_DX_SET_CS_UA_VIEWS = 1268,322SVGA_3D_CMD_DX_SET_MIN_LOD = 1269,323SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW_BOX = 1270,324SVGA_3D_CMD_DX_CLEAR_UA_VIEW_BOX = 1271,325SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2 = 1272,326SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB = 1273,327SVGA_3D_CMD_DX_SET_SHADER_IFACE = 1274,328SVGA_3D_CMD_DX_BIND_STREAMOUTPUT = 1275,329330SVGA_3D_CMD_MAX = 1276,331SVGA_3D_CMD_FUTURE_MAX = 3000332} SVGAFifo3dCmdId;333334/*335* FIFO command format definitions:336*/337338/*339* The data size header following cmdNum for every 3d command340*/341typedef342#include "vmware_pack_begin.h"343struct {344uint32 id;345uint32 size;346}347#include "vmware_pack_end.h"348SVGA3dCmdHeader;349350typedef351#include "vmware_pack_begin.h"352struct {353uint32 numMipLevels;354}355#include "vmware_pack_end.h"356SVGA3dSurfaceFace;357358typedef359#include "vmware_pack_begin.h"360struct {361uint32 sid;362SVGA3dSurface1Flags surfaceFlags;363SVGA3dSurfaceFormat format;364365/*366* If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace367* structures must have the same value of numMipLevels field.368* Otherwise, all but the first SVGA3dSurfaceFace structures must have the369* numMipLevels set to 0.370*/371SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];372373/*374* Followed by an SVGA3dSize structure for each mip level in each face.375*376* A note on surface sizes: Sizes are always specified in pixels,377* even if the true surface size is not a multiple of the minimum378* block size of the surface's format. For example, a 3x3x1 DXT1379* compressed texture would actually be stored as a 4x4x1 image in380* memory.381*/382}383#include "vmware_pack_end.h"384SVGA3dCmdDefineSurface; /* SVGA_3D_CMD_SURFACE_DEFINE */385386typedef387#include "vmware_pack_begin.h"388struct {389uint32 sid;390SVGA3dSurface1Flags surfaceFlags;391SVGA3dSurfaceFormat format;392393/*394* If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace395* structures must have the same value of numMipLevels field.396* Otherwise, all but the first SVGA3dSurfaceFace structures must have the397* numMipLevels set to 0.398*/399SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];400uint32 multisampleCount;401SVGA3dTextureFilter autogenFilter;402403/*404* Followed by an SVGA3dSize structure for each mip level in each face.405*406* A note on surface sizes: Sizes are always specified in pixels,407* even if the true surface size is not a multiple of the minimum408* block size of the surface's format. For example, a 3x3x1 DXT1409* compressed texture would actually be stored as a 4x4x1 image in410* memory.411*/412}413#include "vmware_pack_end.h"414SVGA3dCmdDefineSurface_v2; /* SVGA_3D_CMD_SURFACE_DEFINE_V2 */415416typedef417#include "vmware_pack_begin.h"418struct {419uint32 sid;420}421#include "vmware_pack_end.h"422SVGA3dCmdDestroySurface; /* SVGA_3D_CMD_SURFACE_DESTROY */423424typedef425#include "vmware_pack_begin.h"426struct {427uint32 cid;428}429#include "vmware_pack_end.h"430SVGA3dCmdDefineContext; /* SVGA_3D_CMD_CONTEXT_DEFINE */431432typedef433#include "vmware_pack_begin.h"434struct {435uint32 cid;436}437#include "vmware_pack_end.h"438SVGA3dCmdDestroyContext; /* SVGA_3D_CMD_CONTEXT_DESTROY */439440typedef441#include "vmware_pack_begin.h"442struct {443uint32 cid;444SVGA3dClearFlag clearFlag;445uint32 color;446float depth;447uint32 stencil;448/* Followed by variable number of SVGA3dRect structures */449}450#include "vmware_pack_end.h"451SVGA3dCmdClear; /* SVGA_3D_CMD_CLEAR */452453typedef454#include "vmware_pack_begin.h"455struct {456SVGA3dLightType type;457SVGA3dBool inWorldSpace;458float diffuse[4];459float specular[4];460float ambient[4];461float position[4];462float direction[4];463float range;464float falloff;465float attenuation0;466float attenuation1;467float attenuation2;468float theta;469float phi;470}471#include "vmware_pack_end.h"472SVGA3dLightData;473474typedef475#include "vmware_pack_begin.h"476struct {477uint32 sid;478/* Followed by variable number of SVGA3dCopyRect structures */479}480#include "vmware_pack_end.h"481SVGA3dCmdPresent; /* SVGA_3D_CMD_PRESENT */482483typedef484#include "vmware_pack_begin.h"485struct {486SVGA3dRenderStateName state;487union {488uint32 uintValue;489float floatValue;490};491}492#include "vmware_pack_end.h"493SVGA3dRenderState;494495typedef496#include "vmware_pack_begin.h"497struct {498uint32 cid;499/* Followed by variable number of SVGA3dRenderState structures */500}501#include "vmware_pack_end.h"502SVGA3dCmdSetRenderState; /* SVGA_3D_CMD_SETRENDERSTATE */503504typedef505#include "vmware_pack_begin.h"506struct {507uint32 cid;508SVGA3dRenderTargetType type;509SVGA3dSurfaceImageId target;510}511#include "vmware_pack_end.h"512SVGA3dCmdSetRenderTarget; /* SVGA_3D_CMD_SETRENDERTARGET */513514typedef515#include "vmware_pack_begin.h"516struct {517SVGA3dSurfaceImageId src;518SVGA3dSurfaceImageId dest;519/* Followed by variable number of SVGA3dCopyBox structures */520}521#include "vmware_pack_end.h"522SVGA3dCmdSurfaceCopy; /* SVGA_3D_CMD_SURFACE_COPY */523524/*525* Perform a surface copy within the same image.526* The src/dest boxes are allowed to overlap.527*/528typedef529#include "vmware_pack_begin.h"530struct {531SVGA3dSurfaceImageId surface;532SVGA3dCopyBox box;533}534#include "vmware_pack_end.h"535SVGA3dCmdIntraSurfaceCopy; /* SVGA_3D_CMD_INTRA_SURFACE_COPY */536537typedef538#include "vmware_pack_begin.h"539struct {540SVGA3dSurfaceImageId src;541SVGA3dSurfaceImageId dest;542SVGA3dBox boxSrc;543SVGA3dBox boxDest;544SVGA3dStretchBltMode mode;545}546#include "vmware_pack_end.h"547SVGA3dCmdSurfaceStretchBlt; /* SVGA_3D_CMD_SURFACE_STRETCHBLT */548549typedef550#include "vmware_pack_begin.h"551struct {552/*553* If the discard flag is present in a surface DMA operation, the host may554* discard the contents of the current mipmap level and face of the target555* surface before applying the surface DMA contents.556*/557uint32 discard : 1;558559/*560* If the unsynchronized flag is present, the host may perform this upload561* without syncing to pending reads on this surface.562*/563uint32 unsynchronized : 1;564565/*566* Guests *MUST* set the reserved bits to 0 before submitting the command567* suffix as future flags may occupy these bits.568*/569uint32 reserved : 30;570}571#include "vmware_pack_end.h"572SVGA3dSurfaceDMAFlags;573574typedef575#include "vmware_pack_begin.h"576struct {577SVGAGuestImage guest;578SVGA3dSurfaceImageId host;579SVGA3dTransferType transfer;580581/*582* Followed by variable number of SVGA3dCopyBox structures. For consistency583* in all clipping logic and coordinate translation, we define the584* "source" in each copyBox as the guest image and the585* "destination" as the host image, regardless of transfer586* direction.587*588* For efficiency, the SVGA3D device is free to copy more data than589* specified. For example, it may round copy boxes outwards such590* that they lie on particular alignment boundaries.591*/592}593#include "vmware_pack_end.h"594SVGA3dCmdSurfaceDMA; /* SVGA_3D_CMD_SURFACE_DMA */595596/*597* SVGA3dCmdSurfaceDMASuffix --598*599* This is a command suffix that will appear after a SurfaceDMA command in600* the FIFO. It contains some extra information that hosts may use to601* optimize performance or protect the guest. This suffix exists to preserve602* backwards compatibility while also allowing for new functionality to be603* implemented.604*/605606typedef607#include "vmware_pack_begin.h"608struct {609uint32 suffixSize;610611/*612* The maximum offset is used to determine the maximum offset from the613* guestPtr base address that will be accessed or written to during this614* surfaceDMA. If the suffix is supported, the host will respect this615* boundary while performing surface DMAs.616*617* Defaults to MAX_UINT32618*/619uint32 maximumOffset;620621/*622* A set of flags that describes optimizations that the host may perform623* while performing this surface DMA operation. The guest should never rely624* on behaviour that is different when these flags are set for correctness.625*626* Defaults to 0627*/628SVGA3dSurfaceDMAFlags flags;629}630#include "vmware_pack_end.h"631SVGA3dCmdSurfaceDMASuffix;632633/*634* SVGA_3D_CMD_DRAW_PRIMITIVES --635*636* This command is the SVGA3D device's generic drawing entry point.637* It can draw multiple ranges of primitives, optionally using an638* index buffer, using an arbitrary collection of vertex buffers.639*640* Each SVGA3dVertexDecl defines a distinct vertex array to bind641* during this draw call. The declarations specify which surface642* the vertex data lives in, what that vertex data is used for,643* and how to interpret it.644*645* Each SVGA3dPrimitiveRange defines a collection of primitives646* to render using the same vertex arrays. An index buffer is647* optional.648*/649650typedef651#include "vmware_pack_begin.h"652struct {653/*654* A range hint is an optional specification for the range of indices655* in an SVGA3dArray that will be used. If 'last' is zero, it is assumed656* that the entire array will be used.657*658* These are only hints. The SVGA3D device may use them for659* performance optimization if possible, but it's also allowed to660* ignore these values.661*/662uint32 first;663uint32 last;664}665#include "vmware_pack_end.h"666SVGA3dArrayRangeHint;667668typedef669#include "vmware_pack_begin.h"670struct {671/*672* Define the origin and shape of a vertex or index array. Both673* 'offset' and 'stride' are in bytes. The provided surface will be674* reinterpreted as a flat array of bytes in the same format used675* by surface DMA operations. To avoid unnecessary conversions, the676* surface should be created with the SVGA3D_BUFFER format.677*678* Index 0 in the array starts 'offset' bytes into the surface.679* Index 1 begins at byte 'offset + stride', etc. Array indices may680* not be negative.681*/682uint32 surfaceId;683uint32 offset;684uint32 stride;685}686#include "vmware_pack_end.h"687SVGA3dArray;688689typedef690#include "vmware_pack_begin.h"691struct {692/*693* Describe a vertex array's data type, and define how it is to be694* used by the fixed function pipeline or the vertex shader. It695* isn't useful to have two VertexDecls with the same696* VertexArrayIdentity in one draw call.697*/698SVGA3dDeclType type;699SVGA3dDeclMethod method;700SVGA3dDeclUsage usage;701uint32 usageIndex;702}703#include "vmware_pack_end.h"704SVGA3dVertexArrayIdentity;705706typedef707#include "vmware_pack_begin.h"708struct SVGA3dVertexDecl {709SVGA3dVertexArrayIdentity identity;710SVGA3dArray array;711SVGA3dArrayRangeHint rangeHint;712}713#include "vmware_pack_end.h"714SVGA3dVertexDecl;715716typedef717#include "vmware_pack_begin.h"718struct SVGA3dPrimitiveRange {719/*720* Define a group of primitives to render, from sequential indices.721*722* The value of 'primitiveType' and 'primitiveCount' imply the723* total number of vertices that will be rendered.724*/725SVGA3dPrimitiveType primType;726uint32 primitiveCount;727728/*729* Optional index buffer. If indexArray.surfaceId is730* SVGA3D_INVALID_ID, we render without an index buffer. Rendering731* without an index buffer is identical to rendering with an index732* buffer containing the sequence [0, 1, 2, 3, ...].733*734* If an index buffer is in use, indexWidth specifies the width in735* bytes of each index value. It must be less than or equal to736* indexArray.stride.737*738* (Currently, the SVGA3D device requires index buffers to be tightly739* packed. In other words, indexWidth == indexArray.stride)740*/741SVGA3dArray indexArray;742uint32 indexWidth;743744/*745* Optional index bias. This number is added to all indices from746* indexArray before they are used as vertex array indices. This747* can be used in multiple ways:748*749* - When not using an indexArray, this bias can be used to750* specify where in the vertex arrays to begin rendering.751*752* - A positive number here is equivalent to increasing the753* offset in each vertex array.754*755* - A negative number can be used to render using a small756* vertex array and an index buffer that contains large757* values. This may be used by some applications that758* crop a vertex buffer without modifying their index759* buffer.760*761* Note that rendering with a negative bias value may be slower and762* use more memory than rendering with a positive or zero bias.763*/764int32 indexBias;765}766#include "vmware_pack_end.h"767SVGA3dPrimitiveRange;768769typedef770#include "vmware_pack_begin.h"771struct {772uint32 cid;773uint32 numVertexDecls;774uint32 numRanges;775776/*777* There are two variable size arrays after the778* SVGA3dCmdDrawPrimitives structure. In order,779* they are:780*781* 1. SVGA3dVertexDecl, quantity 'numVertexDecls', but no more than782* SVGA3D_MAX_VERTEX_ARRAYS;783* 2. SVGA3dPrimitiveRange, quantity 'numRanges', but no more than784* SVGA3D_MAX_DRAW_PRIMITIVE_RANGES;785* 3. Optionally, SVGA3dVertexDivisor, quantity 'numVertexDecls' (contains786* the frequency divisor for the corresponding vertex decl).787*/788}789#include "vmware_pack_end.h"790SVGA3dCmdDrawPrimitives; /* SVGA_3D_CMD_DRAWPRIMITIVES */791792typedef793#include "vmware_pack_begin.h"794struct {795uint32 cid;796797uint32 primitiveCount; // How many primitives to render798uint32 startVertexLocation; // Which vertex do we start rendering at.799800uint8 primitiveType; // SVGA3dPrimitiveType801uint8 padding[3];802}803#include "vmware_pack_end.h"804SVGA3dCmdDraw;805806typedef807#include "vmware_pack_begin.h"808struct {809uint32 cid;810811uint8 primitiveType; // SVGA3dPrimitiveType812813uint32 indexBufferSid; // Valid index buffer sid.814uint32 indexBufferOffset; // Byte offset into the vertex buffer, almost815// always 0 for DX9 guests, non-zero for OpenGL816// guests. We can't represent non-multiple of817// stride offsets in D3D9Renderer...818uint8 indexBufferStride; // Allowable values = 1, 2, or 4819820int32 baseVertexLocation; // Bias applied to the index when selecting a821// vertex from the streams, may be negative822823uint32 primitiveCount; // How many primitives to render824uint32 pad0;825uint16 pad1;826}827#include "vmware_pack_end.h"828SVGA3dCmdDrawIndexed;829830typedef831#include "vmware_pack_begin.h"832struct {833/*834* Describe a vertex array's data type, and define how it is to be835* used by the fixed function pipeline or the vertex shader. It836* isn't useful to have two VertexDecls with the same837* VertexArrayIdentity in one draw call.838*/839uint16 streamOffset;840uint8 stream;841uint8 type; // SVGA3dDeclType842uint8 method; // SVGA3dDeclMethod843uint8 usage; // SVGA3dDeclUsage844uint8 usageIndex;845uint8 padding;846847}848#include "vmware_pack_end.h"849SVGA3dVertexElement;850851/*852* Should the vertex element respect the stream value? The high bit of the853* stream should be set to indicate that the stream should be respected. If854* the high bit is not set, the stream will be ignored and replaced by the index855* of the position of the currently considered vertex element.856*857* All guests should set this bit and correctly specify the stream going858* forward.859*/860#define SVGA3D_VERTEX_ELEMENT_RESPECT_STREAM (1 << 7)861862typedef863#include "vmware_pack_begin.h"864struct {865uint32 cid;866867uint32 numElements;868869/*870* Followed by numElements SVGA3dVertexElement structures.871*872* If numElements < SVGA3D_MAX_VERTEX_ARRAYS, the remaining elements873* are cleared and will not be used by following draws.874*/875}876#include "vmware_pack_end.h"877SVGA3dCmdSetVertexDecls;878879typedef880#include "vmware_pack_begin.h"881struct {882uint32 sid;883uint32 stride;884uint32 offset;885}886#include "vmware_pack_end.h"887SVGA3dVertexStream;888889typedef890#include "vmware_pack_begin.h"891struct {892uint32 cid;893894uint32 numStreams;895/*896* Followed by numStream SVGA3dVertexStream structures.897*898* If numStreams < SVGA3D_MAX_VERTEX_ARRAYS, the remaining streams899* are cleared and will not be used by following draws.900*/901}902#include "vmware_pack_end.h"903SVGA3dCmdSetVertexStreams;904905typedef906#include "vmware_pack_begin.h"907struct {908uint32 cid;909uint32 numDivisors;910}911#include "vmware_pack_end.h"912SVGA3dCmdSetVertexDivisors;913914typedef915#include "vmware_pack_begin.h"916struct {917uint32 stage;918SVGA3dTextureStateName name;919union {920uint32 value;921float floatValue;922};923}924#include "vmware_pack_end.h"925SVGA3dTextureState;926927typedef928#include "vmware_pack_begin.h"929struct {930uint32 cid;931/* Followed by variable number of SVGA3dTextureState structures */932}933#include "vmware_pack_end.h"934SVGA3dCmdSetTextureState; /* SVGA_3D_CMD_SETTEXTURESTATE */935936typedef937#include "vmware_pack_begin.h"938struct {939uint32 cid;940SVGA3dTransformType type;941float matrix[16];942}943#include "vmware_pack_end.h"944SVGA3dCmdSetTransform; /* SVGA_3D_CMD_SETTRANSFORM */945946typedef947#include "vmware_pack_begin.h"948struct {949float min;950float max;951}952#include "vmware_pack_end.h"953SVGA3dZRange;954955typedef956#include "vmware_pack_begin.h"957struct {958uint32 cid;959SVGA3dZRange zRange;960}961#include "vmware_pack_end.h"962SVGA3dCmdSetZRange; /* SVGA_3D_CMD_SETZRANGE */963964typedef965#include "vmware_pack_begin.h"966struct {967float diffuse[4];968float ambient[4];969float specular[4];970float emissive[4];971float shininess;972}973#include "vmware_pack_end.h"974SVGA3dMaterial;975976typedef977#include "vmware_pack_begin.h"978struct {979uint32 cid;980SVGA3dFace face;981SVGA3dMaterial material;982}983#include "vmware_pack_end.h"984SVGA3dCmdSetMaterial; /* SVGA_3D_CMD_SETMATERIAL */985986typedef987#include "vmware_pack_begin.h"988struct {989uint32 cid;990uint32 index;991SVGA3dLightData data;992}993#include "vmware_pack_end.h"994SVGA3dCmdSetLightData; /* SVGA_3D_CMD_SETLIGHTDATA */995996typedef997#include "vmware_pack_begin.h"998struct {999uint32 cid;1000uint32 index;1001uint32 enabled;1002}1003#include "vmware_pack_end.h"1004SVGA3dCmdSetLightEnabled; /* SVGA_3D_CMD_SETLIGHTENABLED */10051006typedef1007#include "vmware_pack_begin.h"1008struct {1009uint32 cid;1010SVGA3dRect rect;1011}1012#include "vmware_pack_end.h"1013SVGA3dCmdSetViewport; /* SVGA_3D_CMD_SETVIEWPORT */10141015typedef1016#include "vmware_pack_begin.h"1017struct {1018uint32 cid;1019SVGA3dRect rect;1020}1021#include "vmware_pack_end.h"1022SVGA3dCmdSetScissorRect; /* SVGA_3D_CMD_SETSCISSORRECT */10231024typedef1025#include "vmware_pack_begin.h"1026struct {1027uint32 cid;1028uint32 index;1029float plane[4];1030}1031#include "vmware_pack_end.h"1032SVGA3dCmdSetClipPlane; /* SVGA_3D_CMD_SETCLIPPLANE */10331034typedef1035#include "vmware_pack_begin.h"1036struct {1037uint32 cid;1038uint32 shid;1039SVGA3dShaderType type;1040/* Followed by variable number of DWORDs for shader bycode */1041}1042#include "vmware_pack_end.h"1043SVGA3dCmdDefineShader; /* SVGA_3D_CMD_SHADER_DEFINE */10441045typedef1046#include "vmware_pack_begin.h"1047struct {1048uint32 cid;1049uint32 shid;1050SVGA3dShaderType type;1051}1052#include "vmware_pack_end.h"1053SVGA3dCmdDestroyShader; /* SVGA_3D_CMD_SHADER_DESTROY */10541055typedef1056#include "vmware_pack_begin.h"1057struct {1058uint32 cid;1059uint32 reg; /* register number */1060SVGA3dShaderType type;1061SVGA3dShaderConstType ctype;1062uint32 values[4];10631064/*1065* Followed by a variable number of additional values.1066*/1067}1068#include "vmware_pack_end.h"1069SVGA3dCmdSetShaderConst; /* SVGA_3D_CMD_SET_SHADER_CONST */10701071typedef1072#include "vmware_pack_begin.h"1073struct {1074uint32 cid;1075SVGA3dShaderType type;1076uint32 shid;1077}1078#include "vmware_pack_end.h"1079SVGA3dCmdSetShader; /* SVGA_3D_CMD_SET_SHADER */10801081typedef1082#include "vmware_pack_begin.h"1083struct {1084uint32 cid;1085SVGA3dQueryType type;1086}1087#include "vmware_pack_end.h"1088SVGA3dCmdBeginQuery; /* SVGA_3D_CMD_BEGIN_QUERY */10891090typedef1091#include "vmware_pack_begin.h"1092struct {1093uint32 cid;1094SVGA3dQueryType type;1095SVGAGuestPtr guestResult; /* Points to an SVGA3dQueryResult structure */1096}1097#include "vmware_pack_end.h"1098SVGA3dCmdEndQuery; /* SVGA_3D_CMD_END_QUERY */109911001101/*1102* SVGA3D_CMD_WAIT_FOR_QUERY --1103*1104* Will read the SVGA3dQueryResult structure pointed to by guestResult,1105* and if the state member is set to anything else than1106* SVGA3D_QUERYSTATE_PENDING, this command will always be a no-op.1107*1108* Otherwise, in addition to the query explicitly waited for,1109* All queries with the same type and issued with the same cid, for which1110* an SVGA_3D_CMD_END_QUERY command has previously been sent, will1111* be finished after execution of this command.1112*1113* A query will be identified by the gmrId and offset of the guestResult1114* member. If the device can't find an SVGA_3D_CMD_END_QUERY that has1115* been sent previously with an identical gmrId and offset, it will1116* effectively end all queries with an identical type issued with the1117* same cid, and the SVGA3dQueryResult structure pointed to by1118* guestResult will not be written to. This property can be used to1119* implement a query barrier for a given cid and query type.1120*/11211122typedef1123#include "vmware_pack_begin.h"1124struct {1125uint32 cid; /* Same parameters passed to END_QUERY */1126SVGA3dQueryType type;1127SVGAGuestPtr guestResult;1128}1129#include "vmware_pack_end.h"1130SVGA3dCmdWaitForQuery; /* SVGA_3D_CMD_WAIT_FOR_QUERY */11311132typedef1133#include "vmware_pack_begin.h"1134struct {1135uint32 totalSize; /* Set by guest before query is ended. */1136SVGA3dQueryState state; /* Set by host or guest. See SVGA3dQueryState. */1137union { /* Set by host on exit from PENDING state */1138uint32 result32;1139uint32 queryCookie; /* May be used to identify which QueryGetData this1140result corresponds to. */1141};1142}1143#include "vmware_pack_end.h"1144SVGA3dQueryResult;114511461147/*1148* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN --1149*1150* This is a blit from an SVGA3D surface to a Screen Object.1151* This blit must be directed at a specific screen.1152*1153* The blit copies from a rectangular region of an SVGA3D surface1154* image to a rectangular region of a screen.1155*1156* This command takes an optional variable-length list of clipping1157* rectangles after the body of the command. If no rectangles are1158* specified, there is no clipping region. The entire destRect is1159* drawn to. If one or more rectangles are included, they describe1160* a clipping region. The clip rectangle coordinates are measured1161* relative to the top-left corner of destRect.1162*1163* The srcImage must be from mip=0 face=0.1164*1165* This supports scaling if the src and dest are of different sizes.1166*1167* Availability:1168* SVGA_FIFO_CAP_SCREEN_OBJECT1169*/11701171typedef1172#include "vmware_pack_begin.h"1173struct {1174SVGA3dSurfaceImageId srcImage;1175SVGASignedRect srcRect;1176uint32 destScreenId; /* Screen Object ID */1177SVGASignedRect destRect;1178/* Clipping: zero or more SVGASignedRects follow */1179}1180#include "vmware_pack_end.h"1181SVGA3dCmdBlitSurfaceToScreen; /* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN */11821183typedef1184#include "vmware_pack_begin.h"1185struct {1186uint32 sid;1187SVGA3dTextureFilter filter;1188}1189#include "vmware_pack_end.h"1190SVGA3dCmdGenerateMipmaps; /* SVGA_3D_CMD_GENERATE_MIPMAPS */11911192typedef1193#include "vmware_pack_begin.h"1194struct {1195uint32 sid;1196}1197#include "vmware_pack_end.h"1198SVGA3dCmdActivateSurface; /* SVGA_3D_CMD_ACTIVATE_SURFACE */11991200typedef1201#include "vmware_pack_begin.h"1202struct {1203uint32 sid;1204}1205#include "vmware_pack_end.h"1206SVGA3dCmdDeactivateSurface; /* SVGA_3D_CMD_DEACTIVATE_SURFACE */12071208/*1209* Screen DMA command1210*1211* Available with SVGA_FIFO_CAP_SCREEN_OBJECT_2. The SVGA_CAP_3D device1212* cap bit is not required.1213*1214* - refBuffer and destBuffer are 32bit BGRX; refBuffer and destBuffer could1215* be different, but it is required that guest makes sure refBuffer has1216* exactly the same contents that were written to when last time screen DMA1217* command is received by host.1218*1219* - changemap is generated by lib/blit, and it has the changes from last1220* received screen DMA or more.1221*/12221223typedef1224#include "vmware_pack_begin.h"1225struct SVGA3dCmdScreenDMA {1226uint32 screenId;1227SVGAGuestImage refBuffer;1228SVGAGuestImage destBuffer;1229SVGAGuestImage changeMap;1230}1231#include "vmware_pack_end.h"1232SVGA3dCmdScreenDMA; /* SVGA_3D_CMD_SCREEN_DMA */12331234/*1235* Logic ops1236*/12371238#define SVGA3D_LOTRANSBLT_HONORALPHA (0x01)1239#define SVGA3D_LOSTRETCHBLT_MIRRORX (0x01)1240#define SVGA3D_LOSTRETCHBLT_MIRRORY (0x02)1241#define SVGA3D_LOALPHABLEND_SRCHASALPHA (0x01)12421243typedef1244#include "vmware_pack_begin.h"1245struct SVGA3dCmdLogicOpsBitBlt {1246/*1247* All LogicOps surfaces are one-level1248* surfaces so mipmap & face should always1249* be zero.1250*/1251SVGA3dSurfaceImageId src;1252SVGA3dSurfaceImageId dst;1253SVGA3dLogicOp logicOp;1254/* Followed by variable number of SVGA3dCopyBox structures */1255}1256#include "vmware_pack_end.h"1257SVGA3dCmdLogicOpsBitBlt; /* SVGA_3D_CMD_LOGICOPS_BITBLT */125812591260typedef1261#include "vmware_pack_begin.h"1262struct SVGA3dCmdLogicOpsTransBlt {1263/*1264* All LogicOps surfaces are one-level1265* surfaces so mipmap & face should always1266* be zero.1267*/1268SVGA3dSurfaceImageId src;1269SVGA3dSurfaceImageId dst;1270uint32 color;1271uint32 flags;1272SVGA3dBox srcBox;1273SVGA3dBox dstBox;1274}1275#include "vmware_pack_end.h"1276SVGA3dCmdLogicOpsTransBlt; /* SVGA_3D_CMD_LOGICOPS_TRANSBLT */127712781279typedef1280#include "vmware_pack_begin.h"1281struct SVGA3dCmdLogicOpsStretchBlt {1282/*1283* All LogicOps surfaces are one-level1284* surfaces so mipmap & face should always1285* be zero.1286*/1287SVGA3dSurfaceImageId src;1288SVGA3dSurfaceImageId dst;1289uint16 mode;1290uint16 flags;1291SVGA3dBox srcBox;1292SVGA3dBox dstBox;1293}1294#include "vmware_pack_end.h"1295SVGA3dCmdLogicOpsStretchBlt; /* SVGA_3D_CMD_LOGICOPS_STRETCHBLT */129612971298typedef1299#include "vmware_pack_begin.h"1300struct SVGA3dCmdLogicOpsColorFill {1301/*1302* All LogicOps surfaces are one-level1303* surfaces so mipmap & face should always1304* be zero.1305*/1306SVGA3dSurfaceImageId dst;1307uint32 color;1308SVGA3dLogicOp logicOp;1309/* Followed by variable number of SVGA3dRect structures. */1310}1311#include "vmware_pack_end.h"1312SVGA3dCmdLogicOpsColorFill; /* SVGA_3D_CMD_LOGICOPS_COLORFILL */131313141315typedef1316#include "vmware_pack_begin.h"1317struct SVGA3dCmdLogicOpsAlphaBlend {1318/*1319* All LogicOps surfaces are one-level1320* surfaces so mipmap & face should always1321* be zero.1322*/1323SVGA3dSurfaceImageId src;1324SVGA3dSurfaceImageId dst;1325uint32 alphaVal;1326uint32 flags;1327SVGA3dBox srcBox;1328SVGA3dBox dstBox;1329}1330#include "vmware_pack_end.h"1331SVGA3dCmdLogicOpsAlphaBlend; /* SVGA_3D_CMD_LOGICOPS_ALPHABLEND */13321333#define SVGA3D_CLEARTYPE_INVALID_GAMMA_INDEX 0xFFFFFFFF13341335#define SVGA3D_CLEARTYPE_GAMMA_WIDTH 5121336#define SVGA3D_CLEARTYPE_GAMMA_HEIGHT 1613371338typedef1339#include "vmware_pack_begin.h"1340struct SVGA3dCmdLogicOpsClearTypeBlend {1341/*1342* All LogicOps surfaces are one-level1343* surfaces so mipmap & face should always1344* be zero.1345*/1346SVGA3dSurfaceImageId tmp;1347SVGA3dSurfaceImageId dst;1348SVGA3dSurfaceImageId gammaSurf;1349SVGA3dSurfaceImageId alphaSurf;1350uint32 gamma;1351uint32 color;1352uint32 color2;1353int32 alphaOffsetX;1354int32 alphaOffsetY;1355/* Followed by variable number of SVGA3dBox structures */1356}1357#include "vmware_pack_end.h"1358SVGA3dCmdLogicOpsClearTypeBlend; /* SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND */135913601361/*1362* Guest-backed objects definitions.1363*/13641365typedef1366#include "vmware_pack_begin.h"1367struct {1368SVGAMobFormat ptDepth;1369uint32 sizeInBytes;1370PPN64 base;1371}1372#include "vmware_pack_end.h"1373SVGAOTableMobEntry;13741375typedef1376#include "vmware_pack_begin.h"1377struct {1378SVGA3dSurfaceFormat format;1379SVGA3dSurface1Flags surface1Flags;1380uint32 numMipLevels;1381uint32 multisampleCount;1382SVGA3dTextureFilter autogenFilter;1383SVGA3dSize size;1384SVGAMobId mobid;1385uint32 arraySize;1386uint32 mobPitch;1387SVGA3dSurface2Flags surface2Flags;1388uint8 multisamplePattern;1389uint8 pad0[3];1390uint32 pad1[3];1391}1392#include "vmware_pack_end.h"1393SVGAOTableSurfaceEntry;13941395typedef1396#include "vmware_pack_begin.h"1397struct {1398uint32 cid;1399SVGAMobId mobid;1400}1401#include "vmware_pack_end.h"1402SVGAOTableContextEntry;14031404typedef1405#include "vmware_pack_begin.h"1406struct {1407SVGA3dShaderType type;1408uint32 sizeInBytes;1409uint32 offsetInBytes;1410SVGAMobId mobid;1411}1412#include "vmware_pack_end.h"1413SVGAOTableShaderEntry;14141415#define SVGA_STFLAG_PRIMARY (1 << 0)1416#define SVGA_STFLAG_RESERVED (1 << 1) /* Added with cap SVGA_CAP_HP_CMD_QUEUE */1417typedef uint32 SVGAScreenTargetFlags;14181419typedef1420#include "vmware_pack_begin.h"1421struct {1422SVGA3dSurfaceImageId image;1423uint32 width;1424uint32 height;1425int32 xRoot;1426int32 yRoot;1427SVGAScreenTargetFlags flags;1428uint32 dpi;1429uint32 pad[7];1430}1431#include "vmware_pack_end.h"1432SVGAOTableScreenTargetEntry;14331434typedef1435#include "vmware_pack_begin.h"1436struct {1437float value[4];1438}1439#include "vmware_pack_end.h"1440SVGA3dShaderConstFloat;14411442typedef1443#include "vmware_pack_begin.h"1444struct {1445int32 value[4];1446}1447#include "vmware_pack_end.h"1448SVGA3dShaderConstInt;14491450typedef1451#include "vmware_pack_begin.h"1452struct {1453uint32 value;1454}1455#include "vmware_pack_end.h"1456SVGA3dShaderConstBool;14571458typedef1459#include "vmware_pack_begin.h"1460struct {1461uint16 streamOffset;1462uint8 stream;1463uint8 type;1464uint8 methodUsage;1465uint8 usageIndex;1466}1467#include "vmware_pack_end.h"1468SVGAGBVertexElement;14691470typedef1471#include "vmware_pack_begin.h"1472struct {1473uint32 sid;1474uint16 stride;1475uint32 offset;1476}1477#include "vmware_pack_end.h"1478SVGAGBVertexStream;1479typedef1480#include "vmware_pack_begin.h"1481struct {1482SVGA3dRect viewport;1483SVGA3dRect scissorRect;1484SVGA3dZRange zRange;14851486SVGA3dSurfaceImageId renderTargets[SVGA3D_RT_MAX];1487SVGAGBVertexElement decl1[4];14881489uint32 renderStates[SVGA3D_RS_MAX];1490SVGAGBVertexElement decl2[18];1491uint32 pad0[2];14921493struct {1494SVGA3dFace face;1495SVGA3dMaterial material;1496} material;14971498float clipPlanes[SVGA3D_NUM_CLIPPLANES][4];1499float matrices[SVGA3D_TRANSFORM_MAX][16];15001501SVGA3dBool lightEnabled[SVGA3D_NUM_LIGHTS];1502SVGA3dLightData lightData[SVGA3D_NUM_LIGHTS];15031504/*1505* Shaders currently bound1506*/1507uint32 shaders[SVGA3D_NUM_SHADERTYPE_PREDX];1508SVGAGBVertexElement decl3[10];1509uint32 pad1[3];15101511uint32 occQueryActive;1512uint32 occQueryValue;15131514/*1515* Int/Bool Shader constants1516*/1517SVGA3dShaderConstInt pShaderIValues[SVGA3D_CONSTINTREG_MAX];1518SVGA3dShaderConstInt vShaderIValues[SVGA3D_CONSTINTREG_MAX];1519uint16 pShaderBValues;1520uint16 vShaderBValues;152115221523SVGAGBVertexStream streams[SVGA3D_MAX_VERTEX_ARRAYS];1524SVGA3dVertexDivisor divisors[SVGA3D_MAX_VERTEX_ARRAYS];1525uint32 numVertexDecls;1526uint32 numVertexStreams;1527uint32 numVertexDivisors;1528uint32 pad2[30];15291530/*1531* Texture Stages1532*1533* SVGA3D_TS_INVALID through SVGA3D_TS_CONSTANT are in the1534* textureStages array.1535* SVGA3D_TS_COLOR_KEY is in tsColorKey.1536*/1537uint32 tsColorKey[SVGA3D_NUM_TEXTURE_UNITS];1538uint32 textureStages[SVGA3D_NUM_TEXTURE_UNITS][SVGA3D_TS_CONSTANT + 1];1539uint32 tsColorKeyEnable[SVGA3D_NUM_TEXTURE_UNITS];15401541/*1542* Float Shader constants.1543*/1544SVGA3dShaderConstFloat pShaderFValues[SVGA3D_CONSTREG_MAX];1545SVGA3dShaderConstFloat vShaderFValues[SVGA3D_CONSTREG_MAX];1546}1547#include "vmware_pack_end.h"1548SVGAGBContextData;1549#define SVGA3D_CONTEXT_DATA_SIZE (sizeof(SVGAGBContextData))15501551/*1552* SVGA3dCmdSetOTableBase --1553*1554* This command allows the guest to specify the base PPN of the1555* specified object table.1556*/15571558typedef1559#include "vmware_pack_begin.h"1560struct {1561SVGAOTableType type;1562PPN baseAddress;1563uint32 sizeInBytes;1564uint32 validSizeInBytes;1565SVGAMobFormat ptDepth;1566}1567#include "vmware_pack_end.h"1568SVGA3dCmdSetOTableBase; /* SVGA_3D_CMD_SET_OTABLE_BASE */15691570typedef1571#include "vmware_pack_begin.h"1572struct {1573SVGAOTableType type;1574PPN64 baseAddress;1575uint32 sizeInBytes;1576uint32 validSizeInBytes;1577SVGAMobFormat ptDepth;1578}1579#include "vmware_pack_end.h"1580SVGA3dCmdSetOTableBase64; /* SVGA_3D_CMD_SET_OTABLE_BASE64 */15811582/*1583* Guests using SVGA_3D_CMD_GROW_OTABLE are promising that1584* the new OTable contains the same contents as the old one, except possibly1585* for some new invalid entries at the end.1586*1587* (Otherwise, guests should use one of the SetOTableBase commands.)1588*/1589typedef1590#include "vmware_pack_begin.h"1591struct {1592SVGAOTableType type;1593PPN64 baseAddress;1594uint32 sizeInBytes;1595uint32 validSizeInBytes;1596SVGAMobFormat ptDepth;1597}1598#include "vmware_pack_end.h"1599SVGA3dCmdGrowOTable; /* SVGA_3D_CMD_GROW_OTABLE */16001601typedef1602#include "vmware_pack_begin.h"1603struct {1604SVGAOTableType type;1605}1606#include "vmware_pack_end.h"1607SVGA3dCmdReadbackOTable; /* SVGA_3D_CMD_READBACK_OTABLE */16081609/*1610* Define a memory object (Mob) in the OTable.1611*/16121613typedef1614#include "vmware_pack_begin.h"1615struct SVGA3dCmdDefineGBMob {1616SVGAMobId mobid;1617SVGAMobFormat ptDepth;1618PPN base;1619uint32 sizeInBytes;1620}1621#include "vmware_pack_end.h"1622SVGA3dCmdDefineGBMob; /* SVGA_3D_CMD_DEFINE_GB_MOB */162316241625/*1626* Destroys an object in the OTable.1627*/16281629typedef1630#include "vmware_pack_begin.h"1631struct SVGA3dCmdDestroyGBMob {1632SVGAMobId mobid;1633}1634#include "vmware_pack_end.h"1635SVGA3dCmdDestroyGBMob; /* SVGA_3D_CMD_DESTROY_GB_MOB */16361637/*1638* Define a memory object (Mob) in the OTable with a PPN64 base.1639*/16401641typedef1642#include "vmware_pack_begin.h"1643struct SVGA3dCmdDefineGBMob64 {1644SVGAMobId mobid;1645SVGAMobFormat ptDepth;1646PPN64 base;1647uint32 sizeInBytes;1648}1649#include "vmware_pack_end.h"1650SVGA3dCmdDefineGBMob64; /* SVGA_3D_CMD_DEFINE_GB_MOB64 */16511652/*1653* Redefine an object in the OTable with PPN64 base.1654*/16551656typedef1657#include "vmware_pack_begin.h"1658struct SVGA3dCmdRedefineGBMob64 {1659SVGAMobId mobid;1660SVGAMobFormat ptDepth;1661PPN64 base;1662uint32 sizeInBytes;1663}1664#include "vmware_pack_end.h"1665SVGA3dCmdRedefineGBMob64; /* SVGA_3D_CMD_REDEFINE_GB_MOB64 */16661667/*1668* Notification that the page tables have been modified.1669*/16701671typedef1672#include "vmware_pack_begin.h"1673struct SVGA3dCmdUpdateGBMobMapping {1674SVGAMobId mobid;1675}1676#include "vmware_pack_end.h"1677SVGA3dCmdUpdateGBMobMapping; /* SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING */16781679/*1680* Define a guest-backed surface.1681*/16821683typedef1684#include "vmware_pack_begin.h"1685struct SVGA3dCmdDefineGBSurface {1686uint32 sid;1687SVGA3dSurface1Flags surfaceFlags;1688SVGA3dSurfaceFormat format;1689uint32 numMipLevels;1690uint32 multisampleCount;1691SVGA3dTextureFilter autogenFilter;1692SVGA3dSize size;1693}1694#include "vmware_pack_end.h"1695SVGA3dCmdDefineGBSurface; /* SVGA_3D_CMD_DEFINE_GB_SURFACE */16961697/*1698* Defines a guest-backed surface, adding the arraySize field.1699*1700* See also:1701* http://msdn.microsoft.com/en-us/library/ff541697%28v=VS.85%29.aspx1702*/1703typedef1704#include "vmware_pack_begin.h"1705struct SVGA3dCmdDefineGBSurface_v2 {1706uint32 sid;1707SVGA3dSurface1Flags surfaceFlags;1708SVGA3dSurfaceFormat format;1709uint32 numMipLevels;1710uint32 multisampleCount;1711SVGA3dTextureFilter autogenFilter;1712SVGA3dSize size;1713uint32 arraySize;1714uint32 pad;1715}1716#include "vmware_pack_end.h"1717SVGA3dCmdDefineGBSurface_v2; /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 */17181719/*1720* Defines a guest-backed surface, adding the larger flags.1721*/1722typedef1723#include "vmware_pack_begin.h"1724struct SVGA3dCmdDefineGBSurface_v3 {1725uint32 sid;1726SVGA3dSurfaceAllFlags surfaceFlags;1727SVGA3dSurfaceFormat format;1728uint32 numMipLevels;1729uint32 multisampleCount;1730SVGA3dMSPattern multisamplePattern;1731SVGA3dTextureFilter autogenFilter;1732SVGA3dSize size;1733uint32 arraySize;1734}1735#include "vmware_pack_end.h"1736SVGA3dCmdDefineGBSurface_v3; /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 */17371738/*1739* Destroy a guest-backed surface.1740*/17411742typedef1743#include "vmware_pack_begin.h"1744struct SVGA3dCmdDestroyGBSurface {1745uint32 sid;1746}1747#include "vmware_pack_end.h"1748SVGA3dCmdDestroyGBSurface; /* SVGA_3D_CMD_DESTROY_GB_SURFACE */17491750/*1751* Bind a guest-backed surface to a mob.1752*/17531754typedef1755#include "vmware_pack_begin.h"1756struct SVGA3dCmdBindGBSurface {1757uint32 sid;1758SVGAMobId mobid;1759}1760#include "vmware_pack_end.h"1761SVGA3dCmdBindGBSurface; /* SVGA_3D_CMD_BIND_GB_SURFACE */17621763typedef1764#include "vmware_pack_begin.h"1765struct SVGA3dCmdBindGBSurfaceWithPitch {1766uint32 sid;1767SVGAMobId mobid;1768uint32 baseLevelPitch;1769}1770#include "vmware_pack_end.h"1771SVGA3dCmdBindGBSurfaceWithPitch; /* SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH */17721773/*1774* Conditionally bind a mob to a guest-backed surface if testMobid1775* matches the currently bound mob. Optionally issue a1776* readback/update on the surface while it is still bound to the old1777* mobid if the mobid is changed by this command.1778*/17791780#define SVGA3D_COND_BIND_GB_SURFACE_FLAG_READBACK (1 << 0)1781#define SVGA3D_COND_BIND_GB_SURFACE_FLAG_UPDATE (1 << 1)17821783typedef1784#include "vmware_pack_begin.h"1785struct SVGA3dCmdCondBindGBSurface {1786uint32 sid;1787SVGAMobId testMobid;1788SVGAMobId mobid;1789uint32 flags;1790}1791#include "vmware_pack_end.h"1792SVGA3dCmdCondBindGBSurface; /* SVGA_3D_CMD_COND_BIND_GB_SURFACE */17931794/*1795* Update an image in a guest-backed surface.1796* (Inform the device that the guest-contents have been updated.)1797*/17981799typedef1800#include "vmware_pack_begin.h"1801struct SVGA3dCmdUpdateGBImage {1802SVGA3dSurfaceImageId image;1803SVGA3dBox box;1804}1805#include "vmware_pack_end.h"1806SVGA3dCmdUpdateGBImage; /* SVGA_3D_CMD_UPDATE_GB_IMAGE */18071808/*1809* Update an entire guest-backed surface.1810* (Inform the device that the guest-contents have been updated.)1811*/18121813typedef1814#include "vmware_pack_begin.h"1815struct SVGA3dCmdUpdateGBSurface {1816uint32 sid;1817}1818#include "vmware_pack_end.h"1819SVGA3dCmdUpdateGBSurface; /* SVGA_3D_CMD_UPDATE_GB_SURFACE */18201821/*1822* Readback an image in a guest-backed surface.1823* (Request the device to flush the dirty contents into the guest.)1824*/18251826typedef1827#include "vmware_pack_begin.h"1828struct SVGA3dCmdReadbackGBImage {1829SVGA3dSurfaceImageId image;1830}1831#include "vmware_pack_end.h"1832SVGA3dCmdReadbackGBImage; /* SVGA_3D_CMD_READBACK_GB_IMAGE */18331834/*1835* Readback an entire guest-backed surface.1836* (Request the device to flush the dirty contents into the guest.)1837*/18381839typedef1840#include "vmware_pack_begin.h"1841struct SVGA3dCmdReadbackGBSurface {1842uint32 sid;1843}1844#include "vmware_pack_end.h"1845SVGA3dCmdReadbackGBSurface; /* SVGA_3D_CMD_READBACK_GB_SURFACE */18461847/*1848* Readback a sub rect of an image in a guest-backed surface. After1849* issuing this command the driver is required to issue an update call1850* of the same region before issuing any other commands that reference1851* this surface or rendering is not guaranteed.1852*/18531854typedef1855#include "vmware_pack_begin.h"1856struct SVGA3dCmdReadbackGBImagePartial {1857SVGA3dSurfaceImageId image;1858SVGA3dBox box;1859uint32 invertBox;1860}1861#include "vmware_pack_end.h"1862SVGA3dCmdReadbackGBImagePartial; /* SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL */186318641865/*1866* Invalidate an image in a guest-backed surface.1867* (Notify the device that the contents can be lost.)1868*/18691870typedef1871#include "vmware_pack_begin.h"1872struct SVGA3dCmdInvalidateGBImage {1873SVGA3dSurfaceImageId image;1874}1875#include "vmware_pack_end.h"1876SVGA3dCmdInvalidateGBImage; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE */18771878/*1879* Invalidate an entire guest-backed surface.1880* (Notify the device that the contents if all images can be lost.)1881*/18821883typedef1884#include "vmware_pack_begin.h"1885struct SVGA3dCmdInvalidateGBSurface {1886uint32 sid;1887}1888#include "vmware_pack_end.h"1889SVGA3dCmdInvalidateGBSurface; /* SVGA_3D_CMD_INVALIDATE_GB_SURFACE */18901891/*1892* Invalidate a sub rect of an image in a guest-backed surface. After1893* issuing this command the driver is required to issue an update call1894* of the same region before issuing any other commands that reference1895* this surface or rendering is not guaranteed.1896*/18971898typedef1899#include "vmware_pack_begin.h"1900struct SVGA3dCmdInvalidateGBImagePartial {1901SVGA3dSurfaceImageId image;1902SVGA3dBox box;1903uint32 invertBox;1904}1905#include "vmware_pack_end.h"1906SVGA3dCmdInvalidateGBImagePartial; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL */190719081909/*1910* Define a guest-backed context.1911*/19121913typedef1914#include "vmware_pack_begin.h"1915struct SVGA3dCmdDefineGBContext {1916uint32 cid;1917}1918#include "vmware_pack_end.h"1919SVGA3dCmdDefineGBContext; /* SVGA_3D_CMD_DEFINE_GB_CONTEXT */19201921/*1922* Destroy a guest-backed context.1923*/19241925typedef1926#include "vmware_pack_begin.h"1927struct SVGA3dCmdDestroyGBContext {1928uint32 cid;1929}1930#include "vmware_pack_end.h"1931SVGA3dCmdDestroyGBContext; /* SVGA_3D_CMD_DESTROY_GB_CONTEXT */19321933/*1934* Bind a guest-backed context.1935*1936* validContents should be set to 0 for new contexts,1937* and 1 if this is an old context which is getting paged1938* back on to the device.1939*1940* For new contexts, it is recommended that the driver1941* issue commands to initialize all interesting state1942* prior to rendering.1943*/19441945typedef1946#include "vmware_pack_begin.h"1947struct SVGA3dCmdBindGBContext {1948uint32 cid;1949SVGAMobId mobid;1950uint32 validContents;1951}1952#include "vmware_pack_end.h"1953SVGA3dCmdBindGBContext; /* SVGA_3D_CMD_BIND_GB_CONTEXT */19541955/*1956* Readback a guest-backed context.1957* (Request that the device flush the contents back into guest memory.)1958*/19591960typedef1961#include "vmware_pack_begin.h"1962struct SVGA3dCmdReadbackGBContext {1963uint32 cid;1964}1965#include "vmware_pack_end.h"1966SVGA3dCmdReadbackGBContext; /* SVGA_3D_CMD_READBACK_GB_CONTEXT */19671968/*1969* Invalidate a guest-backed context.1970*/1971typedef1972#include "vmware_pack_begin.h"1973struct SVGA3dCmdInvalidateGBContext {1974uint32 cid;1975}1976#include "vmware_pack_end.h"1977SVGA3dCmdInvalidateGBContext; /* SVGA_3D_CMD_INVALIDATE_GB_CONTEXT */19781979/*1980* Define a guest-backed shader.1981*/19821983typedef1984#include "vmware_pack_begin.h"1985struct SVGA3dCmdDefineGBShader {1986uint32 shid;1987SVGA3dShaderType type;1988uint32 sizeInBytes;1989}1990#include "vmware_pack_end.h"1991SVGA3dCmdDefineGBShader; /* SVGA_3D_CMD_DEFINE_GB_SHADER */19921993/*1994* Bind a guest-backed shader.1995*/19961997typedef1998#include "vmware_pack_begin.h"1999struct SVGA3dCmdBindGBShader {2000uint32 shid;2001SVGAMobId mobid;2002uint32 offsetInBytes;2003}2004#include "vmware_pack_end.h"2005SVGA3dCmdBindGBShader; /* SVGA_3D_CMD_BIND_GB_SHADER */20062007/*2008* Destroy a guest-backed shader.2009*/20102011typedef2012#include "vmware_pack_begin.h"2013struct SVGA3dCmdDestroyGBShader {2014uint32 shid;2015}2016#include "vmware_pack_end.h"2017SVGA3dCmdDestroyGBShader; /* SVGA_3D_CMD_DESTROY_GB_SHADER */20182019typedef2020#include "vmware_pack_begin.h"2021struct {2022uint32 cid;2023uint32 regStart;2024SVGA3dShaderType shaderType;2025SVGA3dShaderConstType constType;20262027/*2028* Followed by a variable number of shader constants.2029*2030* Note that FLOAT and INT constants are 4-dwords in length, while2031* BOOL constants are 1-dword in length.2032*/2033}2034#include "vmware_pack_end.h"2035SVGA3dCmdSetGBShaderConstInline; /* SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE */203620372038typedef2039#include "vmware_pack_begin.h"2040struct {2041uint32 cid;2042SVGA3dQueryType type;2043}2044#include "vmware_pack_end.h"2045SVGA3dCmdBeginGBQuery; /* SVGA_3D_CMD_BEGIN_GB_QUERY */20462047typedef2048#include "vmware_pack_begin.h"2049struct {2050uint32 cid;2051SVGA3dQueryType type;2052SVGAMobId mobid;2053uint32 offset;2054}2055#include "vmware_pack_end.h"2056SVGA3dCmdEndGBQuery; /* SVGA_3D_CMD_END_GB_QUERY */205720582059/*2060* SVGA_3D_CMD_WAIT_FOR_GB_QUERY --2061*2062* The semantics of this command are identical to the2063* SVGA_3D_CMD_WAIT_FOR_QUERY except that the results are written2064* to a Mob instead of a GMR.2065*/20662067typedef2068#include "vmware_pack_begin.h"2069struct {2070uint32 cid;2071SVGA3dQueryType type;2072SVGAMobId mobid;2073uint32 offset;2074}2075#include "vmware_pack_end.h"2076SVGA3dCmdWaitForGBQuery; /* SVGA_3D_CMD_WAIT_FOR_GB_QUERY */207720782079typedef2080#include "vmware_pack_begin.h"2081struct {2082SVGAMobId mobid;2083uint32 mustBeZero;2084uint32 initialized;2085}2086#include "vmware_pack_end.h"2087SVGA3dCmdEnableGart; /* SVGA_3D_CMD_ENABLE_GART */20882089typedef2090#include "vmware_pack_begin.h"2091struct {2092SVGAMobId mobid;2093uint32 gartOffset;2094}2095#include "vmware_pack_end.h"2096SVGA3dCmdMapMobIntoGart; /* SVGA_3D_CMD_MAP_MOB_INTO_GART */209720982099typedef2100#include "vmware_pack_begin.h"2101struct {2102uint32 gartOffset;2103uint32 numPages;2104}2105#include "vmware_pack_end.h"2106SVGA3dCmdUnmapGartRange; /* SVGA_3D_CMD_UNMAP_GART_RANGE */210721082109/*2110* Screen Targets2111*/21122113typedef2114#include "vmware_pack_begin.h"2115struct {2116uint32 stid;2117uint32 width;2118uint32 height;2119int32 xRoot;2120int32 yRoot;2121SVGAScreenTargetFlags flags;21222123/*2124* The physical DPI that the guest expects this screen displayed at.2125*2126* Guests which are not DPI-aware should set this to zero.2127*/2128uint32 dpi;2129}2130#include "vmware_pack_end.h"2131SVGA3dCmdDefineGBScreenTarget; /* SVGA_3D_CMD_DEFINE_GB_SCREENTARGET */21322133typedef2134#include "vmware_pack_begin.h"2135struct {2136uint32 stid;2137}2138#include "vmware_pack_end.h"2139SVGA3dCmdDestroyGBScreenTarget; /* SVGA_3D_CMD_DESTROY_GB_SCREENTARGET */21402141typedef2142#include "vmware_pack_begin.h"2143struct {2144uint32 stid;2145SVGA3dSurfaceImageId image;2146}2147#include "vmware_pack_end.h"2148SVGA3dCmdBindGBScreenTarget; /* SVGA_3D_CMD_BIND_GB_SCREENTARGET */21492150typedef2151#include "vmware_pack_begin.h"2152struct {2153uint32 stid;2154SVGA3dRect rect;2155}2156#include "vmware_pack_end.h"2157SVGA3dCmdUpdateGBScreenTarget; /* SVGA_3D_CMD_UPDATE_GB_SCREENTARGET */21582159typedef2160#include "vmware_pack_begin.h"2161struct SVGA3dCmdGBScreenDMA {2162uint32 screenId;2163uint32 dead;2164SVGAMobId destMobID;2165uint32 destPitch;2166SVGAMobId changeMapMobID;2167}2168#include "vmware_pack_end.h"2169SVGA3dCmdGBScreenDMA; /* SVGA_3D_CMD_GB_SCREEN_DMA */21702171typedef2172#include "vmware_pack_begin.h"2173struct {2174uint32 value;2175uint32 mobId;2176uint32 mobOffset;2177}2178#include "vmware_pack_end.h"2179SVGA3dCmdGBMobFence; /* SVGA_3D_CMD_GB_MOB_FENCE */21802181typedef2182#include "vmware_pack_begin.h"2183struct {2184uint32 stid;2185SVGA3dSurfaceImageId dest;21862187uint32 statusMobId;2188uint32 statusMobOffset;21892190/* Reserved fields */2191uint32 mustBeInvalidId;2192uint32 mustBeZero;2193}2194#include "vmware_pack_end.h"2195SVGA3dCmdScreenCopy; /* SVGA_3D_CMD_SCREEN_COPY */21962197#define SVGA_SCREEN_COPY_STATUS_FAILURE 0x002198#define SVGA_SCREEN_COPY_STATUS_SUCCESS 0x012199#define SVGA_SCREEN_COPY_STATUS_INVALID 0xFFFFFFFF22002201#endif // _SVGA3D_CMD_H_220222032204