Path: blob/21.2-virgl/src/gallium/drivers/svga/include/svga3d_devcaps.h
4574 views
/**********************************************************1* Copyright 1998-2017 VMware, Inc. All rights reserved.2*3* Permission is hereby granted, free of charge, to any person4* obtaining a copy of this software and associated documentation5* files (the "Software"), to deal in the Software without6* restriction, including without limitation the rights to use, copy,7* modify, merge, publish, distribute, sublicense, and/or sell copies8* of the Software, and to permit persons to whom the Software is9* furnished to do so, subject to the following conditions:10*11* The above copyright notice and this permission notice shall be12* included in all copies or substantial portions of the Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,15* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF16* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND17* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS18* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN19* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN20* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE21* SOFTWARE.22*23**********************************************************/2425/*26* svga3d_devcaps.h --27*28* SVGA 3d caps definitions29*/3031#ifndef _SVGA3D_DEVCAPS_H_32#define _SVGA3D_DEVCAPS_H_3334#define INCLUDE_ALLOW_MODULE35#define INCLUDE_ALLOW_USERLEVEL36#define INCLUDE_ALLOW_VMCORE3738#include "includeCheck.h"3940/*41* 3D Hardware Version42*43* The hardware version is stored in the SVGA_FIFO_3D_HWVERSION fifo44* register. Is set by the host and read by the guest. This lets45* us make new guest drivers which are backwards-compatible with old46* SVGA hardware revisions. It does not let us support old guest47* drivers. Good enough for now.48*49*/5051#define SVGA3D_MAKE_HWVERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))52#define SVGA3D_MAJOR_HWVERSION(version) ((version) >> 16)53#define SVGA3D_MINOR_HWVERSION(version) ((version) & 0xFF)5455typedef enum {56SVGA3D_HWVERSION_WS5_RC1 = SVGA3D_MAKE_HWVERSION(0, 1),57SVGA3D_HWVERSION_WS5_RC2 = SVGA3D_MAKE_HWVERSION(0, 2),58SVGA3D_HWVERSION_WS51_RC1 = SVGA3D_MAKE_HWVERSION(0, 3),59SVGA3D_HWVERSION_WS6_B1 = SVGA3D_MAKE_HWVERSION(1, 1),60SVGA3D_HWVERSION_FUSION_11 = SVGA3D_MAKE_HWVERSION(1, 4),61SVGA3D_HWVERSION_WS65_B1 = SVGA3D_MAKE_HWVERSION(2, 0),62SVGA3D_HWVERSION_WS8_B1 = SVGA3D_MAKE_HWVERSION(2, 1),63SVGA3D_HWVERSION_CURRENT = SVGA3D_HWVERSION_WS8_B1,64} SVGA3dHardwareVersion;6566/*67* DevCap indexes.68*/6970typedef enum {71SVGA3D_DEVCAP_INVALID = ((uint32)-1),72SVGA3D_DEVCAP_3D = 0,73SVGA3D_DEVCAP_MAX_LIGHTS = 1,7475/*76* SVGA3D_DEVCAP_MAX_TEXTURES reflects the maximum number of77* fixed-function texture units available. Each of these units78* work in both FFP and Shader modes, and they support texture79* transforms and texture coordinates. The host may have additional80* texture image units that are only usable with shaders.81*/82SVGA3D_DEVCAP_MAX_TEXTURES = 2,83SVGA3D_DEVCAP_MAX_CLIP_PLANES = 3,84SVGA3D_DEVCAP_VERTEX_SHADER_VERSION = 4,85SVGA3D_DEVCAP_VERTEX_SHADER = 5,86SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION = 6,87SVGA3D_DEVCAP_FRAGMENT_SHADER = 7,88SVGA3D_DEVCAP_MAX_RENDER_TARGETS = 8,89SVGA3D_DEVCAP_S23E8_TEXTURES = 9,90SVGA3D_DEVCAP_S10E5_TEXTURES = 10,91SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND = 11,92SVGA3D_DEVCAP_D16_BUFFER_FORMAT = 12,93SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT = 13,94SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT = 14,95SVGA3D_DEVCAP_QUERY_TYPES = 15,96SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING = 16,97SVGA3D_DEVCAP_MAX_POINT_SIZE = 17,98SVGA3D_DEVCAP_MAX_SHADER_TEXTURES = 18,99SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH = 19,100SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT = 20,101SVGA3D_DEVCAP_MAX_VOLUME_EXTENT = 21,102SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT = 22,103SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO = 23,104SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY = 24,105SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT = 25,106SVGA3D_DEVCAP_MAX_VERTEX_INDEX = 26,107SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS = 27,108SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS = 28,109SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS = 29,110SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS = 30,111SVGA3D_DEVCAP_TEXTURE_OPS = 31,112SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8 = 32,113SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8 = 33,114SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10 = 34,115SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5 = 35,116SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5 = 36,117SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4 = 37,118SVGA3D_DEVCAP_SURFACEFMT_R5G6B5 = 38,119SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16 = 39,120SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8 = 40,121SVGA3D_DEVCAP_SURFACEFMT_ALPHA8 = 41,122SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8 = 42,123SVGA3D_DEVCAP_SURFACEFMT_Z_D16 = 43,124SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8 = 44,125SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8 = 45,126SVGA3D_DEVCAP_SURFACEFMT_DXT1 = 46,127SVGA3D_DEVCAP_SURFACEFMT_DXT2 = 47,128SVGA3D_DEVCAP_SURFACEFMT_DXT3 = 48,129SVGA3D_DEVCAP_SURFACEFMT_DXT4 = 49,130SVGA3D_DEVCAP_SURFACEFMT_DXT5 = 50,131SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8 = 51,132SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10 = 52,133SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8 = 53,134SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8 = 54,135SVGA3D_DEVCAP_SURFACEFMT_CxV8U8 = 55,136SVGA3D_DEVCAP_SURFACEFMT_R_S10E5 = 56,137SVGA3D_DEVCAP_SURFACEFMT_R_S23E8 = 57,138SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5 = 58,139SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8 = 59,140SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5 = 60,141SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8 = 61,142143/*144* There is a hole in our devcap definitions for145* historical reasons.146*147* Define a constant just for completeness.148*/149SVGA3D_DEVCAP_MISSING62 = 62,150151SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES = 63,152153/*154* Note that MAX_SIMULTANEOUS_RENDER_TARGETS is a maximum count of color155* render targets. This does not include the depth or stencil targets.156*/157SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS = 64,158159SVGA3D_DEVCAP_SURFACEFMT_V16U16 = 65,160SVGA3D_DEVCAP_SURFACEFMT_G16R16 = 66,161SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16 = 67,162SVGA3D_DEVCAP_SURFACEFMT_UYVY = 68,163SVGA3D_DEVCAP_SURFACEFMT_YUY2 = 69,164165/*166* Deprecated.167*/168SVGA3D_DEVCAP_DEAD4 = 70,169SVGA3D_DEVCAP_DEAD5 = 71,170SVGA3D_DEVCAP_DEAD7 = 72,171SVGA3D_DEVCAP_DEAD6 = 73,172173SVGA3D_DEVCAP_AUTOGENMIPMAPS = 74,174SVGA3D_DEVCAP_SURFACEFMT_NV12 = 75,175SVGA3D_DEVCAP_SURFACEFMT_AYUV = 76,176177/*178* This is the maximum number of SVGA context IDs that the guest179* can define using SVGA_3D_CMD_CONTEXT_DEFINE.180*/181SVGA3D_DEVCAP_MAX_CONTEXT_IDS = 77,182183/*184* This is the maximum number of SVGA surface IDs that the guest185* can define using SVGA_3D_CMD_SURFACE_DEFINE*.186*/187SVGA3D_DEVCAP_MAX_SURFACE_IDS = 78,188189SVGA3D_DEVCAP_SURFACEFMT_Z_DF16 = 79,190SVGA3D_DEVCAP_SURFACEFMT_Z_DF24 = 80,191SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT = 81,192193SVGA3D_DEVCAP_SURFACEFMT_ATI1 = 82,194SVGA3D_DEVCAP_SURFACEFMT_ATI2 = 83,195196/*197* Deprecated.198*/199SVGA3D_DEVCAP_DEAD1 = 84,200SVGA3D_DEVCAP_DEAD8 = 85,201SVGA3D_DEVCAP_DEAD9 = 86,202203SVGA3D_DEVCAP_LINE_AA = 87, /* boolean */204SVGA3D_DEVCAP_LINE_STIPPLE = 88, /* boolean */205SVGA3D_DEVCAP_MAX_LINE_WIDTH = 89, /* float */206SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH = 90, /* float */207208SVGA3D_DEVCAP_SURFACEFMT_YV12 = 91,209210/*211* Deprecated.212*/213SVGA3D_DEVCAP_DEAD3 = 92,214215/*216* Are TS_CONSTANT, TS_COLOR_KEY, and TS_COLOR_KEY_ENABLE supported?217*/218SVGA3D_DEVCAP_TS_COLOR_KEY = 93, /* boolean */219220/*221* Deprecated.222*/223SVGA3D_DEVCAP_DEAD2 = 94,224225/*226* Does the device support DXContexts? (ie DX10 era rendering)227*/228SVGA3D_DEVCAP_DXCONTEXT = 95,229230/*231* What is the maximum size of a texture array?232*233* (Even if this cap is zero, cubemaps are still allowed.)234*/235SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE = 96,236237/*238* What is the maximum number of vertex buffers or vertex input registers239* that can be expected to work correctly with a DXContext?240*241* The guest is allowed to set up to SVGA3D_DX_MAX_VERTEXBUFFERS, but242* anything in excess of this cap is not guaranteed to render correctly.243*244* Similarly, the guest can set up to SVGA3D_DX_MAX_VERTEXINPUTREGISTERS245* input registers without the SVGA3D_DEVCAP_SM4_1 cap, or246* SVGA3D_DX_SM41_MAX_VERTEXINPUTREGISTERS with the SVGA3D_DEVCAP_SM4_1,247* but only the registers up to this cap value are guaranteed to render248* correctly.249*250* If guest-drivers are able to expose a lower-limit, it's recommended251* that they clamp to this value. Otherwise, the host will make a252* best-effort on case-by-case basis if guests exceed this.253*/254SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS = 97,255256/*257* What is the maximum number of constant buffers that can be expected to258* work correctly with a DX context?259*260* The guest is allowed to set up to SVGA3D_DX_MAX_CONSTBUFFERS, but261* anything in excess of this cap is not guaranteed to render correctly.262*263* If guest-drivers are able to expose a lower-limit, it's recommended264* that they clamp to this value. Otherwise, the host will make a265* best-effort on case-by-case basis if guests exceed this.266*/267SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS = 98,268269/*270* Does the device support provoking vertex control?271*272* If this cap is present, the provokingVertexLast field in the273* rasterizer state is enabled. (Guests can then set it to FALSE,274* meaning that the first vertex is the provoking vertex, or TRUE,275* meaning that the last vertex is the provoking vertex.)276*277* If this cap is FALSE, then guests should set the provokingVertexLast278* to FALSE, otherwise rendering behavior is undefined.279*/280SVGA3D_DEVCAP_DX_PROVOKING_VERTEX = 99,281282SVGA3D_DEVCAP_DXFMT_X8R8G8B8 = 100,283SVGA3D_DEVCAP_DXFMT_A8R8G8B8 = 101,284SVGA3D_DEVCAP_DXFMT_R5G6B5 = 102,285SVGA3D_DEVCAP_DXFMT_X1R5G5B5 = 103,286SVGA3D_DEVCAP_DXFMT_A1R5G5B5 = 104,287SVGA3D_DEVCAP_DXFMT_A4R4G4B4 = 105,288SVGA3D_DEVCAP_DXFMT_Z_D32 = 106,289SVGA3D_DEVCAP_DXFMT_Z_D16 = 107,290SVGA3D_DEVCAP_DXFMT_Z_D24S8 = 108,291SVGA3D_DEVCAP_DXFMT_Z_D15S1 = 109,292SVGA3D_DEVCAP_DXFMT_LUMINANCE8 = 110,293SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4 = 111,294SVGA3D_DEVCAP_DXFMT_LUMINANCE16 = 112,295SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8 = 113,296SVGA3D_DEVCAP_DXFMT_DXT1 = 114,297SVGA3D_DEVCAP_DXFMT_DXT2 = 115,298SVGA3D_DEVCAP_DXFMT_DXT3 = 116,299SVGA3D_DEVCAP_DXFMT_DXT4 = 117,300SVGA3D_DEVCAP_DXFMT_DXT5 = 118,301SVGA3D_DEVCAP_DXFMT_BUMPU8V8 = 119,302SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5 = 120,303SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8 = 121,304SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1 = 122,305SVGA3D_DEVCAP_DXFMT_ARGB_S10E5 = 123,306SVGA3D_DEVCAP_DXFMT_ARGB_S23E8 = 124,307SVGA3D_DEVCAP_DXFMT_A2R10G10B10 = 125,308SVGA3D_DEVCAP_DXFMT_V8U8 = 126,309SVGA3D_DEVCAP_DXFMT_Q8W8V8U8 = 127,310SVGA3D_DEVCAP_DXFMT_CxV8U8 = 128,311SVGA3D_DEVCAP_DXFMT_X8L8V8U8 = 129,312SVGA3D_DEVCAP_DXFMT_A2W10V10U10 = 130,313SVGA3D_DEVCAP_DXFMT_ALPHA8 = 131,314SVGA3D_DEVCAP_DXFMT_R_S10E5 = 132,315SVGA3D_DEVCAP_DXFMT_R_S23E8 = 133,316SVGA3D_DEVCAP_DXFMT_RG_S10E5 = 134,317SVGA3D_DEVCAP_DXFMT_RG_S23E8 = 135,318SVGA3D_DEVCAP_DXFMT_BUFFER = 136,319SVGA3D_DEVCAP_DXFMT_Z_D24X8 = 137,320SVGA3D_DEVCAP_DXFMT_V16U16 = 138,321SVGA3D_DEVCAP_DXFMT_G16R16 = 139,322SVGA3D_DEVCAP_DXFMT_A16B16G16R16 = 140,323SVGA3D_DEVCAP_DXFMT_UYVY = 141,324SVGA3D_DEVCAP_DXFMT_YUY2 = 142,325SVGA3D_DEVCAP_DXFMT_NV12 = 143,326SVGA3D_DEVCAP_FORMAT_DEAD2 = 144,327SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS = 145,328SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT = 146,329SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT = 147,330SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS = 148,331SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT = 149,332SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT = 150,333SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT = 151,334SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS = 152,335SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT = 153,336SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM = 154,337SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT = 155,338SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS = 156,339SVGA3D_DEVCAP_DXFMT_R32G32_UINT = 157,340SVGA3D_DEVCAP_DXFMT_R32G32_SINT = 158,341SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS = 159,342SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT = 160,343SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24 = 161,344SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT = 162,345SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS = 163,346SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT = 164,347SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT = 165,348SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS = 166,349SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM = 167,350SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB = 168,351SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT = 169,352SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT = 170,353SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS = 171,354SVGA3D_DEVCAP_DXFMT_R16G16_UINT = 172,355SVGA3D_DEVCAP_DXFMT_R16G16_SINT = 173,356SVGA3D_DEVCAP_DXFMT_R32_TYPELESS = 174,357SVGA3D_DEVCAP_DXFMT_D32_FLOAT = 175,358SVGA3D_DEVCAP_DXFMT_R32_UINT = 176,359SVGA3D_DEVCAP_DXFMT_R32_SINT = 177,360SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS = 178,361SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT = 179,362SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8 = 180,363SVGA3D_DEVCAP_DXFMT_X24_G8_UINT = 181,364SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS = 182,365SVGA3D_DEVCAP_DXFMT_R8G8_UNORM = 183,366SVGA3D_DEVCAP_DXFMT_R8G8_UINT = 184,367SVGA3D_DEVCAP_DXFMT_R8G8_SINT = 185,368SVGA3D_DEVCAP_DXFMT_R16_TYPELESS = 186,369SVGA3D_DEVCAP_DXFMT_R16_UNORM = 187,370SVGA3D_DEVCAP_DXFMT_R16_UINT = 188,371SVGA3D_DEVCAP_DXFMT_R16_SNORM = 189,372SVGA3D_DEVCAP_DXFMT_R16_SINT = 190,373SVGA3D_DEVCAP_DXFMT_R8_TYPELESS = 191,374SVGA3D_DEVCAP_DXFMT_R8_UNORM = 192,375SVGA3D_DEVCAP_DXFMT_R8_UINT = 193,376SVGA3D_DEVCAP_DXFMT_R8_SNORM = 194,377SVGA3D_DEVCAP_DXFMT_R8_SINT = 195,378SVGA3D_DEVCAP_DXFMT_P8 = 196,379SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP = 197,380SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM = 198,381SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM = 199,382SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS = 200,383SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB = 201,384SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS = 202,385SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB = 203,386SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS = 204,387SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB = 205,388SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS = 206,389SVGA3D_DEVCAP_DXFMT_ATI1 = 207,390SVGA3D_DEVCAP_DXFMT_BC4_SNORM = 208,391SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS = 209,392SVGA3D_DEVCAP_DXFMT_ATI2 = 210,393SVGA3D_DEVCAP_DXFMT_BC5_SNORM = 211,394SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM = 212,395SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS = 213,396SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB = 214,397SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS = 215,398SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB = 216,399SVGA3D_DEVCAP_DXFMT_Z_DF16 = 217,400SVGA3D_DEVCAP_DXFMT_Z_DF24 = 218,401SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT = 219,402SVGA3D_DEVCAP_DXFMT_YV12 = 220,403SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT = 221,404SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT = 222,405SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM = 223,406SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT = 224,407SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM = 225,408SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM = 226,409SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT = 227,410SVGA3D_DEVCAP_DXFMT_R16G16_UNORM = 228,411SVGA3D_DEVCAP_DXFMT_R16G16_SNORM = 229,412SVGA3D_DEVCAP_DXFMT_R32_FLOAT = 230,413SVGA3D_DEVCAP_DXFMT_R8G8_SNORM = 231,414SVGA3D_DEVCAP_DXFMT_R16_FLOAT = 232,415SVGA3D_DEVCAP_DXFMT_D16_UNORM = 233,416SVGA3D_DEVCAP_DXFMT_A8_UNORM = 234,417SVGA3D_DEVCAP_DXFMT_BC1_UNORM = 235,418SVGA3D_DEVCAP_DXFMT_BC2_UNORM = 236,419SVGA3D_DEVCAP_DXFMT_BC3_UNORM = 237,420SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM = 238,421SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM = 239,422SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM = 240,423SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM = 241,424SVGA3D_DEVCAP_DXFMT_BC4_UNORM = 242,425SVGA3D_DEVCAP_DXFMT_BC5_UNORM = 243,426427SVGA3D_DEVCAP_SM41 = 244,428SVGA3D_DEVCAP_MULTISAMPLE_2X = 245,429SVGA3D_DEVCAP_MULTISAMPLE_4X = 246,430SVGA3D_DEVCAP_MS_FULL_QUALITY = 247,431SVGA3D_DEVCAP_LOGICOPS = 248,432SVGA3D_DEVCAP_LOGIC_BLENDOPS = 249,433SVGA3D_DEVCAP_DXFMT_B4G4R4A4_UNORM = 250,434SVGA3D_DEVCAP_DXFMT_BC6H_UF16 = 252,435SVGA3D_DEVCAP_DXFMT_BC6H_SF16 = 253,436SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS = 254,437SVGA3D_DEVCAP_DXFMT_BC7_UNORM = 255,438SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB = 256,439SVGA3D_DEVCAP_DXFMT_AYUV = 257,440SVGA3D_DEVCAP_SM5 = 258,441SVGA3D_DEVCAP_MULTISAMPLE_8X = 259,442SVGA3D_DEVCAP_FORCED_SAMPLE_COUNT_1 = 260,443SVGA3D_DEVCAP_MAX = 261,444445} SVGA3dDevCapIndex;446447/*448* Bit definitions for DXFMT devcaps449*450* See also:451* http://msdn.microsoft.com/en-gb/library/windows/hardware/ff539390.aspx452*453* SUPPORTED: Can the format be defined?454* SHADER_SAMPLE: Can the format be sampled from a shader?455* COLOR_RENDERTARGET: Can the format be a color render target?456* DEPTH_RENDERTARGET: Can the format be a depth render target?457* BLENDABLE: Is the format blendable?458* MIPS: Does the format support mip levels?459* ARRAY: Does the format support texture arrays?460* VOLUME: Does the format support having volume?461* MULTISAMPLE: Does the format support multisample?462*/463#define SVGA3D_DXFMT_SUPPORTED (1 << 0)464#define SVGA3D_DXFMT_SHADER_SAMPLE (1 << 1)465#define SVGA3D_DXFMT_COLOR_RENDERTARGET (1 << 2)466#define SVGA3D_DXFMT_DEPTH_RENDERTARGET (1 << 3)467#define SVGA3D_DXFMT_BLENDABLE (1 << 4)468#define SVGA3D_DXFMT_MIPS (1 << 5)469#define SVGA3D_DXFMT_ARRAY (1 << 6)470#define SVGA3D_DXFMT_VOLUME (1 << 7)471#define SVGA3D_DXFMT_DX_VERTEX_BUFFER (1 << 8)472#define SVGA3D_DXFMT_MULTISAMPLE (1 << 9)473#define SVGA3D_DXFMT_MAX (1 << 10)474475typedef union {476SVGA3dBool b;477uint32 u;478int32 i;479float f;480} SVGA3dDevCapResult;481482#endif /* _SVGA3D_DEVCAPS_H_ */483484485