CoCalc -- svga3d_surfacedefs.h

GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/svga/include/svga3d_surfacedefs.h
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/**************************************************************************
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 *
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 * Copyright © 1998-2015 VMware, Inc., Palo Alto, CA., USA
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 * All Rights Reserved.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the
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 * "Software"), to deal in the Software without restriction, including
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the
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 * next paragraph) shall be included in all copies or substantial portions
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 * of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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 * USE OR OTHER DEALINGS IN THE SOFTWARE.
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 *
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 **************************************************************************/
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/*
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 * svga3d_surfacedefs.h --
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 *
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 *       Surface/format/image helper code.
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 */
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#ifndef SVGA3D_SURFACEDEFS_H
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#define SVGA3D_SURFACEDEFS_H
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#include "svga3d_reg.h"
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#define max_t(type, x, y)  ((x) > (y) ? (x) : (y))
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/*
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 * enum svga3d_block_desc describes the active data channels in a block.
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 *
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 * There can be at-most four active channels in a block:
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 *    1. Red, bump W, luminance and depth are stored in the first channel.
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 *    2. Green, bump V and stencil are stored in the second channel.
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 *    3. Blue and bump U are stored in the third channel.
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 *    4. Alpha and bump Q are stored in the fourth channel.
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 *
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 * Block channels can be used to store compressed and buffer data:
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 *    1. For compressed formats, only the data channel is used and its size
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 *       is equal to that of a singular block in the compression scheme.
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 *    2. For buffer formats, only the data channel is used and its size is
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 *       exactly one byte in length.
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 *    3. In each case the bit depth represent the size of a singular block.
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 *
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 * Note: Compressed and IEEE formats do not use the bitMask structure.
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 */
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enum svga3d_block_desc {
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   SVGA3DBLOCKDESC_NONE        = 0,         /* No channels are active */
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   SVGA3DBLOCKDESC_BLUE        = 1 << 0,    /* Block with red channel data */
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   SVGA3DBLOCKDESC_U           = 1 << 0,    /* Block with bump U channel data */
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   SVGA3DBLOCKDESC_GREEN       = 1 << 1,    /* Block with green channel data */
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   SVGA3DBLOCKDESC_V           = 1 << 1,    /* Block with bump V channel data */
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   SVGA3DBLOCKDESC_RED         = 1 << 2,    /* Block with blue channel data */
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   SVGA3DBLOCKDESC_W           = 1 << 2,    /* Block with bump W channel data */
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   SVGA3DBLOCKDESC_LUMINANCE   = 1 << 2,    /* Block with luminance channel data */
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   SVGA3DBLOCKDESC_Y           = 1 << 2,    /* Block with video luminance data */
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   SVGA3DBLOCKDESC_ALPHA       = 1 << 3,    /* Block with an alpha channel */
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   SVGA3DBLOCKDESC_Q           = 1 << 3,    /* Block with bump Q channel data */
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   SVGA3DBLOCKDESC_BUFFER      = 1 << 4,    /* Block stores 1 byte of data */
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   SVGA3DBLOCKDESC_COMPRESSED  = 1 << 5,    /* Block stores n bytes of data depending
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                                               on the compression method used */
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   SVGA3DBLOCKDESC_IEEE_FP     = 1 << 6,    /* Block stores data in an IEEE floating point
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                                               representation in all channels */
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   SVGA3DBLOCKDESC_UV_VIDEO    = 1 << 7,    /* Block with alternating video U and V */
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   SVGA3DBLOCKDESC_PLANAR_YUV  = 1 << 8,    /* Three separate blocks store data. */
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   SVGA3DBLOCKDESC_U_VIDEO     = 1 << 9,    /* Block with U video data */
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   SVGA3DBLOCKDESC_V_VIDEO     = 1 << 10,   /* Block with V video data */
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   SVGA3DBLOCKDESC_EXP         = 1 << 11,   /* Shared exponent */
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   SVGA3DBLOCKDESC_SRGB        = 1 << 12,   /* Data is in sRGB format */
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   SVGA3DBLOCKDESC_2PLANAR_YUV = 1 << 13,   /* 2 planes of Y, UV, e.g., NV12. */
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   SVGA3DBLOCKDESC_3PLANAR_YUV = 1 << 14,   /* 3 planes of separate Y, U, V, e.g., YV12. */
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   SVGA3DBLOCKDESC_DEPTH       = 1 << 15,   /* Block with depth channel */
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   SVGA3DBLOCKDESC_STENCIL     = 1 << 16,   /* Block with a stencil channel */
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   SVGA3DBLOCKDESC_RG         = SVGA3DBLOCKDESC_RED |
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                                SVGA3DBLOCKDESC_GREEN,
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   SVGA3DBLOCKDESC_RGB        = SVGA3DBLOCKDESC_RG |
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                                SVGA3DBLOCKDESC_BLUE,
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   SVGA3DBLOCKDESC_RGB_SRGB   = SVGA3DBLOCKDESC_RGB |
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                                SVGA3DBLOCKDESC_SRGB,
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   SVGA3DBLOCKDESC_RGBA       = SVGA3DBLOCKDESC_RGB |
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                                SVGA3DBLOCKDESC_ALPHA,
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   SVGA3DBLOCKDESC_RGBA_SRGB  = SVGA3DBLOCKDESC_RGBA |
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                                SVGA3DBLOCKDESC_SRGB,
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   SVGA3DBLOCKDESC_UV         = SVGA3DBLOCKDESC_U |
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                                SVGA3DBLOCKDESC_V,
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   SVGA3DBLOCKDESC_UVL        = SVGA3DBLOCKDESC_UV |
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                                SVGA3DBLOCKDESC_LUMINANCE,
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   SVGA3DBLOCKDESC_UVW        = SVGA3DBLOCKDESC_UV |
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                                SVGA3DBLOCKDESC_W,
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   SVGA3DBLOCKDESC_UVWA       = SVGA3DBLOCKDESC_UVW |
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                                SVGA3DBLOCKDESC_ALPHA,
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   SVGA3DBLOCKDESC_UVWQ       = SVGA3DBLOCKDESC_U |
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                                SVGA3DBLOCKDESC_V |
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                                SVGA3DBLOCKDESC_W |
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                                SVGA3DBLOCKDESC_Q,
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   SVGA3DBLOCKDESC_LA         = SVGA3DBLOCKDESC_LUMINANCE |
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                                SVGA3DBLOCKDESC_ALPHA,
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   SVGA3DBLOCKDESC_R_FP       = SVGA3DBLOCKDESC_RED |
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                                SVGA3DBLOCKDESC_IEEE_FP,
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   SVGA3DBLOCKDESC_RG_FP      = SVGA3DBLOCKDESC_R_FP |
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                                SVGA3DBLOCKDESC_GREEN,
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   SVGA3DBLOCKDESC_RGB_FP     = SVGA3DBLOCKDESC_RG_FP |
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                                SVGA3DBLOCKDESC_BLUE,
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   SVGA3DBLOCKDESC_RGBA_FP    = SVGA3DBLOCKDESC_RGB_FP |
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                                SVGA3DBLOCKDESC_ALPHA,
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   SVGA3DBLOCKDESC_DS         = SVGA3DBLOCKDESC_DEPTH |
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                                SVGA3DBLOCKDESC_STENCIL,
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   SVGA3DBLOCKDESC_YUV        = SVGA3DBLOCKDESC_UV_VIDEO |
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                                SVGA3DBLOCKDESC_Y,
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   SVGA3DBLOCKDESC_AYUV       = SVGA3DBLOCKDESC_ALPHA |
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                                SVGA3DBLOCKDESC_Y |
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                                SVGA3DBLOCKDESC_U_VIDEO |
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                                SVGA3DBLOCKDESC_V_VIDEO,
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   SVGA3DBLOCKDESC_RGBE       = SVGA3DBLOCKDESC_RGB |
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                                SVGA3DBLOCKDESC_EXP,
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   SVGA3DBLOCKDESC_COMPRESSED_SRGB = SVGA3DBLOCKDESC_COMPRESSED |
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                                     SVGA3DBLOCKDESC_SRGB,
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   SVGA3DBLOCKDESC_NV12       = SVGA3DBLOCKDESC_PLANAR_YUV |
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                                SVGA3DBLOCKDESC_2PLANAR_YUV,
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   SVGA3DBLOCKDESC_YV12       = SVGA3DBLOCKDESC_PLANAR_YUV |
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                                SVGA3DBLOCKDESC_3PLANAR_YUV,
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};
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typedef struct SVGA3dChannelDef {
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  union {
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      uint8 blue;
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      uint8 u;
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      uint8 uv_video;
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      uint8 u_video;
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   };
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   union {
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      uint8 green;
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      uint8 v;
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      uint8 stencil;
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      uint8 v_video;
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   };
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   union {
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      uint8 red;
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      uint8 w;
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      uint8 luminance;
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      uint8 y;
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      uint8 depth;
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      uint8 data;
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   };
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   union {
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      uint8 alpha;
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      uint8 q;
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      uint8 exp;
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   };
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} SVGA3dChannelDef;
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struct svga3d_surface_desc {
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   SVGA3dSurfaceFormat format;
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   enum svga3d_block_desc block_desc;
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   SVGA3dSize block_size;
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   uint32 bytes_per_block;
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   uint32 pitch_bytes_per_block;
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   uint32 totalBitDepth;
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   SVGA3dChannelDef bitDepth;
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   SVGA3dChannelDef bitOffset;
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};
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static const struct svga3d_surface_desc svga3d_surface_descs[] = {
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   {SVGA3D_FORMAT_INVALID, SVGA3DBLOCKDESC_NONE,
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      {1, 1, 1},  0, 0,
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      0, {{0}, {0}, {0}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_X8R8G8B8, SVGA3DBLOCKDESC_RGB,
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      {1, 1, 1},  4, 4,
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      24, {{8}, {8}, {8}, {0}},
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      {{0}, {8}, {16}, {24}}},
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   {SVGA3D_A8R8G8B8, SVGA3DBLOCKDESC_RGBA,
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      {1, 1, 1},  4, 4,
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      32, {{8}, {8}, {8}, {8}},
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      {{0}, {8}, {16}, {24}}},
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   {SVGA3D_R5G6B5, SVGA3DBLOCKDESC_RGB,
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      {1, 1, 1},  2, 2,
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      16, {{5}, {6}, {5}, {0}},
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      {{0}, {5}, {11}, {0}}},
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   {SVGA3D_X1R5G5B5, SVGA3DBLOCKDESC_RGB,
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      {1, 1, 1},  2, 2,
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      15, {{5}, {5}, {5}, {0}},
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      {{0}, {5}, {10}, {0}}},
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   {SVGA3D_A1R5G5B5, SVGA3DBLOCKDESC_RGBA,
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      {1, 1, 1},  2, 2,
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      16, {{5}, {5}, {5}, {1}},
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      {{0}, {5}, {10}, {15}}},
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   {SVGA3D_A4R4G4B4, SVGA3DBLOCKDESC_RGBA,
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      {1, 1, 1},  2, 2,
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      16, {{4}, {4}, {4}, {4}},
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      {{0}, {4}, {8}, {12}}},
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   {SVGA3D_Z_D32, SVGA3DBLOCKDESC_DEPTH,
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      {1, 1, 1},  4, 4,
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      32, {{0}, {0}, {32}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_Z_D16, SVGA3DBLOCKDESC_DEPTH,
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      {1, 1, 1},  2, 2,
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      16, {{0}, {0}, {16}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_Z_D24S8, SVGA3DBLOCKDESC_DS,
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      {1, 1, 1},  4, 4,
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      32, {{0}, {8}, {24}, {0}},
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      {{0}, {24}, {0}, {0}}},
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   {SVGA3D_Z_D15S1, SVGA3DBLOCKDESC_DS,
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      {1, 1, 1},  2, 2,
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      16, {{0}, {1}, {15}, {0}},
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      {{0}, {15}, {0}, {0}}},
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   {SVGA3D_LUMINANCE8, SVGA3DBLOCKDESC_LUMINANCE,
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      {1, 1, 1},  1, 1,
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      8, {{0}, {0}, {8}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_LUMINANCE4_ALPHA4, SVGA3DBLOCKDESC_LA,
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    {1  , 1, 1},  1, 1,
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      8, {{0}, {0}, {4}, {4}},
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      {{0}, {0}, {0}, {4}}},
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   {SVGA3D_LUMINANCE16, SVGA3DBLOCKDESC_LUMINANCE,
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      {1, 1, 1},  2, 2,
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      16, {{0}, {0}, {16}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_LUMINANCE8_ALPHA8, SVGA3DBLOCKDESC_LA,
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      {1, 1, 1},  2, 2,
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      16, {{0}, {0}, {8}, {8}},
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      {{0}, {0}, {0}, {8}}},
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   {SVGA3D_DXT1, SVGA3DBLOCKDESC_COMPRESSED,
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      {4, 4, 1},  8, 8,
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      64, {{0}, {0}, {64}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_DXT2, SVGA3DBLOCKDESC_COMPRESSED,
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      {4, 4, 1},  16, 16,
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      128, {{0}, {0}, {128}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_DXT3, SVGA3DBLOCKDESC_COMPRESSED,
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      {4, 4, 1},  16, 16,
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      128, {{0}, {0}, {128}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_DXT4, SVGA3DBLOCKDESC_COMPRESSED,
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      {4, 4, 1},  16, 16,
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      128, {{0}, {0}, {128}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_DXT5, SVGA3DBLOCKDESC_COMPRESSED,
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      {4, 4, 1},  16, 16,
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      128, {{0}, {0}, {128}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_BUMPU8V8, SVGA3DBLOCKDESC_UV,
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      {1, 1, 1},  2, 2,
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      16, {{0}, {0}, {8}, {8}},
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      {{0}, {0}, {0}, {8}}},
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   {SVGA3D_BUMPL6V5U5, SVGA3DBLOCKDESC_UVL,
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      {1, 1, 1},  2, 2,
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      16, {{5}, {5}, {6}, {0}},
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      {{11}, {6}, {0}, {0}}},
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   {SVGA3D_BUMPX8L8V8U8, SVGA3DBLOCKDESC_UVL,
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      {1, 1, 1},  4, 4,
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      32, {{8}, {8}, {8}, {0}},
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      {{16}, {8}, {0}, {0}}},
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   {SVGA3D_FORMAT_DEAD1, SVGA3DBLOCKDESC_UVL,
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      {0, 0, 0},  0, 0,
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       0, {{0}, {0}, {0}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_ARGB_S10E5, SVGA3DBLOCKDESC_RGBA_FP,
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      {1, 1, 1},  8, 8,
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      64, {{16}, {16}, {16}, {16}},
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      {{32}, {16}, {0}, {48}}},
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   {SVGA3D_ARGB_S23E8, SVGA3DBLOCKDESC_RGBA_FP,
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      {1, 1, 1},  16, 16,
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      128, {{32}, {32}, {32}, {32}},
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      {{64}, {32}, {0}, {96}}},
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   {SVGA3D_A2R10G10B10, SVGA3DBLOCKDESC_RGBA,
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      {1, 1, 1},  4, 4,
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      32, {{10}, {10}, {10}, {2}},
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      {{0}, {10}, {20}, {30}}},
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   {SVGA3D_V8U8, SVGA3DBLOCKDESC_UV,
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      {1, 1, 1},  2, 2,
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      16, {{8}, {8}, {0}, {0}},
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      {{8}, {0}, {0}, {0}}},
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   {SVGA3D_Q8W8V8U8, SVGA3DBLOCKDESC_UVWQ,
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      {1, 1, 1},  4, 4,
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      32, {{8}, {8}, {8}, {8}},
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      {{24}, {16}, {8}, {0}}},
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   {SVGA3D_CxV8U8, SVGA3DBLOCKDESC_UV,
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      {1, 1, 1},  2, 2,
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      16, {{8}, {8}, {0}, {0}},
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      {{8}, {0}, {0}, {0}}},
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   {SVGA3D_X8L8V8U8, SVGA3DBLOCKDESC_UVL,
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      {1, 1, 1},  4, 4,
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      24, {{8}, {8}, {8}, {0}},
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      {{16}, {8}, {0}, {0}}},
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   {SVGA3D_A2W10V10U10, SVGA3DBLOCKDESC_UVWA,
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      {1, 1, 1},  4, 4,
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      32, {{10}, {10}, {10}, {2}},
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      {{0}, {10}, {20}, {30}}},
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   {SVGA3D_ALPHA8, SVGA3DBLOCKDESC_ALPHA,
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      {1, 1, 1},  1, 1,
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      8, {{0}, {0}, {0}, {8}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_R_S10E5, SVGA3DBLOCKDESC_R_FP,
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      {1, 1, 1},  2, 2,
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      16, {{0}, {0}, {16}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_R_S23E8, SVGA3DBLOCKDESC_R_FP,
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      {1, 1, 1},  4, 4,
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      32, {{0}, {0}, {32}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_RG_S10E5, SVGA3DBLOCKDESC_RG_FP,
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      {1, 1, 1},  4, 4,
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      32, {{0}, {16}, {16}, {0}},
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      {{0}, {16}, {0}, {0}}},
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   {SVGA3D_RG_S23E8, SVGA3DBLOCKDESC_RG_FP,
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      {1, 1, 1},  8, 8,
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      64, {{0}, {32}, {32}, {0}},
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      {{0}, {32}, {0}, {0}}},
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   {SVGA3D_BUFFER, SVGA3DBLOCKDESC_BUFFER,
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      {1, 1, 1},  1, 1,
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      8, {{0}, {0}, {8}, {0}},
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      {{0}, {0}, {0}, {0}}},
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   {SVGA3D_Z_D24X8, SVGA3DBLOCKDESC_DEPTH,
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      {1, 1, 1},  4, 4,
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      32, {{0}, {0}, {24}, {0}},
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      {{0}, {24}, {0}, {0}}},
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   {SVGA3D_V16U16, SVGA3DBLOCKDESC_UV,
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      {1, 1, 1},  4, 4,
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      32, {{16}, {16}, {0}, {0}},
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      {{16}, {0}, {0}, {0}}},
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   {SVGA3D_G16R16, SVGA3DBLOCKDESC_RG,
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      {1, 1, 1},  4, 4,
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      32, {{0}, {16}, {16}, {0}},
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      {{0}, {0}, {16}, {0}}},
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   {SVGA3D_A16B16G16R16, SVGA3DBLOCKDESC_RGBA,
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      {1, 1, 1},  8, 8,
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      64, {{16}, {16}, {16}, {16}},
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      {{32}, {16}, {0}, {48}}},
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   {SVGA3D_UYVY, SVGA3DBLOCKDESC_YUV,
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      {1, 1, 1},  2, 2,
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      16, {{8}, {0}, {8}, {0}},
395
      {{0}, {0}, {8}, {0}}},
396

397
   {SVGA3D_YUY2, SVGA3DBLOCKDESC_YUV,
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      {1, 1, 1},  2, 2,
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      16, {{8}, {0}, {8}, {0}},
400
      {{8}, {0}, {0}, {0}}},
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402
   {SVGA3D_NV12, SVGA3DBLOCKDESC_NV12,
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      {2, 2, 1},  6, 2,
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      48, {{0}, {0}, {48}, {0}},
405
      {{0}, {0}, {0}, {0}}},
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407
   {SVGA3D_AYUV, SVGA3DBLOCKDESC_AYUV,
408
      {1, 1, 1},  4, 4,
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      32, {{8}, {8}, {8}, {8}},
410
      {{0}, {8}, {16}, {24}}},
411

412
   {SVGA3D_R32G32B32A32_TYPELESS, SVGA3DBLOCKDESC_RGBA,
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      {1, 1, 1},  16, 16,
414
      128, {{32}, {32}, {32}, {32}},
415
      {{64}, {32}, {0}, {96}}},
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417
   {SVGA3D_R32G32B32A32_UINT, SVGA3DBLOCKDESC_RGBA,
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      {1, 1, 1},  16, 16,
419
      128, {{32}, {32}, {32}, {32}},
420
      {{64}, {32}, {0}, {96}}},
421

422
   {SVGA3D_R32G32B32A32_SINT, SVGA3DBLOCKDESC_UVWQ,
423
      {1, 1, 1},  16, 16,
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      128, {{32}, {32}, {32}, {32}},
425
      {{64}, {32}, {0}, {96}}},
426

427
   {SVGA3D_R32G32B32_TYPELESS, SVGA3DBLOCKDESC_RGB,
428
      {1, 1, 1},  12, 12,
429
      96, {{32}, {32}, {32}, {0}},
430
      {{64}, {32}, {0}, {0}}},
431

432
   {SVGA3D_R32G32B32_FLOAT, SVGA3DBLOCKDESC_RGB_FP,
433
      {1, 1, 1},  12, 12,
434
      96, {{32}, {32}, {32}, {0}},
435
      {{64}, {32}, {0}, {0}}},
436

437
   {SVGA3D_R32G32B32_UINT, SVGA3DBLOCKDESC_RGB,
438
      {1, 1, 1},  12, 12,
439
      96, {{32}, {32}, {32}, {0}},
440
      {{64}, {32}, {0}, {0}}},
441

442
   {SVGA3D_R32G32B32_SINT, SVGA3DBLOCKDESC_UVW,
443
      {1, 1, 1},  12, 12,
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      96, {{32}, {32}, {32}, {0}},
445
      {{64}, {32}, {0}, {0}}},
446

447
   {SVGA3D_R16G16B16A16_TYPELESS, SVGA3DBLOCKDESC_RGBA,
448
      {1, 1, 1},  8, 8,
449
      64, {{16}, {16}, {16}, {16}},
450
      {{32}, {16}, {0}, {48}}},
451

452
   {SVGA3D_R16G16B16A16_UINT, SVGA3DBLOCKDESC_RGBA,
453
      {1, 1, 1},  8, 8,
454
      64, {{16}, {16}, {16}, {16}},
455
      {{32}, {16}, {0}, {48}}},
456

457
   {SVGA3D_R16G16B16A16_SNORM, SVGA3DBLOCKDESC_UVWQ,
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      {1, 1, 1},  8, 8,
459
      64, {{16}, {16}, {16}, {16}},
460
      {{32}, {16}, {0}, {48}}},
461

462
   {SVGA3D_R16G16B16A16_SINT, SVGA3DBLOCKDESC_UVWQ,
463
      {1, 1, 1},  8, 8,
464
      64, {{16}, {16}, {16}, {16}},
465
      {{32}, {16}, {0}, {48}}},
466

467
   {SVGA3D_R32G32_TYPELESS, SVGA3DBLOCKDESC_RG,
468
      {1, 1, 1},  8, 8,
469
      64, {{0}, {32}, {32}, {0}},
470
      {{0}, {32}, {0}, {0}}},
471

472
   {SVGA3D_R32G32_UINT, SVGA3DBLOCKDESC_RG,
473
      {1, 1, 1},  8, 8,
474
      64, {{0}, {32}, {32}, {0}},
475
      {{0}, {32}, {0}, {0}}},
476

477
   {SVGA3D_R32G32_SINT, SVGA3DBLOCKDESC_UV,
478
      {1, 1, 1},  8, 8,
479
      64, {{0}, {32}, {32}, {0}},
480
      {{0}, {32}, {0}, {0}}},
481

482
   {SVGA3D_R32G8X24_TYPELESS, SVGA3DBLOCKDESC_RG,
483
      {1, 1, 1},  8, 8,
484
      64, {{0}, {8}, {32}, {0}},
485
      {{0}, {32}, {0}, {0}}},
486

487
   {SVGA3D_D32_FLOAT_S8X24_UINT, SVGA3DBLOCKDESC_DS,
488
      {1, 1, 1},  8, 8,
489
      64, {{0}, {8}, {32}, {0}},
490
      {{0}, {32}, {0}, {0}}},
491

492
   {SVGA3D_R32_FLOAT_X8X24, SVGA3DBLOCKDESC_R_FP,
493
      {1, 1, 1},  8, 8,
494
      64, {{0}, {0}, {32}, {0}},
495
      {{0}, {0}, {0}, {0}}},
496

497
   {SVGA3D_X32_G8X24_UINT, SVGA3DBLOCKDESC_GREEN,
498
      {1, 1, 1},  8, 8,
499
      64, {{0}, {8}, {0}, {0}},
500
      {{0}, {32}, {0}, {0}}},
501

502
   {SVGA3D_R10G10B10A2_TYPELESS, SVGA3DBLOCKDESC_RGBA,
503
      {1, 1, 1},  4, 4,
504
      32, {{10}, {10}, {10}, {2}},
505
      {{0}, {10}, {20}, {30}}},
506

507
   {SVGA3D_R10G10B10A2_UINT, SVGA3DBLOCKDESC_RGBA,
508
      {1, 1, 1},  4, 4,
509
      32, {{10}, {10}, {10}, {2}},
510
      {{0}, {10}, {20}, {30}}},
511

512
   {SVGA3D_R11G11B10_FLOAT, SVGA3DBLOCKDESC_RGB_FP,
513
      {1, 1, 1},  4, 4,
514
      32, {{10}, {11}, {11}, {0}},
515
      {{0}, {10}, {21}, {0}}},
516

517
   {SVGA3D_R8G8B8A8_TYPELESS, SVGA3DBLOCKDESC_RGBA,
518
      {1, 1, 1},  4, 4,
519
      32, {{8}, {8}, {8}, {8}},
520
      {{16}, {8}, {0}, {24}}},
521

522
   {SVGA3D_R8G8B8A8_UNORM, SVGA3DBLOCKDESC_RGBA,
523
      {1, 1, 1},  4, 4,
524
      32, {{8}, {8}, {8}, {8}},
525
      {{16}, {8}, {0}, {24}}},
526

527
   {SVGA3D_R8G8B8A8_UNORM_SRGB, SVGA3DBLOCKDESC_RGBA_SRGB,
528
      {1, 1, 1},  4, 4,
529
      32, {{8}, {8}, {8}, {8}},
530
      {{16}, {8}, {0}, {24}}},
531

532
   {SVGA3D_R8G8B8A8_UINT, SVGA3DBLOCKDESC_RGBA,
533
      {1, 1, 1},  4, 4,
534
      32, {{8}, {8}, {8}, {8}},
535
      {{16}, {8}, {0}, {24}}},
536

537
   {SVGA3D_R8G8B8A8_SINT, SVGA3DBLOCKDESC_RGBA,
538
      {1, 1, 1},  4, 4,
539
      32, {{8}, {8}, {8}, {8}},
540
      {{16}, {8}, {0}, {24}}},
541

542
   {SVGA3D_R16G16_TYPELESS, SVGA3DBLOCKDESC_RG,
543
      {1, 1, 1},  4, 4,
544
      32, {{0}, {16}, {16}, {0}},
545
      {{0}, {16}, {0}, {0}}},
546

547
   {SVGA3D_R16G16_UINT, SVGA3DBLOCKDESC_RG_FP,
548
      {1, 1, 1},  4, 4,
549
      32, {{0}, {16}, {16}, {0}},
550
      {{0}, {16}, {0}, {0}}},
551

552
   {SVGA3D_R16G16_SINT, SVGA3DBLOCKDESC_UV,
553
      {1, 1, 1},  4, 4,
554
      32, {{0}, {16}, {16}, {0}},
555
      {{0}, {16}, {0}, {0}}},
556

557
   {SVGA3D_R32_TYPELESS, SVGA3DBLOCKDESC_RED,
558
      {1, 1, 1},  4, 4,
559
      32, {{0}, {0}, {32}, {0}},
560
      {{0}, {0}, {0}, {0}}},
561

562
   {SVGA3D_D32_FLOAT, SVGA3DBLOCKDESC_DEPTH,
563
      {1, 1, 1},  4, 4,
564
      32, {{0}, {0}, {32}, {0}},
565
      {{0}, {0}, {0}, {0}}},
566

567
   {SVGA3D_R32_UINT, SVGA3DBLOCKDESC_RED,
568
      {1, 1, 1},  4, 4,
569
      32, {{0}, {0}, {32}, {0}},
570
      {{0}, {0}, {0}, {0}}},
571

572
   {SVGA3D_R32_SINT, SVGA3DBLOCKDESC_RED,
573
      {1, 1, 1},  4, 4,
574
      32, {{0}, {0}, {32}, {0}},
575
      {{0}, {0}, {0}, {0}}},
576

577
   {SVGA3D_R24G8_TYPELESS, SVGA3DBLOCKDESC_RG,
578
      {1, 1, 1},  4, 4,
579
      32, {{0}, {8}, {24}, {0}},
580
      {{0}, {24}, {0}, {0}}},
581

582
   {SVGA3D_D24_UNORM_S8_UINT, SVGA3DBLOCKDESC_DS,
583
      {1, 1, 1},  4, 4,
584
      32, {{0}, {8}, {24}, {0}},
585
      {{0}, {24}, {0}, {0}}},
586

587
   {SVGA3D_R24_UNORM_X8, SVGA3DBLOCKDESC_RED,
588
      {1, 1, 1},  4, 4,
589
      32, {{0}, {0}, {24}, {0}},
590
      {{0}, {0}, {0}, {0}}},
591

592
   {SVGA3D_X24_G8_UINT, SVGA3DBLOCKDESC_GREEN,
593
      {1, 1, 1},  4, 4,
594
      32, {{0}, {8}, {0}, {0}},
595
      {{0}, {24}, {0}, {0}}},
596

597
   {SVGA3D_R8G8_TYPELESS, SVGA3DBLOCKDESC_RG,
598
      {1, 1, 1},  2, 2,
599
      16, {{0}, {8}, {8}, {0}},
600
      {{0}, {8}, {0}, {0}}},
601

602
   {SVGA3D_R8G8_UNORM, SVGA3DBLOCKDESC_RG,
603
      {1, 1, 1},  2, 2,
604
      16, {{0}, {8}, {8}, {0}},
605
      {{0}, {8}, {0}, {0}}},
606

607
   {SVGA3D_R8G8_UINT, SVGA3DBLOCKDESC_RG,
608
      {1, 1, 1},  2, 2,
609
      16, {{0}, {8}, {8}, {0}},
610
      {{0}, {8}, {0}, {0}}},
611

612
   {SVGA3D_R8G8_SINT, SVGA3DBLOCKDESC_UV,
613
      {1, 1, 1},  2, 2,
614
      16, {{0}, {8}, {8}, {0}},
615
      {{0}, {8}, {0}, {0}}},
616

617
   {SVGA3D_R16_TYPELESS, SVGA3DBLOCKDESC_RED,
618
      {1, 1, 1},  2, 2,
619
      16, {{0}, {0}, {16}, {0}},
620
      {{0}, {0}, {0}, {0}}},
621

622
   {SVGA3D_R16_UNORM, SVGA3DBLOCKDESC_RED,
623
      {1, 1, 1},  2, 2,
624
      16, {{0}, {0}, {16}, {0}},
625
      {{0}, {0}, {0}, {0}}},
626

627
   {SVGA3D_R16_UINT, SVGA3DBLOCKDESC_RED,
628
      {1, 1, 1},  2, 2,
629
      16, {{0}, {0}, {16}, {0}},
630
      {{0}, {0}, {0}, {0}}},
631

632
   {SVGA3D_R16_SNORM, SVGA3DBLOCKDESC_U,
633
      {1, 1, 1},  2, 2,
634
      16, {{0}, {0}, {16}, {0}},
635
      {{0}, {0}, {0}, {0}}},
636

637
   {SVGA3D_R16_SINT, SVGA3DBLOCKDESC_U,
638
      {1, 1, 1},  2, 2,
639
      16, {{0}, {0}, {16}, {0}},
640
      {{0}, {0}, {0}, {0}}},
641

642
   {SVGA3D_R8_TYPELESS, SVGA3DBLOCKDESC_RED,
643
      {1, 1, 1},  1, 1,
644
      8, {{0}, {0}, {8}, {0}},
645
      {{0}, {0}, {0}, {0}}},
646

647
   {SVGA3D_R8_UNORM, SVGA3DBLOCKDESC_RED,
648
      {1, 1, 1},  1, 1,
649
      8, {{0}, {0}, {8}, {0}},
650
      {{0}, {0}, {0}, {0}}},
651

652
   {SVGA3D_R8_UINT, SVGA3DBLOCKDESC_RED,
653
      {1, 1, 1},  1, 1,
654
      8, {{0}, {0}, {8}, {0}},
655
      {{0}, {0}, {0}, {0}}},
656

657
   {SVGA3D_R8_SNORM, SVGA3DBLOCKDESC_U,
658
      {1, 1, 1},  1, 1,
659
      8, {{0}, {0}, {8}, {0}},
660
      {{0}, {0}, {0}, {0}}},
661

662
   {SVGA3D_R8_SINT, SVGA3DBLOCKDESC_U,
663
      {1, 1, 1},  1, 1,
664
      8, {{0}, {0}, {8}, {0}},
665
      {{0}, {0}, {0}, {0}}},
666

667
   {SVGA3D_P8, SVGA3DBLOCKDESC_RED,
668
      {1, 1, 1},  1, 1,
669
      8, {{0}, {0}, {8}, {0}},
670
      {{0}, {0}, {0}, {0}}},
671

672
   {SVGA3D_R9G9B9E5_SHAREDEXP, SVGA3DBLOCKDESC_RGBE,
673
      {1, 1, 1},  4, 4,
674
      32, {{9}, {9}, {9}, {5}},
675
      {{18}, {9}, {0}, {27}}},
676

677
   {SVGA3D_R8G8_B8G8_UNORM, SVGA3DBLOCKDESC_RG,
678
      {1, 1, 1},  2, 2,
679
      16, {{0}, {8}, {8}, {0}},
680
      {{0}, {8}, {0}, {0}}},
681

682
   {SVGA3D_G8R8_G8B8_UNORM, SVGA3DBLOCKDESC_RG,
683
      {1, 1, 1},  2, 2,
684
      16, {{0}, {8}, {8}, {0}},
685
      {{0}, {8}, {0}, {0}}},
686

687
   {SVGA3D_BC1_TYPELESS, SVGA3DBLOCKDESC_COMPRESSED,
688
      {4, 4, 1},  8, 8,
689
      64, {{0}, {0}, {64}, {0}},
690
      {{0}, {0}, {0}, {0}}},
691

692
   {SVGA3D_BC1_UNORM_SRGB, SVGA3DBLOCKDESC_COMPRESSED_SRGB,
693
      {4, 4, 1},  8, 8,
694
      64, {{0}, {0}, {64}, {0}},
695
      {{0}, {0}, {0}, {0}}},
696

697
   {SVGA3D_BC2_TYPELESS, SVGA3DBLOCKDESC_COMPRESSED,
698
      {4, 4, 1},  16, 16,
699
      128, {{0}, {0}, {128}, {0}},
700
      {{0}, {0}, {0}, {0}}},
701

702
   {SVGA3D_BC2_UNORM_SRGB, SVGA3DBLOCKDESC_COMPRESSED_SRGB,
703
      {4, 4, 1},  16, 16,
704
      128, {{0}, {0}, {128}, {0}},
705
      {{0}, {0}, {0}, {0}}},
706

707
   {SVGA3D_BC3_TYPELESS, SVGA3DBLOCKDESC_COMPRESSED,
708
      {4, 4, 1},  16, 16,
709
      128, {{0}, {0}, {128}, {0}},
710
      {{0}, {0}, {0}, {0}}},
711

712
   {SVGA3D_BC3_UNORM_SRGB, SVGA3DBLOCKDESC_COMPRESSED_SRGB,
713
      {4, 4, 1},  16, 16,
714
      128, {{0}, {0}, {128}, {0}},
715
      {{0}, {0}, {0}, {0}}},
716

717
   {SVGA3D_BC4_TYPELESS, SVGA3DBLOCKDESC_COMPRESSED,
718
      {4, 4, 1},  8, 8,
719
      64, {{0}, {0}, {64}, {0}},
720
      {{0}, {0}, {0}, {0}}},
721

722
   {SVGA3D_ATI1, SVGA3DBLOCKDESC_COMPRESSED,
723
      {4, 4, 1},  8, 8,
724
      64, {{0}, {0}, {64}, {0}},
725
      {{0}, {0}, {0}, {0}}},
726

727
   {SVGA3D_BC4_SNORM, SVGA3DBLOCKDESC_COMPRESSED,
728
      {4, 4, 1},  8, 8,
729
      64, {{0}, {0}, {64}, {0}},
730
      {{0}, {0}, {0}, {0}}},
731

732
   {SVGA3D_BC5_TYPELESS, SVGA3DBLOCKDESC_COMPRESSED,
733
      {4, 4, 1},  16, 16,
734
      128, {{0}, {0}, {128}, {0}},
735
      {{0}, {0}, {0}, {0}}},
736

737
   {SVGA3D_ATI2, SVGA3DBLOCKDESC_COMPRESSED,
738
      {4, 4, 1},  16, 16,
739
      128, {{0}, {0}, {128}, {0}},
740
      {{0}, {0}, {0}, {0}}},
741

742
   {SVGA3D_BC5_SNORM, SVGA3DBLOCKDESC_COMPRESSED,
743
      {4, 4, 1},  16, 16,
744
      128, {{0}, {0}, {128}, {0}},
745
      {{0}, {0}, {0}, {0}}},
746

747
   {SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, SVGA3DBLOCKDESC_RGBA,
748
      {1, 1, 1},  4, 4,
749
      32, {{10}, {10}, {10}, {2}},
750
      {{0}, {10}, {20}, {30}}},
751

752
   {SVGA3D_B8G8R8A8_TYPELESS, SVGA3DBLOCKDESC_RGBA,
753
      {1, 1, 1},  4, 4,
754
      32, {{8}, {8}, {8}, {8}},
755
      {{0}, {8}, {16}, {24}}},
756

757
   {SVGA3D_B8G8R8A8_UNORM_SRGB, SVGA3DBLOCKDESC_RGBA_SRGB,
758
      {1, 1, 1},  4, 4,
759
      32, {{8}, {8}, {8}, {8}},
760
      {{0}, {8}, {16}, {24}}},
761

762
   {SVGA3D_B8G8R8X8_TYPELESS, SVGA3DBLOCKDESC_RGB,
763
      {1, 1, 1},  4, 4,
764
      24, {{8}, {8}, {8}, {0}},
765
      {{0}, {8}, {16}, {24}}},
766

767
   {SVGA3D_B8G8R8X8_UNORM_SRGB, SVGA3DBLOCKDESC_RGB_SRGB,
768
      {1, 1, 1},  4, 4,
769
      24, {{8}, {8}, {8}, {0}},
770
      {{0}, {8}, {16}, {24}}},
771

772
   {SVGA3D_Z_DF16, SVGA3DBLOCKDESC_DEPTH,
773
      {1, 1, 1},  2, 2,
774
      16, {{0}, {0}, {16}, {0}},
775
      {{0}, {0}, {0}, {0}}},
776

777
   {SVGA3D_Z_DF24, SVGA3DBLOCKDESC_DEPTH,
778
      {1, 1, 1},  4, 4,
779
      32, {{0}, {8}, {24}, {0}},
780
      {{0}, {24}, {0}, {0}}},
781

782
   {SVGA3D_Z_D24S8_INT, SVGA3DBLOCKDESC_DS,
783
      {1, 1, 1},  4, 4,
784
      32, {{0}, {8}, {24}, {0}},
785
      {{0}, {24}, {0}, {0}}},
786

787
   {SVGA3D_YV12, SVGA3DBLOCKDESC_YV12,
788
      {2, 2, 1},  6, 2,
789
      48, {{0}, {0}, {48}, {0}},
790
      {{0}, {0}, {0}, {0}}},
791

792
   {SVGA3D_R32G32B32A32_FLOAT, SVGA3DBLOCKDESC_RGBA_FP,
793
      {1, 1, 1},  16, 16,
794
      128, {{32}, {32}, {32}, {32}},
795
      {{64}, {32}, {0}, {96}}},
796

797
   {SVGA3D_R16G16B16A16_FLOAT, SVGA3DBLOCKDESC_RGBA_FP,
798
      {1, 1, 1},  8, 8,
799
      64, {{16}, {16}, {16}, {16}},
800
      {{32}, {16}, {0}, {48}}},
801

802
   {SVGA3D_R16G16B16A16_UNORM, SVGA3DBLOCKDESC_RGBA,
803
      {1, 1, 1},  8, 8,
804
      64, {{16}, {16}, {16}, {16}},
805
      {{32}, {16}, {0}, {48}}},
806

807
   {SVGA3D_R32G32_FLOAT, SVGA3DBLOCKDESC_RG_FP,
808
      {1, 1, 1},  8, 8,
809
      64, {{0}, {32}, {32}, {0}},
810
      {{0}, {32}, {0}, {0}}},
811

812
   {SVGA3D_R10G10B10A2_UNORM, SVGA3DBLOCKDESC_RGBA,
813
      {1, 1, 1},  4, 4,
814
      32, {{10}, {10}, {10}, {2}},
815
      {{0}, {10}, {20}, {30}}},
816

817
   {SVGA3D_R8G8B8A8_SNORM, SVGA3DBLOCKDESC_RGBA,
818
      {1, 1, 1},  4, 4,
819
      32, {{8}, {8}, {8}, {8}},
820
      {{24}, {16}, {8}, {0}}},
821

822
   {SVGA3D_R16G16_FLOAT, SVGA3DBLOCKDESC_RG_FP,
823
      {1, 1, 1},  4, 4,
824
      32, {{0}, {16}, {16}, {0}},
825
      {{0}, {16}, {0}, {0}}},
826

827
   {SVGA3D_R16G16_UNORM, SVGA3DBLOCKDESC_RG,
828
      {1, 1, 1},  4, 4,
829
      32, {{0}, {16}, {16}, {0}},
830
      {{0}, {0}, {16}, {0}}},
831

832
   {SVGA3D_R16G16_SNORM, SVGA3DBLOCKDESC_RG,
833
      {1, 1, 1},  4, 4,
834
      32, {{16}, {16}, {0}, {0}},
835
      {{16}, {0}, {0}, {0}}},
836

837
   {SVGA3D_R32_FLOAT, SVGA3DBLOCKDESC_R_FP,
838
      {1, 1, 1},  4, 4,
839
      32, {{0}, {0}, {32}, {0}},
840
      {{0}, {0}, {0}, {0}}},
841

842
   {SVGA3D_R8G8_SNORM, SVGA3DBLOCKDESC_RG,
843
      {1, 1, 1},  2, 2,
844
      16, {{8}, {8}, {0}, {0}},
845
      {{8}, {0}, {0}, {0}}},
846

847
   {SVGA3D_R16_FLOAT, SVGA3DBLOCKDESC_R_FP,
848
      {1, 1, 1},  2, 2,
849
      16, {{0}, {0}, {16}, {0}},
850
      {{0}, {0}, {0}, {0}}},
851

852
   {SVGA3D_D16_UNORM, SVGA3DBLOCKDESC_DEPTH,
853
      {1, 1, 1},  2, 2,
854
      16, {{0}, {0}, {16}, {0}},
855
      {{0}, {0}, {0}, {0}}},
856

857
   {SVGA3D_A8_UNORM, SVGA3DBLOCKDESC_ALPHA,
858
      {1, 1, 1},  1, 1,
859
      8, {{0}, {0}, {0}, {8}},
860
      {{0}, {0}, {0}, {0}}},
861

862
   {SVGA3D_BC1_UNORM, SVGA3DBLOCKDESC_COMPRESSED,
863
      {4, 4, 1},  8, 8,
864
      64, {{0}, {0}, {64}, {0}},
865
      {{0}, {0}, {0}, {0}}},
866

867
   {SVGA3D_BC2_UNORM, SVGA3DBLOCKDESC_COMPRESSED,
868
      {4, 4, 1},  16, 16,
869
      128, {{0}, {0}, {128}, {0}},
870
      {{0}, {0}, {0}, {0}}},
871

872
   {SVGA3D_BC3_UNORM, SVGA3DBLOCKDESC_COMPRESSED,
873
      {4, 4, 1},  16, 16,
874
      128, {{0}, {0}, {128}, {0}},
875
      {{0}, {0}, {0}, {0}}},
876

877
   {SVGA3D_B5G6R5_UNORM, SVGA3DBLOCKDESC_RGB,
878
      {1, 1, 1},  2, 2,
879
      16, {{5}, {6}, {5}, {0}},
880
      {{0}, {5}, {11}, {0}}},
881

882
   {SVGA3D_B5G5R5A1_UNORM, SVGA3DBLOCKDESC_RGBA,
883
      {1, 1, 1},  2, 2,
884
      16, {{5}, {5}, {5}, {1}},
885
      {{0}, {5}, {10}, {15}}},
886

887
   {SVGA3D_B8G8R8A8_UNORM, SVGA3DBLOCKDESC_RGBA,
888
      {1, 1, 1},  4, 4,
889
      32, {{8}, {8}, {8}, {8}},
890
      {{0}, {8}, {16}, {24}}},
891

892
   {SVGA3D_B8G8R8X8_UNORM, SVGA3DBLOCKDESC_RGB,
893
      {1, 1, 1},  4, 4,
894
      24, {{8}, {8}, {8}, {0}},
895
      {{0}, {8}, {16}, {24}}},
896

897
   {SVGA3D_BC4_UNORM, SVGA3DBLOCKDESC_COMPRESSED,
898
      {4, 4, 1},  8, 8,
899
      64, {{0}, {0}, {64}, {0}},
900
      {{0}, {0}, {0}, {0}}},
901

902
   {SVGA3D_BC5_UNORM, SVGA3DBLOCKDESC_COMPRESSED,
903
      {4, 4, 1},  16, 16,
904
      128, {{0}, {0}, {128}, {0}},
905
      {{0}, {0}, {0}, {0}}},
906
};
907

908

909
extern const struct svga3d_surface_desc g_SVGA3dSurfaceDescs[];
910
extern int g_SVGA3dSurfaceDescs_size;
911

912
static inline uint32 clamped_umul32(uint32 a, uint32 b)
913
{
914
	uint64_t tmp = (uint64_t) a*b;
915
	return (tmp > (uint64_t) ((uint32) -1)) ? (uint32) -1 : tmp;
916
}
917

918
static inline uint32 clamped_uadd32(uint32 a, uint32 b)
919
{
920
	uint32 c = a + b;
921
	if (c < a || c < b) {
922
		return MAX_UINT32;
923
	}
924
	return c;
925
}
926

927

928
static inline const struct svga3d_surface_desc *
929
svga3dsurface_get_desc(SVGA3dSurfaceFormat format)
930
{
931
	if (format < ARRAY_SIZE(svga3d_surface_descs))
932
		return &svga3d_surface_descs[format];
933

934
	return &svga3d_surface_descs[SVGA3D_FORMAT_INVALID];
935
}
936

937
/*
938
 *----------------------------------------------------------------------
939
 *
940
 * svga3dsurface_get_mip_size --
941
 *
942
 *      Given a base level size and the mip level, compute the size of
943
 *      the mip level.
944
 *
945
 * Results:
946
 *      See above.
947
 *
948
 * Side effects:
949
 *      None.
950
 *
951
 *----------------------------------------------------------------------
952
 */
953

954
static inline SVGA3dSize
955
svga3dsurface_get_mip_size(SVGA3dSize base_level, uint32 mip_level)
956
{
957
	SVGA3dSize size;
958

959
	size.width = max_t(uint32, base_level.width >> mip_level, 1);
960
	size.height = max_t(uint32, base_level.height >> mip_level, 1);
961
	size.depth = max_t(uint32, base_level.depth >> mip_level, 1);
962
	return size;
963
}
964

965
static inline void
966
svga3dsurface_get_size_in_blocks(const struct svga3d_surface_desc *desc,
967
				 const SVGA3dSize *pixel_size,
968
				 SVGA3dSize *block_size)
969
{
970
	block_size->width = DIV_ROUND_UP(pixel_size->width,
971
					 desc->block_size.width);
972
	block_size->height = DIV_ROUND_UP(pixel_size->height,
973
					  desc->block_size.height);
974
	block_size->depth = DIV_ROUND_UP(pixel_size->depth,
975
					 desc->block_size.depth);
976
}
977

978
static inline bool
979
svga3dsurface_is_planar_surface(const struct svga3d_surface_desc *desc)
980
{
981
	return (desc->block_desc & SVGA3DBLOCKDESC_PLANAR_YUV) != 0;
982
}
983

984
static inline uint32
985
svga3dsurface_calculate_pitch(const struct svga3d_surface_desc *desc,
986
			      const SVGA3dSize *size)
987
{
988
	uint32 pitch;
989
	SVGA3dSize blocks;
990

991
	svga3dsurface_get_size_in_blocks(desc, size, &blocks);
992

993
	pitch = blocks.width * desc->pitch_bytes_per_block;
994

995
	return pitch;
996
}
997

998
/*
999
 *-----------------------------------------------------------------------------
1000
 *
1001
 * svga3dsurface_get_image_buffer_size --
1002
 *
1003
 *      Return the number of bytes of buffer space required to store
1004
 *      one image of a surface, optionally using the specified pitch.
1005
 *
1006
 *      If pitch is zero, it is assumed that rows are tightly packed.
1007
 *
1008
 *      This function is overflow-safe. If the result would have
1009
 *      overflowed, instead we return MAX_UINT32.
1010
 *
1011
 * Results:
1012
 *      Byte count.
1013
 *
1014
 * Side effects:
1015
 *      None.
1016
 *
1017
 *-----------------------------------------------------------------------------
1018
 */
1019

1020
static inline uint32
1021
svga3dsurface_get_image_buffer_size(const struct svga3d_surface_desc *desc,
1022
				    const SVGA3dSize *size,
1023
				    uint32 pitch)
1024
{
1025
	SVGA3dSize image_blocks;
1026
	uint32 slice_size, total_size;
1027

1028
	svga3dsurface_get_size_in_blocks(desc, size, &image_blocks);
1029

1030
	if (svga3dsurface_is_planar_surface(desc)) {
1031
		total_size = clamped_umul32(image_blocks.width,
1032
					    image_blocks.height);
1033
		total_size = clamped_umul32(total_size, image_blocks.depth);
1034
		total_size = clamped_umul32(total_size, desc->bytes_per_block);
1035
		return total_size;
1036
	}
1037

1038
	if (pitch == 0)
1039
		pitch = svga3dsurface_calculate_pitch(desc, size);
1040

1041
	slice_size = clamped_umul32(image_blocks.height, pitch);
1042
	total_size = clamped_umul32(slice_size, image_blocks.depth);
1043

1044
	return total_size;
1045
}
1046

1047

1048
static inline uint32
1049
svga3dsurface_get_image_offset(SVGA3dSurfaceFormat format,
1050
                               SVGA3dSize baseLevelSize,
1051
                               uint32 numMipLevels,
1052
                               uint32 layer,
1053
                               uint32 mip)
1054

1055
{
1056
   uint32 offset;
1057
   uint32 mipChainBytes;
1058
   uint32 mipChainBytesToLevel;
1059
   uint32 i;
1060
   const struct svga3d_surface_desc *desc;
1061
   SVGA3dSize mipSize;
1062
   uint32 bytes;
1063

1064
   desc = svga3dsurface_get_desc(format);
1065

1066
   mipChainBytes = 0;
1067
   mipChainBytesToLevel = 0;
1068
   for (i = 0; i < numMipLevels; i++) {
1069
      mipSize = svga3dsurface_get_mip_size(baseLevelSize, i);
1070
      bytes = svga3dsurface_get_image_buffer_size(desc, &mipSize, 0);
1071
      mipChainBytes += bytes;
1072
      if (i < mip) {
1073
         mipChainBytesToLevel += bytes;
1074
      }
1075
   }
1076

1077
   offset = mipChainBytes * layer + mipChainBytesToLevel;
1078

1079
   return offset;
1080
}
1081

1082

1083
static inline uint32
1084
svga3dsurface_get_serialized_size(SVGA3dSurfaceFormat format,
1085
				  SVGA3dSize base_level_size,
1086
				  uint32 num_mip_levels,
1087
                                  uint32 num_layers)
1088
{
1089
	const struct svga3d_surface_desc *desc = svga3dsurface_get_desc(format);
1090
	uint64_t total_size = 0;
1091
	uint32 mip;
1092

1093
	for (mip = 0; mip < num_mip_levels; mip++) {
1094
		SVGA3dSize size =
1095
			svga3dsurface_get_mip_size(base_level_size, mip);
1096
		total_size += svga3dsurface_get_image_buffer_size(desc,
1097
								  &size, 0);
1098
	}
1099

1100
	total_size *= num_layers;
1101

1102
	return (total_size > (uint64_t) MAX_UINT32) ? MAX_UINT32 : 
1103
                                                      (uint32) total_size;
1104
}
1105

1106

1107
/**
1108
 * svga3dsurface_get_serialized_size_extended - Returns the number of bytes
1109
 * required for a surface with given parameters. Support for sample count.
1110
 *
1111
 */
1112
static inline uint32
1113
svga3dsurface_get_serialized_size_extended(SVGA3dSurfaceFormat format,
1114
                                           SVGA3dSize base_level_size,
1115
                                           uint32 num_mip_levels,
1116
                                           uint32 num_layers,
1117
                                           uint32 num_samples)
1118
{
1119
   uint64_t total_size = svga3dsurface_get_serialized_size(format,
1120
                                                           base_level_size,
1121
                                                           num_mip_levels,
1122
                                                           num_layers);
1123

1124
   total_size *= (num_samples > 1 ? num_samples : 1);
1125

1126
   return (total_size > (uint64_t) MAX_UINT32) ? MAX_UINT32 :
1127
      (uint32) total_size;
1128
}
1129

1130

1131
/**
1132
 * Compute the offset (in bytes) to a pixel in an image (or volume).
1133
 * 'width' is the image width in pixels
1134
 * 'height' is the image height in pixels
1135
 */
1136
static inline uint32
1137
svga3dsurface_get_pixel_offset(SVGA3dSurfaceFormat format,
1138
                               uint32 width, uint32 height,
1139
                               uint32 x, uint32 y, uint32 z)
1140
{
1141
   const struct svga3d_surface_desc *desc = svga3dsurface_get_desc(format);
1142
   const uint32 bw = desc->block_size.width, bh = desc->block_size.height;
1143
   const uint32 bd = desc->block_size.depth;
1144
   const uint32 rowstride = DIV_ROUND_UP(width, bw) * desc->bytes_per_block;
1145
   const uint32 imgstride = DIV_ROUND_UP(height, bh) * rowstride;
1146
   const uint32 offset = (z / bd * imgstride +
1147
                          y / bh * rowstride +
1148
                          x / bw * desc->bytes_per_block);
1149
   return offset;
1150
}
1151

1152
#endif
1153

1154
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