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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/svga/svga_cmd_vgpu10.c
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/**********************************************************
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* Copyright 2008-2013 VMware, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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**********************************************************/
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/**
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* @file svga_cmd_vgpu10.c
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*
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* Command construction utility for the vgpu10 SVGA3D protocol.
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*
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* \author Mingcheng Chen
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* \author Brian Paul
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*/
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#include "svga_winsys.h"
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#include "svga_resource_buffer.h"
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#include "svga_resource_texture.h"
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#include "svga_surface.h"
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#include "svga_cmd.h"
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/**
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* Emit a surface relocation for RenderTargetViewId
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*/
46
static void
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view_relocation(struct svga_winsys_context *swc, // IN
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struct pipe_surface *surface, // IN
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SVGA3dRenderTargetViewId *id, // OUT
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unsigned flags)
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{
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if (surface) {
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struct svga_surface *s = svga_surface(surface);
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assert(s->handle);
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swc->surface_relocation(swc, id, NULL, s->handle, flags);
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}
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else {
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swc->surface_relocation(swc, id, NULL, NULL, flags);
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}
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}
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62
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/**
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* Emit a surface relocation for a ResourceId.
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*/
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static void
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surface_to_resourceid(struct svga_winsys_context *swc, // IN
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struct svga_winsys_surface *surface, // IN
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SVGA3dSurfaceId *sid, // OUT
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unsigned flags) // IN
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{
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if (surface) {
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swc->surface_relocation(swc, sid, NULL, surface, flags);
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}
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else {
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swc->surface_relocation(swc, sid, NULL, NULL, flags);
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}
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}
79
80
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#define SVGA3D_CREATE_COMMAND(CommandName, CommandCode) \
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SVGA3dCmdDX##CommandName *cmd; \
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{ \
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cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
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sizeof(SVGA3dCmdDX##CommandName), 0); \
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if (!cmd) \
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return PIPE_ERROR_OUT_OF_MEMORY; \
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}
89
90
#define SVGA3D_CREATE_CMD_COUNT(CommandName, CommandCode, ElementClassName) \
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SVGA3dCmdDX##CommandName *cmd; \
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{ \
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assert(count > 0); \
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cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
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sizeof(SVGA3dCmdDX##CommandName) + \
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count * sizeof(ElementClassName), 0); \
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if (!cmd) \
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return PIPE_ERROR_OUT_OF_MEMORY; \
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}
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#define SVGA3D_COPY_BASIC(VariableName) \
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{ \
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cmd->VariableName = VariableName; \
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}
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#define SVGA3D_COPY_BASIC_2(VariableName1, VariableName2) \
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{ \
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SVGA3D_COPY_BASIC(VariableName1); \
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SVGA3D_COPY_BASIC(VariableName2); \
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}
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#define SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3) \
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{ \
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SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \
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SVGA3D_COPY_BASIC(VariableName3); \
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}
117
118
#define SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
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VariableName4) \
120
{ \
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SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \
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SVGA3D_COPY_BASIC_2(VariableName3, VariableName4); \
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}
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#define SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \
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VariableName4, VariableName5) \
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{\
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SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \
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SVGA3D_COPY_BASIC_2(VariableName4, VariableName5); \
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}
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#define SVGA3D_COPY_BASIC_6(VariableName1, VariableName2, VariableName3, \
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VariableName4, VariableName5, VariableName6) \
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{\
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SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \
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SVGA3D_COPY_BASIC_3(VariableName4, VariableName5, VariableName6); \
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}
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#define SVGA3D_COPY_BASIC_7(VariableName1, VariableName2, VariableName3, \
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VariableName4, VariableName5, VariableName6, \
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VariableName7) \
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{\
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SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
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VariableName4); \
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SVGA3D_COPY_BASIC_3(VariableName5, VariableName6, VariableName7); \
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}
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#define SVGA3D_COPY_BASIC_8(VariableName1, VariableName2, VariableName3, \
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VariableName4, VariableName5, VariableName6, \
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VariableName7, VariableName8) \
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{\
152
SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
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VariableName4); \
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SVGA3D_COPY_BASIC_4(VariableName5, VariableName6, VariableName7, \
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VariableName8); \
156
}
157
158
#define SVGA3D_COPY_BASIC_9(VariableName1, VariableName2, VariableName3, \
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VariableName4, VariableName5, VariableName6, \
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VariableName7, VariableName8, VariableName9) \
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{\
162
SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \
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VariableName4, VariableName5); \
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SVGA3D_COPY_BASIC_4(VariableName6, VariableName7, VariableName8, \
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VariableName9); \
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}
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168
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enum pipe_error
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SVGA3D_vgpu10_PredCopyRegion(struct svga_winsys_context *swc,
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struct svga_winsys_surface *dstSurf,
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uint32 dstSubResource,
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struct svga_winsys_surface *srcSurf,
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uint32 srcSubResource,
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const SVGA3dCopyBox *box)
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{
177
SVGA3dCmdDXPredCopyRegion *cmd =
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SVGA3D_FIFOReserve(swc,
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SVGA_3D_CMD_DX_PRED_COPY_REGION,
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sizeof(SVGA3dCmdDXPredCopyRegion),
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2); /* two relocations */
182
if (!cmd)
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return PIPE_ERROR_OUT_OF_MEMORY;
184
185
swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);
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swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);
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cmd->dstSubResource = dstSubResource;
188
cmd->srcSubResource = srcSubResource;
189
cmd->box = *box;
190
191
swc->commit(swc);
192
193
return PIPE_OK;
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}
195
196
197
enum pipe_error
198
SVGA3D_vgpu10_PredCopy(struct svga_winsys_context *swc,
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struct svga_winsys_surface *dstSurf,
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struct svga_winsys_surface *srcSurf)
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{
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SVGA3dCmdDXPredCopy *cmd =
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SVGA3D_FIFOReserve(swc,
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SVGA_3D_CMD_DX_PRED_COPY,
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sizeof(SVGA3dCmdDXPredCopy),
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2); /* two relocations */
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if (!cmd)
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return PIPE_ERROR_OUT_OF_MEMORY;
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swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);
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swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);
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swc->commit(swc);
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return PIPE_OK;
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}
217
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enum pipe_error
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SVGA3D_vgpu10_SetViewports(struct svga_winsys_context *swc,
220
unsigned count,
221
const SVGA3dViewport *viewports)
222
{
223
SVGA3D_CREATE_CMD_COUNT(SetViewports, SET_VIEWPORTS, SVGA3dViewport);
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225
cmd->pad0 = 0;
226
memcpy(cmd + 1, viewports, count * sizeof(SVGA3dViewport));
227
228
swc->commit(swc);
229
return PIPE_OK;
230
}
231
232
233
enum pipe_error
234
SVGA3D_vgpu10_SetShader(struct svga_winsys_context *swc,
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SVGA3dShaderType type,
236
struct svga_winsys_gb_shader *gbshader,
237
SVGA3dShaderId shaderId)
238
{
239
SVGA3dCmdDXSetShader *cmd = SVGA3D_FIFOReserve(swc,
240
SVGA_3D_CMD_DX_SET_SHADER,
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sizeof *cmd,
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1); /* one relocation */
243
if (!cmd)
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return PIPE_ERROR_OUT_OF_MEMORY;
245
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swc->shader_relocation(swc, &cmd->shaderId, NULL, NULL, gbshader, 0);
247
248
cmd->type = type;
249
cmd->shaderId = shaderId;
250
swc->commit(swc);
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return PIPE_OK;
253
}
254
255
256
enum pipe_error
257
SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context *swc,
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SVGA3dShaderType type,
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uint32 startView,
260
unsigned count,
261
const SVGA3dShaderResourceViewId ids[],
262
struct svga_winsys_surface **views)
263
{
264
SVGA3dCmdDXSetShaderResources *cmd;
265
SVGA3dShaderResourceViewId *cmd_ids;
266
unsigned i;
267
268
cmd = SVGA3D_FIFOReserve(swc,
269
SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
270
sizeof(SVGA3dCmdDXSetShaderResources) +
271
count * sizeof(SVGA3dShaderResourceViewId),
272
count); /* 'count' relocations */
273
if (!cmd)
274
return PIPE_ERROR_OUT_OF_MEMORY;
275
276
277
cmd->type = type;
278
cmd->startView = startView;
279
280
cmd_ids = (SVGA3dShaderResourceViewId *) (cmd + 1);
281
for (i = 0; i < count; i++) {
282
swc->surface_relocation(swc, cmd_ids + i, NULL, views[i],
283
SVGA_RELOC_READ);
284
cmd_ids[i] = ids[i];
285
}
286
287
swc->commit(swc);
288
return PIPE_OK;
289
}
290
291
292
enum pipe_error
293
SVGA3D_vgpu10_SetSamplers(struct svga_winsys_context *swc,
294
unsigned count,
295
uint32 startSampler,
296
SVGA3dShaderType type,
297
const SVGA3dSamplerId *samplerIds)
298
{
299
SVGA3D_CREATE_CMD_COUNT(SetSamplers, SET_SAMPLERS, SVGA3dSamplerId);
300
301
SVGA3D_COPY_BASIC_2(startSampler, type);
302
memcpy(cmd + 1, samplerIds, count * sizeof(SVGA3dSamplerId));
303
304
swc->commit(swc);
305
return PIPE_OK;
306
}
307
308
309
enum pipe_error
310
SVGA3D_vgpu10_ClearRenderTargetView(struct svga_winsys_context *swc,
311
struct pipe_surface *color_surf,
312
const float *rgba)
313
{
314
SVGA3dCmdDXClearRenderTargetView *cmd;
315
struct svga_surface *ss = svga_surface(color_surf);
316
317
cmd = SVGA3D_FIFOReserve(swc,
318
SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW,
319
sizeof(SVGA3dCmdDXClearRenderTargetView),
320
1); /* one relocation */
321
if (!cmd)
322
return PIPE_ERROR_OUT_OF_MEMORY;
323
324
325
/* NOTE: The following is pretty tricky. We need to emit a view/surface
326
* relocation and we have to provide a pointer to an ID which lies in
327
* the bounds of the command space which we just allocated. However,
328
* we then need to overwrite it with the original RenderTargetViewId.
329
*/
330
view_relocation(swc, color_surf, &cmd->renderTargetViewId,
331
SVGA_RELOC_WRITE);
332
cmd->renderTargetViewId = ss->view_id;
333
334
COPY_4V(cmd->rgba.value, rgba);
335
336
swc->commit(swc);
337
return PIPE_OK;
338
}
339
340
341
enum pipe_error
342
SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context *swc,
343
unsigned color_count,
344
struct pipe_surface **color_surfs,
345
struct pipe_surface *depth_stencil_surf)
346
{
347
const unsigned surf_count = color_count + 1;
348
SVGA3dCmdDXSetRenderTargets *cmd;
349
SVGA3dRenderTargetViewId *ctarget;
350
struct svga_surface *ss;
351
unsigned i;
352
353
assert(surf_count > 0);
354
355
cmd = SVGA3D_FIFOReserve(swc,
356
SVGA_3D_CMD_DX_SET_RENDERTARGETS,
357
sizeof(SVGA3dCmdDXSetRenderTargets) +
358
color_count * sizeof(SVGA3dRenderTargetViewId),
359
surf_count); /* 'surf_count' relocations */
360
if (!cmd)
361
return PIPE_ERROR_OUT_OF_MEMORY;
362
363
/* NOTE: See earlier comment about the tricky handling of the ViewIds.
364
*/
365
366
/* Depth / Stencil buffer */
367
if (depth_stencil_surf) {
368
ss = svga_surface(depth_stencil_surf);
369
view_relocation(swc, depth_stencil_surf, &cmd->depthStencilViewId,
370
SVGA_RELOC_WRITE);
371
cmd->depthStencilViewId = ss->view_id;
372
}
373
else {
374
/* no depth/stencil buffer - still need a relocation */
375
view_relocation(swc, NULL, &cmd->depthStencilViewId,
376
SVGA_RELOC_WRITE);
377
cmd->depthStencilViewId = SVGA3D_INVALID_ID;
378
}
379
380
/* Color buffers */
381
ctarget = (SVGA3dRenderTargetViewId *) &cmd[1];
382
for (i = 0; i < color_count; i++) {
383
if (color_surfs[i]) {
384
ss = svga_surface(color_surfs[i]);
385
view_relocation(swc, color_surfs[i], ctarget + i, SVGA_RELOC_WRITE);
386
ctarget[i] = ss->view_id;
387
}
388
else {
389
view_relocation(swc, NULL, ctarget + i, SVGA_RELOC_WRITE);
390
ctarget[i] = SVGA3D_INVALID_ID;
391
}
392
}
393
394
swc->commit(swc);
395
return PIPE_OK;
396
}
397
398
399
enum pipe_error
400
SVGA3D_vgpu10_SetBlendState(struct svga_winsys_context *swc,
401
SVGA3dBlendStateId blendId,
402
const float *blendFactor,
403
uint32 sampleMask)
404
{
405
SVGA3D_CREATE_COMMAND(SetBlendState, SET_BLEND_STATE);
406
407
SVGA3D_COPY_BASIC_2(blendId, sampleMask);
408
memcpy(cmd->blendFactor, blendFactor, sizeof(float) * 4);
409
410
swc->commit(swc);
411
return PIPE_OK;
412
}
413
414
enum pipe_error
415
SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context *swc,
416
SVGA3dDepthStencilStateId depthStencilId,
417
uint32 stencilRef)
418
{
419
SVGA3D_CREATE_COMMAND(SetDepthStencilState, SET_DEPTHSTENCIL_STATE);
420
421
SVGA3D_COPY_BASIC_2(depthStencilId, stencilRef);
422
423
swc->commit(swc);
424
return PIPE_OK;
425
}
426
427
enum pipe_error
428
SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context *swc,
429
SVGA3dRasterizerStateId rasterizerId)
430
{
431
SVGA3D_CREATE_COMMAND(SetRasterizerState, SET_RASTERIZER_STATE);
432
433
cmd->rasterizerId = rasterizerId;
434
435
swc->commit(swc);
436
return PIPE_OK;
437
}
438
439
enum pipe_error
440
SVGA3D_vgpu10_SetPredication(struct svga_winsys_context *swc,
441
SVGA3dQueryId queryId,
442
uint32 predicateValue)
443
{
444
SVGA3dCmdDXSetPredication *cmd;
445
446
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_PREDICATION,
447
sizeof *cmd, 0);
448
449
if (!cmd)
450
return PIPE_ERROR_OUT_OF_MEMORY;
451
452
cmd->queryId = queryId;
453
cmd->predicateValue = predicateValue;
454
swc->commit(swc);
455
return PIPE_OK;
456
}
457
458
enum pipe_error
459
SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context *swc,
460
unsigned count,
461
const SVGA3dSoTarget *targets,
462
struct svga_winsys_surface **surfaces)
463
{
464
SVGA3dCmdDXSetSOTargets *cmd;
465
SVGA3dSoTarget *sot;
466
unsigned i;
467
468
cmd = SVGA3D_FIFOReserve(swc,
469
SVGA_3D_CMD_DX_SET_SOTARGETS,
470
sizeof(SVGA3dCmdDXSetSOTargets) +
471
count * sizeof(SVGA3dSoTarget),
472
count);
473
474
if (!cmd)
475
return PIPE_ERROR_OUT_OF_MEMORY;
476
477
cmd->pad0 = 0;
478
sot = (SVGA3dSoTarget *)(cmd + 1);
479
for (i = 0; i < count; i++, sot++) {
480
if (surfaces[i]) {
481
sot->offset = targets[i].offset;
482
sot->sizeInBytes = targets[i].sizeInBytes;
483
swc->surface_relocation(swc, &sot->sid, NULL, surfaces[i],
484
SVGA_RELOC_WRITE);
485
}
486
else {
487
sot->offset = 0;
488
sot->sizeInBytes = ~0u;
489
swc->surface_relocation(swc, &sot->sid, NULL, NULL,
490
SVGA_RELOC_WRITE);
491
}
492
}
493
swc->commit(swc);
494
return PIPE_OK;
495
}
496
497
enum pipe_error
498
SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context *swc,
499
unsigned count,
500
const SVGASignedRect *rects)
501
{
502
SVGA3dCmdDXSetScissorRects *cmd;
503
504
assert(count > 0);
505
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SCISSORRECTS,
506
sizeof(SVGA3dCmdDXSetScissorRects) +
507
count * sizeof(SVGASignedRect),
508
0);
509
if (!cmd)
510
return PIPE_ERROR_OUT_OF_MEMORY;
511
512
cmd->pad0 = 0;
513
memcpy(cmd + 1, rects, count * sizeof(SVGASignedRect));
514
515
swc->commit(swc);
516
return PIPE_OK;
517
}
518
519
enum pipe_error
520
SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context *swc,
521
SVGA3dStreamOutputId soid)
522
{
523
SVGA3D_CREATE_COMMAND(SetStreamOutput, SET_STREAMOUTPUT);
524
525
cmd->soid = soid;
526
527
swc->commit(swc);
528
return PIPE_OK;
529
}
530
531
enum pipe_error
532
SVGA3D_vgpu10_Draw(struct svga_winsys_context *swc,
533
uint32 vertexCount,
534
uint32 startVertexLocation)
535
{
536
SVGA3D_CREATE_COMMAND(Draw, DRAW);
537
538
SVGA3D_COPY_BASIC_2(vertexCount, startVertexLocation);
539
540
swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
541
swc->commit(swc);
542
swc->num_draw_commands++;
543
return PIPE_OK;
544
}
545
546
enum pipe_error
547
SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context *swc,
548
uint32 indexCount,
549
uint32 startIndexLocation,
550
int32 baseVertexLocation)
551
{
552
SVGA3D_CREATE_COMMAND(DrawIndexed, DRAW_INDEXED);
553
554
SVGA3D_COPY_BASIC_3(indexCount, startIndexLocation,
555
baseVertexLocation);
556
557
swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
558
swc->commit(swc);
559
swc->num_draw_commands++;
560
return PIPE_OK;
561
}
562
563
enum pipe_error
564
SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context *swc,
565
uint32 vertexCountPerInstance,
566
uint32 instanceCount,
567
uint32 startVertexLocation,
568
uint32 startInstanceLocation)
569
{
570
SVGA3D_CREATE_COMMAND(DrawInstanced, DRAW_INSTANCED);
571
572
SVGA3D_COPY_BASIC_4(vertexCountPerInstance, instanceCount,
573
startVertexLocation, startInstanceLocation);
574
575
swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
576
swc->commit(swc);
577
swc->num_draw_commands++;
578
return PIPE_OK;
579
}
580
581
enum pipe_error
582
SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context *swc,
583
uint32 indexCountPerInstance,
584
uint32 instanceCount,
585
uint32 startIndexLocation,
586
int32 baseVertexLocation,
587
uint32 startInstanceLocation)
588
{
589
SVGA3D_CREATE_COMMAND(DrawIndexedInstanced, DRAW_INDEXED_INSTANCED);
590
591
SVGA3D_COPY_BASIC_5(indexCountPerInstance, instanceCount,
592
startIndexLocation, baseVertexLocation,
593
startInstanceLocation);
594
595
596
swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
597
swc->commit(swc);
598
swc->num_draw_commands++;
599
return PIPE_OK;
600
}
601
602
enum pipe_error
603
SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context *swc)
604
{
605
SVGA3D_CREATE_COMMAND(DrawAuto, DRAW_AUTO);
606
607
cmd->pad0 = 0;
608
swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
609
swc->commit(swc);
610
swc->num_draw_commands++;
611
return PIPE_OK;
612
}
613
614
enum pipe_error
615
SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context *swc,
616
SVGA3dQueryId queryId,
617
SVGA3dQueryType type,
618
SVGA3dDXQueryFlags flags)
619
{
620
SVGA3D_CREATE_COMMAND(DefineQuery, DEFINE_QUERY);
621
622
SVGA3D_COPY_BASIC_3(queryId, type, flags);
623
624
swc->commit(swc);
625
return PIPE_OK;
626
}
627
628
enum pipe_error
629
SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context *swc,
630
SVGA3dQueryId queryId)
631
{
632
SVGA3D_CREATE_COMMAND(DestroyQuery, DESTROY_QUERY);
633
634
cmd->queryId = queryId;
635
636
swc->commit(swc);
637
return PIPE_OK;
638
}
639
640
enum pipe_error
641
SVGA3D_vgpu10_BindQuery(struct svga_winsys_context *swc,
642
struct svga_winsys_gb_query *gbQuery,
643
SVGA3dQueryId queryId)
644
{
645
SVGA3dCmdDXBindQuery *cmd = SVGA3D_FIFOReserve(swc,
646
SVGA_3D_CMD_DX_BIND_QUERY,
647
sizeof *cmd,
648
1);
649
if (!cmd)
650
return PIPE_ERROR_OUT_OF_MEMORY;
651
652
cmd->queryId = queryId;
653
swc->query_relocation(swc, &cmd->mobid, gbQuery);
654
655
swc->commit(swc);
656
return PIPE_OK;
657
}
658
659
enum pipe_error
660
SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context *swc,
661
SVGA3dQueryId queryId,
662
uint32 mobOffset)
663
{
664
SVGA3D_CREATE_COMMAND(SetQueryOffset, SET_QUERY_OFFSET);
665
SVGA3D_COPY_BASIC_2(queryId, mobOffset);
666
swc->commit(swc);
667
return PIPE_OK;
668
}
669
670
enum pipe_error
671
SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context *swc,
672
SVGA3dQueryId queryId)
673
{
674
SVGA3D_CREATE_COMMAND(BeginQuery, BEGIN_QUERY);
675
cmd->queryId = queryId;
676
swc->commit(swc);
677
return PIPE_OK;
678
}
679
680
enum pipe_error
681
SVGA3D_vgpu10_EndQuery(struct svga_winsys_context *swc,
682
SVGA3dQueryId queryId)
683
{
684
SVGA3D_CREATE_COMMAND(EndQuery, END_QUERY);
685
cmd->queryId = queryId;
686
swc->commit(swc);
687
return PIPE_OK;
688
}
689
690
691
enum pipe_error
692
SVGA3D_vgpu10_ClearDepthStencilView(struct svga_winsys_context *swc,
693
struct pipe_surface *ds_surf,
694
uint16 flags,
695
uint16 stencil,
696
float depth)
697
{
698
SVGA3dCmdDXClearDepthStencilView *cmd;
699
struct svga_surface *ss = svga_surface(ds_surf);
700
701
cmd = SVGA3D_FIFOReserve(swc,
702
SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW,
703
sizeof(SVGA3dCmdDXClearDepthStencilView),
704
1); /* one relocation */
705
if (!cmd)
706
return PIPE_ERROR_OUT_OF_MEMORY;
707
708
/* NOTE: The following is pretty tricky. We need to emit a view/surface
709
* relocation and we have to provide a pointer to an ID which lies in
710
* the bounds of the command space which we just allocated. However,
711
* we then need to overwrite it with the original DepthStencilViewId.
712
*/
713
view_relocation(swc, ds_surf, &cmd->depthStencilViewId,
714
SVGA_RELOC_WRITE);
715
cmd->depthStencilViewId = ss->view_id;
716
cmd->flags = flags;
717
cmd->stencil = stencil;
718
cmd->depth = depth;
719
720
swc->commit(swc);
721
return PIPE_OK;
722
}
723
724
enum pipe_error
725
SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context *swc,
726
SVGA3dShaderResourceViewId shaderResourceViewId,
727
struct svga_winsys_surface *surface,
728
SVGA3dSurfaceFormat format,
729
SVGA3dResourceType resourceDimension,
730
const SVGA3dShaderResourceViewDesc *desc)
731
{
732
SVGA3dCmdDXDefineShaderResourceView *cmd;
733
734
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW,
735
sizeof(SVGA3dCmdDXDefineShaderResourceView),
736
1); /* one relocation */
737
if (!cmd)
738
return PIPE_ERROR_OUT_OF_MEMORY;
739
740
SVGA3D_COPY_BASIC_3(shaderResourceViewId, format, resourceDimension);
741
742
swc->surface_relocation(swc, &cmd->sid, NULL, surface,
743
SVGA_RELOC_READ);
744
745
cmd->desc = *desc;
746
747
swc->commit(swc);
748
return PIPE_OK;
749
}
750
751
enum pipe_error
752
SVGA3D_vgpu10_DestroyShaderResourceView(struct svga_winsys_context *swc,
753
SVGA3dShaderResourceViewId shaderResourceViewId)
754
{
755
SVGA3D_CREATE_COMMAND(DestroyShaderResourceView,
756
DESTROY_SHADERRESOURCE_VIEW);
757
758
cmd->shaderResourceViewId = shaderResourceViewId;
759
760
swc->commit(swc);
761
return PIPE_OK;
762
}
763
764
765
enum pipe_error
766
SVGA3D_vgpu10_DefineRenderTargetView(struct svga_winsys_context *swc,
767
SVGA3dRenderTargetViewId renderTargetViewId,
768
struct svga_winsys_surface *surface,
769
SVGA3dSurfaceFormat format,
770
SVGA3dResourceType resourceDimension,
771
const SVGA3dRenderTargetViewDesc *desc)
772
{
773
SVGA3dCmdDXDefineRenderTargetView *cmd;
774
775
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
776
sizeof(SVGA3dCmdDXDefineRenderTargetView),
777
1); /* one relocation */
778
if (!cmd)
779
return PIPE_ERROR_OUT_OF_MEMORY;
780
781
SVGA3D_COPY_BASIC_3(renderTargetViewId, format, resourceDimension);
782
cmd->desc = *desc;
783
784
surface_to_resourceid(swc, surface,
785
&cmd->sid,
786
SVGA_RELOC_READ | SVGA_RELOC_WRITE);
787
788
swc->commit(swc);
789
return PIPE_OK;
790
}
791
792
enum pipe_error
793
SVGA3D_vgpu10_DestroyRenderTargetView(struct svga_winsys_context *swc,
794
SVGA3dRenderTargetViewId renderTargetViewId)
795
{
796
SVGA3D_CREATE_COMMAND(DestroyRenderTargetView, DESTROY_RENDERTARGET_VIEW);
797
798
cmd->renderTargetViewId = renderTargetViewId;
799
800
swc->commit(swc);
801
return PIPE_OK;
802
}
803
804
805
enum pipe_error
806
SVGA3D_vgpu10_DefineDepthStencilView(struct svga_winsys_context *swc,
807
SVGA3dDepthStencilViewId depthStencilViewId,
808
struct svga_winsys_surface *surface,
809
SVGA3dSurfaceFormat format,
810
SVGA3dResourceType resourceDimension,
811
const SVGA3dRenderTargetViewDesc *desc)
812
{
813
SVGA3dCmdDXDefineDepthStencilView *cmd;
814
815
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW,
816
sizeof(SVGA3dCmdDXDefineDepthStencilView),
817
1); /* one relocation */
818
if (!cmd)
819
return PIPE_ERROR_OUT_OF_MEMORY;
820
821
SVGA3D_COPY_BASIC_3(depthStencilViewId, format, resourceDimension);
822
cmd->mipSlice = desc->tex.mipSlice;
823
cmd->firstArraySlice = desc->tex.firstArraySlice;
824
cmd->arraySize = desc->tex.arraySize;
825
cmd->flags = 0;
826
cmd->pad0 = 0;
827
cmd->pad1 = 0;
828
829
surface_to_resourceid(swc, surface,
830
&cmd->sid,
831
SVGA_RELOC_READ | SVGA_RELOC_WRITE);
832
833
swc->commit(swc);
834
return PIPE_OK;
835
}
836
837
enum pipe_error
838
SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context *swc,
839
SVGA3dDepthStencilViewId depthStencilViewId)
840
{
841
SVGA3D_CREATE_COMMAND(DestroyDepthStencilView, DESTROY_DEPTHSTENCIL_VIEW);
842
843
cmd->depthStencilViewId = depthStencilViewId;
844
845
swc->commit(swc);
846
return PIPE_OK;
847
}
848
849
enum pipe_error
850
SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context *swc,
851
unsigned count,
852
SVGA3dElementLayoutId elementLayoutId,
853
const SVGA3dInputElementDesc *elements)
854
{
855
SVGA3dCmdDXDefineElementLayout *cmd;
856
unsigned i;
857
858
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT,
859
sizeof(SVGA3dCmdDXDefineElementLayout) +
860
count * sizeof(SVGA3dInputElementDesc), 0);
861
if (!cmd)
862
return PIPE_ERROR_OUT_OF_MEMORY;
863
864
/* check that all offsets are multiples of four */
865
for (i = 0; i < count; i++) {
866
assert(elements[i].alignedByteOffset % 4 == 0);
867
}
868
(void) i; /* silence unused var in release build */
869
870
cmd->elementLayoutId = elementLayoutId;
871
memcpy(cmd + 1, elements, count * sizeof(SVGA3dInputElementDesc));
872
873
swc->commit(swc);
874
return PIPE_OK;
875
}
876
877
enum pipe_error
878
SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context *swc,
879
SVGA3dElementLayoutId elementLayoutId)
880
{
881
SVGA3D_CREATE_COMMAND(DestroyElementLayout, DESTROY_ELEMENTLAYOUT);
882
883
cmd->elementLayoutId = elementLayoutId;
884
885
swc->commit(swc);
886
return PIPE_OK;
887
}
888
889
enum pipe_error
890
SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context *swc,
891
SVGA3dBlendStateId blendId,
892
uint8 alphaToCoverageEnable,
893
uint8 independentBlendEnable,
894
const SVGA3dDXBlendStatePerRT *perRT)
895
{
896
SVGA3D_CREATE_COMMAND(DefineBlendState, DEFINE_BLEND_STATE);
897
898
cmd->blendId = blendId;
899
cmd->alphaToCoverageEnable = alphaToCoverageEnable;
900
cmd->independentBlendEnable = independentBlendEnable;
901
memcpy(cmd->perRT, perRT, sizeof(cmd->perRT));
902
cmd->pad0 = 0;
903
904
swc->commit(swc);
905
return PIPE_OK;
906
}
907
908
enum pipe_error
909
SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context *swc,
910
SVGA3dBlendStateId blendId)
911
{
912
SVGA3D_CREATE_COMMAND(DestroyBlendState, DESTROY_BLEND_STATE);
913
914
cmd->blendId = blendId;
915
916
swc->commit(swc);
917
return PIPE_OK;
918
}
919
920
enum pipe_error
921
SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context *swc,
922
SVGA3dDepthStencilStateId depthStencilId,
923
uint8 depthEnable,
924
SVGA3dDepthWriteMask depthWriteMask,
925
SVGA3dComparisonFunc depthFunc,
926
uint8 stencilEnable,
927
uint8 frontEnable,
928
uint8 backEnable,
929
uint8 stencilReadMask,
930
uint8 stencilWriteMask,
931
uint8 frontStencilFailOp,
932
uint8 frontStencilDepthFailOp,
933
uint8 frontStencilPassOp,
934
SVGA3dComparisonFunc frontStencilFunc,
935
uint8 backStencilFailOp,
936
uint8 backStencilDepthFailOp,
937
uint8 backStencilPassOp,
938
SVGA3dComparisonFunc backStencilFunc)
939
{
940
SVGA3D_CREATE_COMMAND(DefineDepthStencilState, DEFINE_DEPTHSTENCIL_STATE);
941
942
SVGA3D_COPY_BASIC_9(depthStencilId, depthEnable,
943
depthWriteMask, depthFunc,
944
stencilEnable, frontEnable,
945
backEnable, stencilReadMask,
946
stencilWriteMask);
947
SVGA3D_COPY_BASIC_8(frontStencilFailOp, frontStencilDepthFailOp,
948
frontStencilPassOp, frontStencilFunc,
949
backStencilFailOp, backStencilDepthFailOp,
950
backStencilPassOp, backStencilFunc);
951
952
swc->commit(swc);
953
return PIPE_OK;
954
}
955
956
enum pipe_error
957
SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context *swc,
958
SVGA3dDepthStencilStateId depthStencilId)
959
{
960
SVGA3D_CREATE_COMMAND(DestroyDepthStencilState,
961
DESTROY_DEPTHSTENCIL_STATE);
962
963
cmd->depthStencilId = depthStencilId;
964
965
swc->commit(swc);
966
return PIPE_OK;
967
}
968
969
enum pipe_error
970
SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context *swc,
971
SVGA3dRasterizerStateId rasterizerId,
972
uint8 fillMode,
973
SVGA3dCullMode cullMode,
974
uint8 frontCounterClockwise,
975
int32 depthBias,
976
float depthBiasClamp,
977
float slopeScaledDepthBias,
978
uint8 depthClipEnable,
979
uint8 scissorEnable,
980
uint8 multisampleEnable,
981
uint8 antialiasedLineEnable,
982
float lineWidth,
983
uint8 lineStippleEnable,
984
uint8 lineStippleFactor,
985
uint16 lineStipplePattern,
986
uint8 provokingVertexLast)
987
{
988
SVGA3D_CREATE_COMMAND(DefineRasterizerState, DEFINE_RASTERIZER_STATE);
989
990
SVGA3D_COPY_BASIC_5(rasterizerId, fillMode,
991
cullMode, frontCounterClockwise,
992
depthBias);
993
SVGA3D_COPY_BASIC_6(depthBiasClamp, slopeScaledDepthBias,
994
depthClipEnable, scissorEnable,
995
multisampleEnable, antialiasedLineEnable);
996
cmd->lineWidth = lineWidth;
997
cmd->lineStippleEnable = lineStippleEnable;
998
cmd->lineStippleFactor = lineStippleFactor;
999
cmd->lineStipplePattern = lineStipplePattern;
1000
cmd->provokingVertexLast = provokingVertexLast;
1001
1002
swc->commit(swc);
1003
return PIPE_OK;
1004
}
1005
1006
enum pipe_error
1007
SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context *swc,
1008
SVGA3dRasterizerStateId rasterizerId)
1009
{
1010
SVGA3D_CREATE_COMMAND(DestroyRasterizerState, DESTROY_RASTERIZER_STATE);
1011
1012
cmd->rasterizerId = rasterizerId;
1013
1014
swc->commit(swc);
1015
return PIPE_OK;
1016
}
1017
1018
enum pipe_error
1019
SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context *swc,
1020
SVGA3dSamplerId samplerId,
1021
SVGA3dFilter filter,
1022
uint8 addressU,
1023
uint8 addressV,
1024
uint8 addressW,
1025
float mipLODBias,
1026
uint8 maxAnisotropy,
1027
uint8 comparisonFunc,
1028
SVGA3dRGBAFloat borderColor,
1029
float minLOD,
1030
float maxLOD)
1031
{
1032
SVGA3D_CREATE_COMMAND(DefineSamplerState, DEFINE_SAMPLER_STATE);
1033
1034
SVGA3D_COPY_BASIC_6(samplerId, filter,
1035
addressU, addressV,
1036
addressW, mipLODBias);
1037
SVGA3D_COPY_BASIC_5(maxAnisotropy, comparisonFunc,
1038
borderColor, minLOD,
1039
maxLOD);
1040
cmd->pad0 = 0;
1041
cmd->pad1 = 0;
1042
1043
swc->commit(swc);
1044
return PIPE_OK;
1045
}
1046
1047
enum pipe_error
1048
SVGA3D_vgpu10_DestroySamplerState(struct svga_winsys_context *swc,
1049
SVGA3dSamplerId samplerId)
1050
{
1051
SVGA3D_CREATE_COMMAND(DestroySamplerState, DESTROY_SAMPLER_STATE);
1052
1053
cmd->samplerId = samplerId;
1054
1055
swc->commit(swc);
1056
return PIPE_OK;
1057
}
1058
1059
1060
enum pipe_error
1061
SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context *swc,
1062
struct svga_winsys_gb_shader *gbshader,
1063
SVGA3dShaderId shaderId,
1064
SVGA3dShaderType type,
1065
uint32 sizeInBytes)
1066
{
1067
SVGA3dCmdHeader *header;
1068
SVGA3dCmdDXDefineShader *dcmd;
1069
SVGA3dCmdDXBindShader *bcmd;
1070
unsigned totalSize = 2 * sizeof(*header) +
1071
sizeof(*dcmd) + sizeof(*bcmd);
1072
1073
/* Make sure there is room for both commands */
1074
header = swc->reserve(swc, totalSize, 2);
1075
if (!header)
1076
return PIPE_ERROR_OUT_OF_MEMORY;
1077
1078
/* DXDefineShader command */
1079
header->id = SVGA_3D_CMD_DX_DEFINE_SHADER;
1080
header->size = sizeof(*dcmd);
1081
dcmd = (SVGA3dCmdDXDefineShader *)(header + 1);
1082
dcmd->shaderId = shaderId;
1083
dcmd->type = type;
1084
dcmd->sizeInBytes = sizeInBytes;
1085
1086
/* DXBindShader command */
1087
header = (SVGA3dCmdHeader *)(dcmd + 1);
1088
1089
header->id = SVGA_3D_CMD_DX_BIND_SHADER;
1090
header->size = sizeof(*bcmd);
1091
bcmd = (SVGA3dCmdDXBindShader *)(header + 1);
1092
1093
bcmd->cid = swc->cid;
1094
swc->shader_relocation(swc, NULL, &bcmd->mobid,
1095
&bcmd->offsetInBytes, gbshader, 0);
1096
1097
bcmd->shid = shaderId;
1098
1099
swc->commit(swc);
1100
return PIPE_OK;
1101
}
1102
1103
enum pipe_error
1104
SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context *swc,
1105
SVGA3dShaderId shaderId)
1106
{
1107
SVGA3D_CREATE_COMMAND(DestroyShader, DESTROY_SHADER);
1108
1109
cmd->shaderId = shaderId;
1110
1111
swc->commit(swc);
1112
return PIPE_OK;
1113
}
1114
1115
enum pipe_error
1116
SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context *swc,
1117
SVGA3dStreamOutputId soid,
1118
uint32 numOutputStreamEntries,
1119
uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],
1120
const SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_STREAMOUT_DECLS])
1121
{
1122
unsigned i;
1123
SVGA3D_CREATE_COMMAND(DefineStreamOutput, DEFINE_STREAMOUTPUT);
1124
1125
cmd->soid = soid;
1126
cmd->numOutputStreamEntries = numOutputStreamEntries;
1127
1128
for (i = 0; i < ARRAY_SIZE(cmd->streamOutputStrideInBytes); i++)
1129
cmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];
1130
1131
memcpy(cmd->decl, decl,
1132
sizeof(SVGA3dStreamOutputDeclarationEntry)
1133
* SVGA3D_MAX_DX10_STREAMOUT_DECLS);
1134
1135
cmd->rasterizedStream = 0;
1136
swc->commit(swc);
1137
return PIPE_OK;
1138
}
1139
1140
enum pipe_error
1141
SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context *swc,
1142
SVGA3dStreamOutputId soid)
1143
{
1144
SVGA3D_CREATE_COMMAND(DestroyStreamOutput, DESTROY_STREAMOUTPUT);
1145
1146
cmd->soid = soid;
1147
1148
swc->commit(swc);
1149
return PIPE_OK;
1150
}
1151
1152
enum pipe_error
1153
SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context *swc,
1154
SVGA3dElementLayoutId elementLayoutId)
1155
{
1156
SVGA3D_CREATE_COMMAND(SetInputLayout, SET_INPUT_LAYOUT);
1157
1158
cmd->elementLayoutId = elementLayoutId;
1159
1160
swc->commit(swc);
1161
return PIPE_OK;
1162
}
1163
1164
enum pipe_error
1165
SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context *swc,
1166
unsigned count,
1167
uint32 startBuffer,
1168
const SVGA3dVertexBuffer *bufferInfo,
1169
struct svga_winsys_surface **surfaces)
1170
{
1171
SVGA3dCmdDXSetVertexBuffers *cmd;
1172
SVGA3dVertexBuffer *bufs;
1173
unsigned i;
1174
1175
assert(count > 0);
1176
1177
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS,
1178
sizeof(SVGA3dCmdDXSetVertexBuffers) +
1179
count * sizeof(SVGA3dVertexBuffer),
1180
count); /* 'count' relocations */
1181
if (!cmd)
1182
return PIPE_ERROR_OUT_OF_MEMORY;
1183
1184
cmd->startBuffer = startBuffer;
1185
1186
bufs = (SVGA3dVertexBuffer *) &cmd[1];
1187
for (i = 0; i < count; i++) {
1188
bufs[i].stride = bufferInfo[i].stride;
1189
bufs[i].offset = bufferInfo[i].offset;
1190
assert(bufs[i].stride % 4 == 0);
1191
assert(bufs[i].offset % 4 == 0);
1192
swc->surface_relocation(swc, &bufs[i].sid, NULL, surfaces[i],
1193
SVGA_RELOC_READ);
1194
}
1195
1196
swc->commit(swc);
1197
return PIPE_OK;
1198
}
1199
1200
enum pipe_error
1201
SVGA3D_vgpu10_SetTopology(struct svga_winsys_context *swc,
1202
SVGA3dPrimitiveType topology)
1203
{
1204
SVGA3D_CREATE_COMMAND(SetTopology, SET_TOPOLOGY);
1205
1206
cmd->topology = topology;
1207
1208
swc->commit(swc);
1209
return PIPE_OK;
1210
}
1211
1212
enum pipe_error
1213
SVGA3D_vgpu10_SetIndexBuffer(struct svga_winsys_context *swc,
1214
struct svga_winsys_surface *indexes,
1215
SVGA3dSurfaceFormat format,
1216
uint32 offset)
1217
{
1218
SVGA3dCmdDXSetIndexBuffer *cmd;
1219
1220
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_INDEX_BUFFER,
1221
sizeof(SVGA3dCmdDXSetIndexBuffer),
1222
1); /* one relocations */
1223
if (!cmd)
1224
return PIPE_ERROR_OUT_OF_MEMORY;
1225
1226
swc->surface_relocation(swc, &cmd->sid, NULL, indexes, SVGA_RELOC_READ);
1227
SVGA3D_COPY_BASIC_2(format, offset);
1228
1229
swc->commit(swc);
1230
return PIPE_OK;
1231
}
1232
1233
enum pipe_error
1234
SVGA3D_vgpu10_SetSingleConstantBuffer(struct svga_winsys_context *swc,
1235
unsigned slot,
1236
SVGA3dShaderType type,
1237
struct svga_winsys_surface *surface,
1238
uint32 offsetInBytes,
1239
uint32 sizeInBytes)
1240
{
1241
SVGA3dCmdDXSetSingleConstantBuffer *cmd;
1242
1243
assert(offsetInBytes % 256 == 0);
1244
if (!surface)
1245
assert(sizeInBytes == 0);
1246
else
1247
assert(sizeInBytes > 0);
1248
1249
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER,
1250
sizeof(SVGA3dCmdDXSetSingleConstantBuffer),
1251
1); /* one relocation */
1252
if (!cmd)
1253
return PIPE_ERROR_OUT_OF_MEMORY;
1254
1255
cmd->slot = slot;
1256
cmd->type = type;
1257
swc->surface_relocation(swc, &cmd->sid, NULL, surface, SVGA_RELOC_READ);
1258
cmd->offsetInBytes = offsetInBytes;
1259
cmd->sizeInBytes = sizeInBytes;
1260
1261
swc->commit(swc);
1262
1263
return PIPE_OK;
1264
}
1265
1266
1267
enum pipe_error
1268
SVGA3D_vgpu10_SetConstantBufferOffset(struct svga_winsys_context *swc,
1269
unsigned command,
1270
unsigned slot,
1271
uint32 offsetInBytes)
1272
{
1273
SVGA3dCmdDXSetConstantBufferOffset *cmd;
1274
1275
assert(offsetInBytes % 256 == 0);
1276
1277
cmd = SVGA3D_FIFOReserve(swc, command,
1278
sizeof(SVGA3dCmdDXSetConstantBufferOffset),
1279
0); /* one relocation */
1280
if (!cmd)
1281
return PIPE_ERROR_OUT_OF_MEMORY;
1282
1283
cmd->slot = slot;
1284
cmd->offsetInBytes = offsetInBytes;
1285
1286
swc->commit(swc);
1287
1288
return PIPE_OK;
1289
}
1290
1291
1292
enum pipe_error
1293
SVGA3D_vgpu10_ReadbackSubResource(struct svga_winsys_context *swc,
1294
struct svga_winsys_surface *surface,
1295
unsigned subResource)
1296
{
1297
SVGA3dCmdDXReadbackSubResource *cmd;
1298
1299
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_READBACK_SUBRESOURCE,
1300
sizeof(SVGA3dCmdDXReadbackSubResource),
1301
1);
1302
if (!cmd)
1303
return PIPE_ERROR_OUT_OF_MEMORY;
1304
1305
swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1306
SVGA_RELOC_READ | SVGA_RELOC_INTERNAL);
1307
cmd->subResource = subResource;
1308
1309
swc->commit(swc);
1310
return PIPE_OK;
1311
}
1312
1313
enum pipe_error
1314
SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context *swc,
1315
struct svga_winsys_surface *surface,
1316
const SVGA3dBox *box,
1317
unsigned subResource)
1318
{
1319
SVGA3dCmdDXUpdateSubResource *cmd;
1320
1321
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE,
1322
sizeof(SVGA3dCmdDXUpdateSubResource),
1323
1);
1324
if (!cmd)
1325
return PIPE_ERROR_OUT_OF_MEMORY;
1326
1327
swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1328
SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
1329
cmd->subResource = subResource;
1330
cmd->box = *box;
1331
1332
swc->commit(swc);
1333
return PIPE_OK;
1334
}
1335
1336
enum pipe_error
1337
SVGA3D_vgpu10_GenMips(struct svga_winsys_context *swc,
1338
SVGA3dShaderResourceViewId shaderResourceViewId,
1339
struct svga_winsys_surface *view)
1340
{
1341
SVGA3dCmdDXGenMips *cmd;
1342
1343
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_GENMIPS,
1344
sizeof(SVGA3dCmdDXGenMips), 1);
1345
1346
if (!cmd)
1347
return PIPE_ERROR_OUT_OF_MEMORY;
1348
1349
swc->surface_relocation(swc, &cmd->shaderResourceViewId, NULL, view,
1350
SVGA_RELOC_WRITE);
1351
cmd->shaderResourceViewId = shaderResourceViewId;
1352
1353
swc->commit(swc);
1354
return PIPE_OK;
1355
}
1356
1357
1358
enum pipe_error
1359
SVGA3D_vgpu10_BufferCopy(struct svga_winsys_context *swc,
1360
struct svga_winsys_surface *src,
1361
struct svga_winsys_surface *dst,
1362
unsigned srcx, unsigned dstx, unsigned width)
1363
{
1364
SVGA3dCmdDXBufferCopy *cmd;
1365
1366
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_BUFFER_COPY, sizeof *cmd, 2);
1367
1368
if (!cmd)
1369
return PIPE_ERROR_OUT_OF_MEMORY;
1370
1371
swc->surface_relocation(swc, &cmd->dest, NULL, dst, SVGA_RELOC_WRITE);
1372
swc->surface_relocation(swc, &cmd->src, NULL, src, SVGA_RELOC_READ);
1373
cmd->destX = dstx;
1374
cmd->srcX = srcx;
1375
cmd->width = width;
1376
1377
swc->commit(swc);
1378
return PIPE_OK;
1379
}
1380
1381
enum pipe_error
1382
SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context *swc,
1383
struct svga_winsys_surface *src,
1384
unsigned srcOffset, unsigned srcPitch,
1385
unsigned srcSlicePitch,
1386
struct svga_winsys_surface *dst,
1387
unsigned dstSubResource,
1388
SVGA3dBox *dstBox)
1389
{
1390
SVGA3dCmdDXTransferFromBuffer *cmd;
1391
1392
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,
1393
sizeof(SVGA3dCmdDXTransferFromBuffer), 2);
1394
1395
if (!cmd)
1396
return PIPE_ERROR_OUT_OF_MEMORY;
1397
1398
swc->surface_relocation(swc, &cmd->srcSid, NULL, src, SVGA_RELOC_READ);
1399
swc->surface_relocation(swc, &cmd->destSid, NULL, dst, SVGA_RELOC_WRITE);
1400
cmd->srcOffset = srcOffset;
1401
cmd->srcPitch = srcPitch;
1402
cmd->srcSlicePitch = srcSlicePitch;
1403
cmd->destSubResource = dstSubResource;
1404
cmd->destBox = *dstBox;
1405
1406
swc->commit(swc);
1407
return PIPE_OK;
1408
}
1409
1410
enum pipe_error
1411
SVGA3D_vgpu10_IntraSurfaceCopy(struct svga_winsys_context *swc,
1412
struct svga_winsys_surface *surface,
1413
unsigned level, unsigned face,
1414
const SVGA3dCopyBox *box)
1415
{
1416
SVGA3dCmdIntraSurfaceCopy *cmd =
1417
SVGA3D_FIFOReserve(swc,
1418
SVGA_3D_CMD_INTRA_SURFACE_COPY,
1419
sizeof(SVGA3dCmdIntraSurfaceCopy),
1420
1); /* one relocation */
1421
if (!cmd)
1422
return PIPE_ERROR_OUT_OF_MEMORY;
1423
1424
swc->surface_relocation(swc, &cmd->surface.sid, NULL, surface, SVGA_RELOC_READ | SVGA_RELOC_WRITE);
1425
cmd->surface.face = face;
1426
cmd->surface.mipmap = level;
1427
cmd->box = *box;
1428
1429
swc->commit(swc);
1430
1431
return PIPE_OK;
1432
}
1433
1434
enum pipe_error
1435
SVGA3D_vgpu10_ResolveCopy(struct svga_winsys_context *swc,
1436
unsigned dstSubResource,
1437
struct svga_winsys_surface *dst,
1438
unsigned srcSubResource,
1439
struct svga_winsys_surface *src,
1440
const SVGA3dSurfaceFormat copyFormat)
1441
{
1442
SVGA3dCmdDXResolveCopy *cmd =
1443
SVGA3D_FIFOReserve(swc,
1444
SVGA_3D_CMD_DX_RESOLVE_COPY,
1445
sizeof(SVGA3dCmdDXResolveCopy),
1446
2); /* two relocations */
1447
if (!cmd)
1448
return PIPE_ERROR_OUT_OF_MEMORY;
1449
1450
cmd->dstSubResource = dstSubResource;
1451
swc->surface_relocation(swc, &cmd->dstSid, NULL, dst, SVGA_RELOC_WRITE);
1452
cmd->srcSubResource = srcSubResource;
1453
swc->surface_relocation(swc, &cmd->srcSid, NULL, src, SVGA_RELOC_READ);
1454
cmd->copyFormat = copyFormat;
1455
1456
swc->commit(swc);
1457
1458
return PIPE_OK;
1459
}
1460
1461
1462
enum pipe_error
1463
SVGA3D_sm5_DrawIndexedInstancedIndirect(struct svga_winsys_context *swc,
1464
struct svga_winsys_surface *argBuffer,
1465
unsigned argOffset)
1466
{
1467
SVGA3dCmdDXDrawIndexedInstancedIndirect *cmd =
1468
SVGA3D_FIFOReserve(swc,
1469
SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT,
1470
sizeof(SVGA3dCmdDXDrawIndexedInstancedIndirect),
1471
1); /* one relocation */
1472
if (!cmd)
1473
return PIPE_ERROR_OUT_OF_MEMORY;
1474
1475
swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,
1476
SVGA_RELOC_READ);
1477
cmd->byteOffsetForArgs = argOffset;
1478
1479
swc->commit(swc);
1480
1481
return PIPE_OK;
1482
}
1483
1484
1485
enum pipe_error
1486
SVGA3D_sm5_DrawInstancedIndirect(struct svga_winsys_context *swc,
1487
struct svga_winsys_surface *argBuffer,
1488
unsigned argOffset)
1489
{
1490
SVGA3dCmdDXDrawInstancedIndirect *cmd =
1491
SVGA3D_FIFOReserve(swc,
1492
SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT,
1493
sizeof(SVGA3dCmdDXDrawInstancedIndirect),
1494
1); /* one relocation */
1495
if (!cmd)
1496
return PIPE_ERROR_OUT_OF_MEMORY;
1497
1498
swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,
1499
SVGA_RELOC_READ);
1500
cmd->byteOffsetForArgs = argOffset;
1501
1502
swc->commit(swc);
1503
1504
return PIPE_OK;
1505
}
1506
1507
1508
enum pipe_error
1509
SVGA3D_sm5_Dispatch(struct svga_winsys_context *swc,
1510
const uint32 threadGroupCount[3])
1511
{
1512
SVGA3dCmdDXDispatch *cmd;
1513
1514
cmd = SVGA3D_FIFOReserve(swc,
1515
SVGA_3D_CMD_DX_DISPATCH,
1516
sizeof(SVGA3dCmdDXDispatch),
1517
0);
1518
if (!cmd)
1519
return PIPE_ERROR_OUT_OF_MEMORY;
1520
1521
cmd->threadGroupCountX = threadGroupCount[0];
1522
cmd->threadGroupCountY = threadGroupCount[1];
1523
cmd->threadGroupCountZ = threadGroupCount[2];
1524
1525
swc->commit(swc);
1526
return PIPE_OK;
1527
}
1528
1529
1530
enum pipe_error
1531
SVGA3D_sm5_DispatchIndirect(struct svga_winsys_context *swc,
1532
struct svga_winsys_surface *argBuffer,
1533
uint32 argOffset)
1534
{
1535
SVGA3dCmdDXDispatchIndirect *cmd;
1536
1537
cmd = SVGA3D_FIFOReserve(swc,
1538
SVGA_3D_CMD_DX_DISPATCH_INDIRECT,
1539
sizeof(SVGA3dCmdDXDispatchIndirect),
1540
1);
1541
if (!cmd)
1542
return PIPE_ERROR_OUT_OF_MEMORY;
1543
1544
swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,
1545
SVGA_RELOC_READ);
1546
cmd->byteOffsetForArgs = argOffset;
1547
1548
swc->commit(swc);
1549
return PIPE_OK;
1550
}
1551
1552
1553
/**
1554
* We don't want any flush between DefineStreamOutputWithMob and
1555
* BindStreamOutput because it will cause partial state in command
1556
* buffer. This function make that sure there is enough room for
1557
* both commands before issuing them
1558
*/
1559
1560
enum pipe_error
1561
SVGA3D_sm5_DefineAndBindStreamOutput(struct svga_winsys_context *swc,
1562
SVGA3dStreamOutputId soid,
1563
uint32 numOutputStreamEntries,
1564
uint32 numOutputStreamStrides,
1565
uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],
1566
struct svga_winsys_buffer *declBuf,
1567
uint32 rasterizedStream,
1568
uint32 sizeInBytes)
1569
{
1570
unsigned i;
1571
SVGA3dCmdHeader *header;
1572
SVGA3dCmdDXDefineStreamOutputWithMob *dcmd;
1573
SVGA3dCmdDXBindStreamOutput *bcmd;
1574
1575
unsigned totalSize = 2 * sizeof(*header) +
1576
sizeof(*dcmd) + sizeof(*bcmd);
1577
1578
/* Make sure there is room for both commands */
1579
header = swc->reserve(swc, totalSize, 2);
1580
if (!header)
1581
return PIPE_ERROR_OUT_OF_MEMORY;
1582
1583
/* DXDefineStreamOutputWithMob command */
1584
header->id = SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB;
1585
header->size = sizeof(*dcmd);
1586
dcmd = (SVGA3dCmdDXDefineStreamOutputWithMob *)(header + 1);
1587
dcmd->soid= soid;
1588
dcmd->numOutputStreamEntries = numOutputStreamEntries;
1589
dcmd->numOutputStreamStrides = numOutputStreamStrides;
1590
dcmd->rasterizedStream = rasterizedStream;
1591
1592
for (i = 0; i < ARRAY_SIZE(dcmd->streamOutputStrideInBytes); i++)
1593
dcmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];
1594
1595
1596
/* DXBindStreamOutput command */
1597
header = (SVGA3dCmdHeader *)(dcmd + 1);
1598
1599
header->id = SVGA_3D_CMD_DX_BIND_STREAMOUTPUT;
1600
header->size = sizeof(*bcmd);
1601
bcmd = (SVGA3dCmdDXBindStreamOutput *)(header + 1);
1602
1603
bcmd->soid = soid;
1604
bcmd->offsetInBytes = 0;
1605
swc->mob_relocation(swc, &bcmd->mobid,
1606
&bcmd->offsetInBytes, declBuf, 0,
1607
SVGA_RELOC_WRITE);
1608
1609
bcmd->sizeInBytes = sizeInBytes;
1610
bcmd->offsetInBytes = 0;
1611
1612
1613
swc->commit(swc);
1614
return PIPE_OK;
1615
}
1616
1617