Path: blob/21.2-virgl/src/gallium/drivers/svga/svga_cmd_vgpu10.c
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/**********************************************************1* Copyright 2008-2013 VMware, Inc. All rights reserved.2*3* Permission is hereby granted, free of charge, to any person4* obtaining a copy of this software and associated documentation5* files (the "Software"), to deal in the Software without6* restriction, including without limitation the rights to use, copy,7* modify, merge, publish, distribute, sublicense, and/or sell copies8* of the Software, and to permit persons to whom the Software is9* furnished to do so, subject to the following conditions:10*11* The above copyright notice and this permission notice shall be12* included in all copies or substantial portions of the Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,15* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF16* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND17* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS18* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN19* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN20* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE21* SOFTWARE.22*23**********************************************************/2425/**26* @file svga_cmd_vgpu10.c27*28* Command construction utility for the vgpu10 SVGA3D protocol.29*30* \author Mingcheng Chen31* \author Brian Paul32*/333435#include "svga_winsys.h"36#include "svga_resource_buffer.h"37#include "svga_resource_texture.h"38#include "svga_surface.h"39#include "svga_cmd.h"404142/**43* Emit a surface relocation for RenderTargetViewId44*/45static void46view_relocation(struct svga_winsys_context *swc, // IN47struct pipe_surface *surface, // IN48SVGA3dRenderTargetViewId *id, // OUT49unsigned flags)50{51if (surface) {52struct svga_surface *s = svga_surface(surface);53assert(s->handle);54swc->surface_relocation(swc, id, NULL, s->handle, flags);55}56else {57swc->surface_relocation(swc, id, NULL, NULL, flags);58}59}606162/**63* Emit a surface relocation for a ResourceId.64*/65static void66surface_to_resourceid(struct svga_winsys_context *swc, // IN67struct svga_winsys_surface *surface, // IN68SVGA3dSurfaceId *sid, // OUT69unsigned flags) // IN70{71if (surface) {72swc->surface_relocation(swc, sid, NULL, surface, flags);73}74else {75swc->surface_relocation(swc, sid, NULL, NULL, flags);76}77}787980#define SVGA3D_CREATE_COMMAND(CommandName, CommandCode) \81SVGA3dCmdDX##CommandName *cmd; \82{ \83cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \84sizeof(SVGA3dCmdDX##CommandName), 0); \85if (!cmd) \86return PIPE_ERROR_OUT_OF_MEMORY; \87}8889#define SVGA3D_CREATE_CMD_COUNT(CommandName, CommandCode, ElementClassName) \90SVGA3dCmdDX##CommandName *cmd; \91{ \92assert(count > 0); \93cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \94sizeof(SVGA3dCmdDX##CommandName) + \95count * sizeof(ElementClassName), 0); \96if (!cmd) \97return PIPE_ERROR_OUT_OF_MEMORY; \98}99100#define SVGA3D_COPY_BASIC(VariableName) \101{ \102cmd->VariableName = VariableName; \103}104105#define SVGA3D_COPY_BASIC_2(VariableName1, VariableName2) \106{ \107SVGA3D_COPY_BASIC(VariableName1); \108SVGA3D_COPY_BASIC(VariableName2); \109}110111#define SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3) \112{ \113SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \114SVGA3D_COPY_BASIC(VariableName3); \115}116117#define SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \118VariableName4) \119{ \120SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \121SVGA3D_COPY_BASIC_2(VariableName3, VariableName4); \122}123124#define SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \125VariableName4, VariableName5) \126{\127SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \128SVGA3D_COPY_BASIC_2(VariableName4, VariableName5); \129}130131#define SVGA3D_COPY_BASIC_6(VariableName1, VariableName2, VariableName3, \132VariableName4, VariableName5, VariableName6) \133{\134SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \135SVGA3D_COPY_BASIC_3(VariableName4, VariableName5, VariableName6); \136}137138#define SVGA3D_COPY_BASIC_7(VariableName1, VariableName2, VariableName3, \139VariableName4, VariableName5, VariableName6, \140VariableName7) \141{\142SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \143VariableName4); \144SVGA3D_COPY_BASIC_3(VariableName5, VariableName6, VariableName7); \145}146147#define SVGA3D_COPY_BASIC_8(VariableName1, VariableName2, VariableName3, \148VariableName4, VariableName5, VariableName6, \149VariableName7, VariableName8) \150{\151SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \152VariableName4); \153SVGA3D_COPY_BASIC_4(VariableName5, VariableName6, VariableName7, \154VariableName8); \155}156157#define SVGA3D_COPY_BASIC_9(VariableName1, VariableName2, VariableName3, \158VariableName4, VariableName5, VariableName6, \159VariableName7, VariableName8, VariableName9) \160{\161SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \162VariableName4, VariableName5); \163SVGA3D_COPY_BASIC_4(VariableName6, VariableName7, VariableName8, \164VariableName9); \165}166167168enum pipe_error169SVGA3D_vgpu10_PredCopyRegion(struct svga_winsys_context *swc,170struct svga_winsys_surface *dstSurf,171uint32 dstSubResource,172struct svga_winsys_surface *srcSurf,173uint32 srcSubResource,174const SVGA3dCopyBox *box)175{176SVGA3dCmdDXPredCopyRegion *cmd =177SVGA3D_FIFOReserve(swc,178SVGA_3D_CMD_DX_PRED_COPY_REGION,179sizeof(SVGA3dCmdDXPredCopyRegion),1802); /* two relocations */181if (!cmd)182return PIPE_ERROR_OUT_OF_MEMORY;183184swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);185swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);186cmd->dstSubResource = dstSubResource;187cmd->srcSubResource = srcSubResource;188cmd->box = *box;189190swc->commit(swc);191192return PIPE_OK;193}194195196enum pipe_error197SVGA3D_vgpu10_PredCopy(struct svga_winsys_context *swc,198struct svga_winsys_surface *dstSurf,199struct svga_winsys_surface *srcSurf)200{201SVGA3dCmdDXPredCopy *cmd =202SVGA3D_FIFOReserve(swc,203SVGA_3D_CMD_DX_PRED_COPY,204sizeof(SVGA3dCmdDXPredCopy),2052); /* two relocations */206if (!cmd)207return PIPE_ERROR_OUT_OF_MEMORY;208209swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);210swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);211212swc->commit(swc);213214return PIPE_OK;215}216217enum pipe_error218SVGA3D_vgpu10_SetViewports(struct svga_winsys_context *swc,219unsigned count,220const SVGA3dViewport *viewports)221{222SVGA3D_CREATE_CMD_COUNT(SetViewports, SET_VIEWPORTS, SVGA3dViewport);223224cmd->pad0 = 0;225memcpy(cmd + 1, viewports, count * sizeof(SVGA3dViewport));226227swc->commit(swc);228return PIPE_OK;229}230231232enum pipe_error233SVGA3D_vgpu10_SetShader(struct svga_winsys_context *swc,234SVGA3dShaderType type,235struct svga_winsys_gb_shader *gbshader,236SVGA3dShaderId shaderId)237{238SVGA3dCmdDXSetShader *cmd = SVGA3D_FIFOReserve(swc,239SVGA_3D_CMD_DX_SET_SHADER,240sizeof *cmd,2411); /* one relocation */242if (!cmd)243return PIPE_ERROR_OUT_OF_MEMORY;244245swc->shader_relocation(swc, &cmd->shaderId, NULL, NULL, gbshader, 0);246247cmd->type = type;248cmd->shaderId = shaderId;249swc->commit(swc);250251return PIPE_OK;252}253254255enum pipe_error256SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context *swc,257SVGA3dShaderType type,258uint32 startView,259unsigned count,260const SVGA3dShaderResourceViewId ids[],261struct svga_winsys_surface **views)262{263SVGA3dCmdDXSetShaderResources *cmd;264SVGA3dShaderResourceViewId *cmd_ids;265unsigned i;266267cmd = SVGA3D_FIFOReserve(swc,268SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,269sizeof(SVGA3dCmdDXSetShaderResources) +270count * sizeof(SVGA3dShaderResourceViewId),271count); /* 'count' relocations */272if (!cmd)273return PIPE_ERROR_OUT_OF_MEMORY;274275276cmd->type = type;277cmd->startView = startView;278279cmd_ids = (SVGA3dShaderResourceViewId *) (cmd + 1);280for (i = 0; i < count; i++) {281swc->surface_relocation(swc, cmd_ids + i, NULL, views[i],282SVGA_RELOC_READ);283cmd_ids[i] = ids[i];284}285286swc->commit(swc);287return PIPE_OK;288}289290291enum pipe_error292SVGA3D_vgpu10_SetSamplers(struct svga_winsys_context *swc,293unsigned count,294uint32 startSampler,295SVGA3dShaderType type,296const SVGA3dSamplerId *samplerIds)297{298SVGA3D_CREATE_CMD_COUNT(SetSamplers, SET_SAMPLERS, SVGA3dSamplerId);299300SVGA3D_COPY_BASIC_2(startSampler, type);301memcpy(cmd + 1, samplerIds, count * sizeof(SVGA3dSamplerId));302303swc->commit(swc);304return PIPE_OK;305}306307308enum pipe_error309SVGA3D_vgpu10_ClearRenderTargetView(struct svga_winsys_context *swc,310struct pipe_surface *color_surf,311const float *rgba)312{313SVGA3dCmdDXClearRenderTargetView *cmd;314struct svga_surface *ss = svga_surface(color_surf);315316cmd = SVGA3D_FIFOReserve(swc,317SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW,318sizeof(SVGA3dCmdDXClearRenderTargetView),3191); /* one relocation */320if (!cmd)321return PIPE_ERROR_OUT_OF_MEMORY;322323324/* NOTE: The following is pretty tricky. We need to emit a view/surface325* relocation and we have to provide a pointer to an ID which lies in326* the bounds of the command space which we just allocated. However,327* we then need to overwrite it with the original RenderTargetViewId.328*/329view_relocation(swc, color_surf, &cmd->renderTargetViewId,330SVGA_RELOC_WRITE);331cmd->renderTargetViewId = ss->view_id;332333COPY_4V(cmd->rgba.value, rgba);334335swc->commit(swc);336return PIPE_OK;337}338339340enum pipe_error341SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context *swc,342unsigned color_count,343struct pipe_surface **color_surfs,344struct pipe_surface *depth_stencil_surf)345{346const unsigned surf_count = color_count + 1;347SVGA3dCmdDXSetRenderTargets *cmd;348SVGA3dRenderTargetViewId *ctarget;349struct svga_surface *ss;350unsigned i;351352assert(surf_count > 0);353354cmd = SVGA3D_FIFOReserve(swc,355SVGA_3D_CMD_DX_SET_RENDERTARGETS,356sizeof(SVGA3dCmdDXSetRenderTargets) +357color_count * sizeof(SVGA3dRenderTargetViewId),358surf_count); /* 'surf_count' relocations */359if (!cmd)360return PIPE_ERROR_OUT_OF_MEMORY;361362/* NOTE: See earlier comment about the tricky handling of the ViewIds.363*/364365/* Depth / Stencil buffer */366if (depth_stencil_surf) {367ss = svga_surface(depth_stencil_surf);368view_relocation(swc, depth_stencil_surf, &cmd->depthStencilViewId,369SVGA_RELOC_WRITE);370cmd->depthStencilViewId = ss->view_id;371}372else {373/* no depth/stencil buffer - still need a relocation */374view_relocation(swc, NULL, &cmd->depthStencilViewId,375SVGA_RELOC_WRITE);376cmd->depthStencilViewId = SVGA3D_INVALID_ID;377}378379/* Color buffers */380ctarget = (SVGA3dRenderTargetViewId *) &cmd[1];381for (i = 0; i < color_count; i++) {382if (color_surfs[i]) {383ss = svga_surface(color_surfs[i]);384view_relocation(swc, color_surfs[i], ctarget + i, SVGA_RELOC_WRITE);385ctarget[i] = ss->view_id;386}387else {388view_relocation(swc, NULL, ctarget + i, SVGA_RELOC_WRITE);389ctarget[i] = SVGA3D_INVALID_ID;390}391}392393swc->commit(swc);394return PIPE_OK;395}396397398enum pipe_error399SVGA3D_vgpu10_SetBlendState(struct svga_winsys_context *swc,400SVGA3dBlendStateId blendId,401const float *blendFactor,402uint32 sampleMask)403{404SVGA3D_CREATE_COMMAND(SetBlendState, SET_BLEND_STATE);405406SVGA3D_COPY_BASIC_2(blendId, sampleMask);407memcpy(cmd->blendFactor, blendFactor, sizeof(float) * 4);408409swc->commit(swc);410return PIPE_OK;411}412413enum pipe_error414SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context *swc,415SVGA3dDepthStencilStateId depthStencilId,416uint32 stencilRef)417{418SVGA3D_CREATE_COMMAND(SetDepthStencilState, SET_DEPTHSTENCIL_STATE);419420SVGA3D_COPY_BASIC_2(depthStencilId, stencilRef);421422swc->commit(swc);423return PIPE_OK;424}425426enum pipe_error427SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context *swc,428SVGA3dRasterizerStateId rasterizerId)429{430SVGA3D_CREATE_COMMAND(SetRasterizerState, SET_RASTERIZER_STATE);431432cmd->rasterizerId = rasterizerId;433434swc->commit(swc);435return PIPE_OK;436}437438enum pipe_error439SVGA3D_vgpu10_SetPredication(struct svga_winsys_context *swc,440SVGA3dQueryId queryId,441uint32 predicateValue)442{443SVGA3dCmdDXSetPredication *cmd;444445cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_PREDICATION,446sizeof *cmd, 0);447448if (!cmd)449return PIPE_ERROR_OUT_OF_MEMORY;450451cmd->queryId = queryId;452cmd->predicateValue = predicateValue;453swc->commit(swc);454return PIPE_OK;455}456457enum pipe_error458SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context *swc,459unsigned count,460const SVGA3dSoTarget *targets,461struct svga_winsys_surface **surfaces)462{463SVGA3dCmdDXSetSOTargets *cmd;464SVGA3dSoTarget *sot;465unsigned i;466467cmd = SVGA3D_FIFOReserve(swc,468SVGA_3D_CMD_DX_SET_SOTARGETS,469sizeof(SVGA3dCmdDXSetSOTargets) +470count * sizeof(SVGA3dSoTarget),471count);472473if (!cmd)474return PIPE_ERROR_OUT_OF_MEMORY;475476cmd->pad0 = 0;477sot = (SVGA3dSoTarget *)(cmd + 1);478for (i = 0; i < count; i++, sot++) {479if (surfaces[i]) {480sot->offset = targets[i].offset;481sot->sizeInBytes = targets[i].sizeInBytes;482swc->surface_relocation(swc, &sot->sid, NULL, surfaces[i],483SVGA_RELOC_WRITE);484}485else {486sot->offset = 0;487sot->sizeInBytes = ~0u;488swc->surface_relocation(swc, &sot->sid, NULL, NULL,489SVGA_RELOC_WRITE);490}491}492swc->commit(swc);493return PIPE_OK;494}495496enum pipe_error497SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context *swc,498unsigned count,499const SVGASignedRect *rects)500{501SVGA3dCmdDXSetScissorRects *cmd;502503assert(count > 0);504cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SCISSORRECTS,505sizeof(SVGA3dCmdDXSetScissorRects) +506count * sizeof(SVGASignedRect),5070);508if (!cmd)509return PIPE_ERROR_OUT_OF_MEMORY;510511cmd->pad0 = 0;512memcpy(cmd + 1, rects, count * sizeof(SVGASignedRect));513514swc->commit(swc);515return PIPE_OK;516}517518enum pipe_error519SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context *swc,520SVGA3dStreamOutputId soid)521{522SVGA3D_CREATE_COMMAND(SetStreamOutput, SET_STREAMOUTPUT);523524cmd->soid = soid;525526swc->commit(swc);527return PIPE_OK;528}529530enum pipe_error531SVGA3D_vgpu10_Draw(struct svga_winsys_context *swc,532uint32 vertexCount,533uint32 startVertexLocation)534{535SVGA3D_CREATE_COMMAND(Draw, DRAW);536537SVGA3D_COPY_BASIC_2(vertexCount, startVertexLocation);538539swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;540swc->commit(swc);541swc->num_draw_commands++;542return PIPE_OK;543}544545enum pipe_error546SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context *swc,547uint32 indexCount,548uint32 startIndexLocation,549int32 baseVertexLocation)550{551SVGA3D_CREATE_COMMAND(DrawIndexed, DRAW_INDEXED);552553SVGA3D_COPY_BASIC_3(indexCount, startIndexLocation,554baseVertexLocation);555556swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;557swc->commit(swc);558swc->num_draw_commands++;559return PIPE_OK;560}561562enum pipe_error563SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context *swc,564uint32 vertexCountPerInstance,565uint32 instanceCount,566uint32 startVertexLocation,567uint32 startInstanceLocation)568{569SVGA3D_CREATE_COMMAND(DrawInstanced, DRAW_INSTANCED);570571SVGA3D_COPY_BASIC_4(vertexCountPerInstance, instanceCount,572startVertexLocation, startInstanceLocation);573574swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;575swc->commit(swc);576swc->num_draw_commands++;577return PIPE_OK;578}579580enum pipe_error581SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context *swc,582uint32 indexCountPerInstance,583uint32 instanceCount,584uint32 startIndexLocation,585int32 baseVertexLocation,586uint32 startInstanceLocation)587{588SVGA3D_CREATE_COMMAND(DrawIndexedInstanced, DRAW_INDEXED_INSTANCED);589590SVGA3D_COPY_BASIC_5(indexCountPerInstance, instanceCount,591startIndexLocation, baseVertexLocation,592startInstanceLocation);593594595swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;596swc->commit(swc);597swc->num_draw_commands++;598return PIPE_OK;599}600601enum pipe_error602SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context *swc)603{604SVGA3D_CREATE_COMMAND(DrawAuto, DRAW_AUTO);605606cmd->pad0 = 0;607swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;608swc->commit(swc);609swc->num_draw_commands++;610return PIPE_OK;611}612613enum pipe_error614SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context *swc,615SVGA3dQueryId queryId,616SVGA3dQueryType type,617SVGA3dDXQueryFlags flags)618{619SVGA3D_CREATE_COMMAND(DefineQuery, DEFINE_QUERY);620621SVGA3D_COPY_BASIC_3(queryId, type, flags);622623swc->commit(swc);624return PIPE_OK;625}626627enum pipe_error628SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context *swc,629SVGA3dQueryId queryId)630{631SVGA3D_CREATE_COMMAND(DestroyQuery, DESTROY_QUERY);632633cmd->queryId = queryId;634635swc->commit(swc);636return PIPE_OK;637}638639enum pipe_error640SVGA3D_vgpu10_BindQuery(struct svga_winsys_context *swc,641struct svga_winsys_gb_query *gbQuery,642SVGA3dQueryId queryId)643{644SVGA3dCmdDXBindQuery *cmd = SVGA3D_FIFOReserve(swc,645SVGA_3D_CMD_DX_BIND_QUERY,646sizeof *cmd,6471);648if (!cmd)649return PIPE_ERROR_OUT_OF_MEMORY;650651cmd->queryId = queryId;652swc->query_relocation(swc, &cmd->mobid, gbQuery);653654swc->commit(swc);655return PIPE_OK;656}657658enum pipe_error659SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context *swc,660SVGA3dQueryId queryId,661uint32 mobOffset)662{663SVGA3D_CREATE_COMMAND(SetQueryOffset, SET_QUERY_OFFSET);664SVGA3D_COPY_BASIC_2(queryId, mobOffset);665swc->commit(swc);666return PIPE_OK;667}668669enum pipe_error670SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context *swc,671SVGA3dQueryId queryId)672{673SVGA3D_CREATE_COMMAND(BeginQuery, BEGIN_QUERY);674cmd->queryId = queryId;675swc->commit(swc);676return PIPE_OK;677}678679enum pipe_error680SVGA3D_vgpu10_EndQuery(struct svga_winsys_context *swc,681SVGA3dQueryId queryId)682{683SVGA3D_CREATE_COMMAND(EndQuery, END_QUERY);684cmd->queryId = queryId;685swc->commit(swc);686return PIPE_OK;687}688689690enum pipe_error691SVGA3D_vgpu10_ClearDepthStencilView(struct svga_winsys_context *swc,692struct pipe_surface *ds_surf,693uint16 flags,694uint16 stencil,695float depth)696{697SVGA3dCmdDXClearDepthStencilView *cmd;698struct svga_surface *ss = svga_surface(ds_surf);699700cmd = SVGA3D_FIFOReserve(swc,701SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW,702sizeof(SVGA3dCmdDXClearDepthStencilView),7031); /* one relocation */704if (!cmd)705return PIPE_ERROR_OUT_OF_MEMORY;706707/* NOTE: The following is pretty tricky. We need to emit a view/surface708* relocation and we have to provide a pointer to an ID which lies in709* the bounds of the command space which we just allocated. However,710* we then need to overwrite it with the original DepthStencilViewId.711*/712view_relocation(swc, ds_surf, &cmd->depthStencilViewId,713SVGA_RELOC_WRITE);714cmd->depthStencilViewId = ss->view_id;715cmd->flags = flags;716cmd->stencil = stencil;717cmd->depth = depth;718719swc->commit(swc);720return PIPE_OK;721}722723enum pipe_error724SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context *swc,725SVGA3dShaderResourceViewId shaderResourceViewId,726struct svga_winsys_surface *surface,727SVGA3dSurfaceFormat format,728SVGA3dResourceType resourceDimension,729const SVGA3dShaderResourceViewDesc *desc)730{731SVGA3dCmdDXDefineShaderResourceView *cmd;732733cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW,734sizeof(SVGA3dCmdDXDefineShaderResourceView),7351); /* one relocation */736if (!cmd)737return PIPE_ERROR_OUT_OF_MEMORY;738739SVGA3D_COPY_BASIC_3(shaderResourceViewId, format, resourceDimension);740741swc->surface_relocation(swc, &cmd->sid, NULL, surface,742SVGA_RELOC_READ);743744cmd->desc = *desc;745746swc->commit(swc);747return PIPE_OK;748}749750enum pipe_error751SVGA3D_vgpu10_DestroyShaderResourceView(struct svga_winsys_context *swc,752SVGA3dShaderResourceViewId shaderResourceViewId)753{754SVGA3D_CREATE_COMMAND(DestroyShaderResourceView,755DESTROY_SHADERRESOURCE_VIEW);756757cmd->shaderResourceViewId = shaderResourceViewId;758759swc->commit(swc);760return PIPE_OK;761}762763764enum pipe_error765SVGA3D_vgpu10_DefineRenderTargetView(struct svga_winsys_context *swc,766SVGA3dRenderTargetViewId renderTargetViewId,767struct svga_winsys_surface *surface,768SVGA3dSurfaceFormat format,769SVGA3dResourceType resourceDimension,770const SVGA3dRenderTargetViewDesc *desc)771{772SVGA3dCmdDXDefineRenderTargetView *cmd;773774cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,775sizeof(SVGA3dCmdDXDefineRenderTargetView),7761); /* one relocation */777if (!cmd)778return PIPE_ERROR_OUT_OF_MEMORY;779780SVGA3D_COPY_BASIC_3(renderTargetViewId, format, resourceDimension);781cmd->desc = *desc;782783surface_to_resourceid(swc, surface,784&cmd->sid,785SVGA_RELOC_READ | SVGA_RELOC_WRITE);786787swc->commit(swc);788return PIPE_OK;789}790791enum pipe_error792SVGA3D_vgpu10_DestroyRenderTargetView(struct svga_winsys_context *swc,793SVGA3dRenderTargetViewId renderTargetViewId)794{795SVGA3D_CREATE_COMMAND(DestroyRenderTargetView, DESTROY_RENDERTARGET_VIEW);796797cmd->renderTargetViewId = renderTargetViewId;798799swc->commit(swc);800return PIPE_OK;801}802803804enum pipe_error805SVGA3D_vgpu10_DefineDepthStencilView(struct svga_winsys_context *swc,806SVGA3dDepthStencilViewId depthStencilViewId,807struct svga_winsys_surface *surface,808SVGA3dSurfaceFormat format,809SVGA3dResourceType resourceDimension,810const SVGA3dRenderTargetViewDesc *desc)811{812SVGA3dCmdDXDefineDepthStencilView *cmd;813814cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW,815sizeof(SVGA3dCmdDXDefineDepthStencilView),8161); /* one relocation */817if (!cmd)818return PIPE_ERROR_OUT_OF_MEMORY;819820SVGA3D_COPY_BASIC_3(depthStencilViewId, format, resourceDimension);821cmd->mipSlice = desc->tex.mipSlice;822cmd->firstArraySlice = desc->tex.firstArraySlice;823cmd->arraySize = desc->tex.arraySize;824cmd->flags = 0;825cmd->pad0 = 0;826cmd->pad1 = 0;827828surface_to_resourceid(swc, surface,829&cmd->sid,830SVGA_RELOC_READ | SVGA_RELOC_WRITE);831832swc->commit(swc);833return PIPE_OK;834}835836enum pipe_error837SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context *swc,838SVGA3dDepthStencilViewId depthStencilViewId)839{840SVGA3D_CREATE_COMMAND(DestroyDepthStencilView, DESTROY_DEPTHSTENCIL_VIEW);841842cmd->depthStencilViewId = depthStencilViewId;843844swc->commit(swc);845return PIPE_OK;846}847848enum pipe_error849SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context *swc,850unsigned count,851SVGA3dElementLayoutId elementLayoutId,852const SVGA3dInputElementDesc *elements)853{854SVGA3dCmdDXDefineElementLayout *cmd;855unsigned i;856857cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT,858sizeof(SVGA3dCmdDXDefineElementLayout) +859count * sizeof(SVGA3dInputElementDesc), 0);860if (!cmd)861return PIPE_ERROR_OUT_OF_MEMORY;862863/* check that all offsets are multiples of four */864for (i = 0; i < count; i++) {865assert(elements[i].alignedByteOffset % 4 == 0);866}867(void) i; /* silence unused var in release build */868869cmd->elementLayoutId = elementLayoutId;870memcpy(cmd + 1, elements, count * sizeof(SVGA3dInputElementDesc));871872swc->commit(swc);873return PIPE_OK;874}875876enum pipe_error877SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context *swc,878SVGA3dElementLayoutId elementLayoutId)879{880SVGA3D_CREATE_COMMAND(DestroyElementLayout, DESTROY_ELEMENTLAYOUT);881882cmd->elementLayoutId = elementLayoutId;883884swc->commit(swc);885return PIPE_OK;886}887888enum pipe_error889SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context *swc,890SVGA3dBlendStateId blendId,891uint8 alphaToCoverageEnable,892uint8 independentBlendEnable,893const SVGA3dDXBlendStatePerRT *perRT)894{895SVGA3D_CREATE_COMMAND(DefineBlendState, DEFINE_BLEND_STATE);896897cmd->blendId = blendId;898cmd->alphaToCoverageEnable = alphaToCoverageEnable;899cmd->independentBlendEnable = independentBlendEnable;900memcpy(cmd->perRT, perRT, sizeof(cmd->perRT));901cmd->pad0 = 0;902903swc->commit(swc);904return PIPE_OK;905}906907enum pipe_error908SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context *swc,909SVGA3dBlendStateId blendId)910{911SVGA3D_CREATE_COMMAND(DestroyBlendState, DESTROY_BLEND_STATE);912913cmd->blendId = blendId;914915swc->commit(swc);916return PIPE_OK;917}918919enum pipe_error920SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context *swc,921SVGA3dDepthStencilStateId depthStencilId,922uint8 depthEnable,923SVGA3dDepthWriteMask depthWriteMask,924SVGA3dComparisonFunc depthFunc,925uint8 stencilEnable,926uint8 frontEnable,927uint8 backEnable,928uint8 stencilReadMask,929uint8 stencilWriteMask,930uint8 frontStencilFailOp,931uint8 frontStencilDepthFailOp,932uint8 frontStencilPassOp,933SVGA3dComparisonFunc frontStencilFunc,934uint8 backStencilFailOp,935uint8 backStencilDepthFailOp,936uint8 backStencilPassOp,937SVGA3dComparisonFunc backStencilFunc)938{939SVGA3D_CREATE_COMMAND(DefineDepthStencilState, DEFINE_DEPTHSTENCIL_STATE);940941SVGA3D_COPY_BASIC_9(depthStencilId, depthEnable,942depthWriteMask, depthFunc,943stencilEnable, frontEnable,944backEnable, stencilReadMask,945stencilWriteMask);946SVGA3D_COPY_BASIC_8(frontStencilFailOp, frontStencilDepthFailOp,947frontStencilPassOp, frontStencilFunc,948backStencilFailOp, backStencilDepthFailOp,949backStencilPassOp, backStencilFunc);950951swc->commit(swc);952return PIPE_OK;953}954955enum pipe_error956SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context *swc,957SVGA3dDepthStencilStateId depthStencilId)958{959SVGA3D_CREATE_COMMAND(DestroyDepthStencilState,960DESTROY_DEPTHSTENCIL_STATE);961962cmd->depthStencilId = depthStencilId;963964swc->commit(swc);965return PIPE_OK;966}967968enum pipe_error969SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context *swc,970SVGA3dRasterizerStateId rasterizerId,971uint8 fillMode,972SVGA3dCullMode cullMode,973uint8 frontCounterClockwise,974int32 depthBias,975float depthBiasClamp,976float slopeScaledDepthBias,977uint8 depthClipEnable,978uint8 scissorEnable,979uint8 multisampleEnable,980uint8 antialiasedLineEnable,981float lineWidth,982uint8 lineStippleEnable,983uint8 lineStippleFactor,984uint16 lineStipplePattern,985uint8 provokingVertexLast)986{987SVGA3D_CREATE_COMMAND(DefineRasterizerState, DEFINE_RASTERIZER_STATE);988989SVGA3D_COPY_BASIC_5(rasterizerId, fillMode,990cullMode, frontCounterClockwise,991depthBias);992SVGA3D_COPY_BASIC_6(depthBiasClamp, slopeScaledDepthBias,993depthClipEnable, scissorEnable,994multisampleEnable, antialiasedLineEnable);995cmd->lineWidth = lineWidth;996cmd->lineStippleEnable = lineStippleEnable;997cmd->lineStippleFactor = lineStippleFactor;998cmd->lineStipplePattern = lineStipplePattern;999cmd->provokingVertexLast = provokingVertexLast;10001001swc->commit(swc);1002return PIPE_OK;1003}10041005enum pipe_error1006SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context *swc,1007SVGA3dRasterizerStateId rasterizerId)1008{1009SVGA3D_CREATE_COMMAND(DestroyRasterizerState, DESTROY_RASTERIZER_STATE);10101011cmd->rasterizerId = rasterizerId;10121013swc->commit(swc);1014return PIPE_OK;1015}10161017enum pipe_error1018SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context *swc,1019SVGA3dSamplerId samplerId,1020SVGA3dFilter filter,1021uint8 addressU,1022uint8 addressV,1023uint8 addressW,1024float mipLODBias,1025uint8 maxAnisotropy,1026uint8 comparisonFunc,1027SVGA3dRGBAFloat borderColor,1028float minLOD,1029float maxLOD)1030{1031SVGA3D_CREATE_COMMAND(DefineSamplerState, DEFINE_SAMPLER_STATE);10321033SVGA3D_COPY_BASIC_6(samplerId, filter,1034addressU, addressV,1035addressW, mipLODBias);1036SVGA3D_COPY_BASIC_5(maxAnisotropy, comparisonFunc,1037borderColor, minLOD,1038maxLOD);1039cmd->pad0 = 0;1040cmd->pad1 = 0;10411042swc->commit(swc);1043return PIPE_OK;1044}10451046enum pipe_error1047SVGA3D_vgpu10_DestroySamplerState(struct svga_winsys_context *swc,1048SVGA3dSamplerId samplerId)1049{1050SVGA3D_CREATE_COMMAND(DestroySamplerState, DESTROY_SAMPLER_STATE);10511052cmd->samplerId = samplerId;10531054swc->commit(swc);1055return PIPE_OK;1056}105710581059enum pipe_error1060SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context *swc,1061struct svga_winsys_gb_shader *gbshader,1062SVGA3dShaderId shaderId,1063SVGA3dShaderType type,1064uint32 sizeInBytes)1065{1066SVGA3dCmdHeader *header;1067SVGA3dCmdDXDefineShader *dcmd;1068SVGA3dCmdDXBindShader *bcmd;1069unsigned totalSize = 2 * sizeof(*header) +1070sizeof(*dcmd) + sizeof(*bcmd);10711072/* Make sure there is room for both commands */1073header = swc->reserve(swc, totalSize, 2);1074if (!header)1075return PIPE_ERROR_OUT_OF_MEMORY;10761077/* DXDefineShader command */1078header->id = SVGA_3D_CMD_DX_DEFINE_SHADER;1079header->size = sizeof(*dcmd);1080dcmd = (SVGA3dCmdDXDefineShader *)(header + 1);1081dcmd->shaderId = shaderId;1082dcmd->type = type;1083dcmd->sizeInBytes = sizeInBytes;10841085/* DXBindShader command */1086header = (SVGA3dCmdHeader *)(dcmd + 1);10871088header->id = SVGA_3D_CMD_DX_BIND_SHADER;1089header->size = sizeof(*bcmd);1090bcmd = (SVGA3dCmdDXBindShader *)(header + 1);10911092bcmd->cid = swc->cid;1093swc->shader_relocation(swc, NULL, &bcmd->mobid,1094&bcmd->offsetInBytes, gbshader, 0);10951096bcmd->shid = shaderId;10971098swc->commit(swc);1099return PIPE_OK;1100}11011102enum pipe_error1103SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context *swc,1104SVGA3dShaderId shaderId)1105{1106SVGA3D_CREATE_COMMAND(DestroyShader, DESTROY_SHADER);11071108cmd->shaderId = shaderId;11091110swc->commit(swc);1111return PIPE_OK;1112}11131114enum pipe_error1115SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context *swc,1116SVGA3dStreamOutputId soid,1117uint32 numOutputStreamEntries,1118uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],1119const SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_STREAMOUT_DECLS])1120{1121unsigned i;1122SVGA3D_CREATE_COMMAND(DefineStreamOutput, DEFINE_STREAMOUTPUT);11231124cmd->soid = soid;1125cmd->numOutputStreamEntries = numOutputStreamEntries;11261127for (i = 0; i < ARRAY_SIZE(cmd->streamOutputStrideInBytes); i++)1128cmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];11291130memcpy(cmd->decl, decl,1131sizeof(SVGA3dStreamOutputDeclarationEntry)1132* SVGA3D_MAX_DX10_STREAMOUT_DECLS);11331134cmd->rasterizedStream = 0;1135swc->commit(swc);1136return PIPE_OK;1137}11381139enum pipe_error1140SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context *swc,1141SVGA3dStreamOutputId soid)1142{1143SVGA3D_CREATE_COMMAND(DestroyStreamOutput, DESTROY_STREAMOUTPUT);11441145cmd->soid = soid;11461147swc->commit(swc);1148return PIPE_OK;1149}11501151enum pipe_error1152SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context *swc,1153SVGA3dElementLayoutId elementLayoutId)1154{1155SVGA3D_CREATE_COMMAND(SetInputLayout, SET_INPUT_LAYOUT);11561157cmd->elementLayoutId = elementLayoutId;11581159swc->commit(swc);1160return PIPE_OK;1161}11621163enum pipe_error1164SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context *swc,1165unsigned count,1166uint32 startBuffer,1167const SVGA3dVertexBuffer *bufferInfo,1168struct svga_winsys_surface **surfaces)1169{1170SVGA3dCmdDXSetVertexBuffers *cmd;1171SVGA3dVertexBuffer *bufs;1172unsigned i;11731174assert(count > 0);11751176cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS,1177sizeof(SVGA3dCmdDXSetVertexBuffers) +1178count * sizeof(SVGA3dVertexBuffer),1179count); /* 'count' relocations */1180if (!cmd)1181return PIPE_ERROR_OUT_OF_MEMORY;11821183cmd->startBuffer = startBuffer;11841185bufs = (SVGA3dVertexBuffer *) &cmd[1];1186for (i = 0; i < count; i++) {1187bufs[i].stride = bufferInfo[i].stride;1188bufs[i].offset = bufferInfo[i].offset;1189assert(bufs[i].stride % 4 == 0);1190assert(bufs[i].offset % 4 == 0);1191swc->surface_relocation(swc, &bufs[i].sid, NULL, surfaces[i],1192SVGA_RELOC_READ);1193}11941195swc->commit(swc);1196return PIPE_OK;1197}11981199enum pipe_error1200SVGA3D_vgpu10_SetTopology(struct svga_winsys_context *swc,1201SVGA3dPrimitiveType topology)1202{1203SVGA3D_CREATE_COMMAND(SetTopology, SET_TOPOLOGY);12041205cmd->topology = topology;12061207swc->commit(swc);1208return PIPE_OK;1209}12101211enum pipe_error1212SVGA3D_vgpu10_SetIndexBuffer(struct svga_winsys_context *swc,1213struct svga_winsys_surface *indexes,1214SVGA3dSurfaceFormat format,1215uint32 offset)1216{1217SVGA3dCmdDXSetIndexBuffer *cmd;12181219cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_INDEX_BUFFER,1220sizeof(SVGA3dCmdDXSetIndexBuffer),12211); /* one relocations */1222if (!cmd)1223return PIPE_ERROR_OUT_OF_MEMORY;12241225swc->surface_relocation(swc, &cmd->sid, NULL, indexes, SVGA_RELOC_READ);1226SVGA3D_COPY_BASIC_2(format, offset);12271228swc->commit(swc);1229return PIPE_OK;1230}12311232enum pipe_error1233SVGA3D_vgpu10_SetSingleConstantBuffer(struct svga_winsys_context *swc,1234unsigned slot,1235SVGA3dShaderType type,1236struct svga_winsys_surface *surface,1237uint32 offsetInBytes,1238uint32 sizeInBytes)1239{1240SVGA3dCmdDXSetSingleConstantBuffer *cmd;12411242assert(offsetInBytes % 256 == 0);1243if (!surface)1244assert(sizeInBytes == 0);1245else1246assert(sizeInBytes > 0);12471248cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER,1249sizeof(SVGA3dCmdDXSetSingleConstantBuffer),12501); /* one relocation */1251if (!cmd)1252return PIPE_ERROR_OUT_OF_MEMORY;12531254cmd->slot = slot;1255cmd->type = type;1256swc->surface_relocation(swc, &cmd->sid, NULL, surface, SVGA_RELOC_READ);1257cmd->offsetInBytes = offsetInBytes;1258cmd->sizeInBytes = sizeInBytes;12591260swc->commit(swc);12611262return PIPE_OK;1263}126412651266enum pipe_error1267SVGA3D_vgpu10_SetConstantBufferOffset(struct svga_winsys_context *swc,1268unsigned command,1269unsigned slot,1270uint32 offsetInBytes)1271{1272SVGA3dCmdDXSetConstantBufferOffset *cmd;12731274assert(offsetInBytes % 256 == 0);12751276cmd = SVGA3D_FIFOReserve(swc, command,1277sizeof(SVGA3dCmdDXSetConstantBufferOffset),12780); /* one relocation */1279if (!cmd)1280return PIPE_ERROR_OUT_OF_MEMORY;12811282cmd->slot = slot;1283cmd->offsetInBytes = offsetInBytes;12841285swc->commit(swc);12861287return PIPE_OK;1288}128912901291enum pipe_error1292SVGA3D_vgpu10_ReadbackSubResource(struct svga_winsys_context *swc,1293struct svga_winsys_surface *surface,1294unsigned subResource)1295{1296SVGA3dCmdDXReadbackSubResource *cmd;12971298cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_READBACK_SUBRESOURCE,1299sizeof(SVGA3dCmdDXReadbackSubResource),13001);1301if (!cmd)1302return PIPE_ERROR_OUT_OF_MEMORY;13031304swc->surface_relocation(swc, &cmd->sid, NULL, surface,1305SVGA_RELOC_READ | SVGA_RELOC_INTERNAL);1306cmd->subResource = subResource;13071308swc->commit(swc);1309return PIPE_OK;1310}13111312enum pipe_error1313SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context *swc,1314struct svga_winsys_surface *surface,1315const SVGA3dBox *box,1316unsigned subResource)1317{1318SVGA3dCmdDXUpdateSubResource *cmd;13191320cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE,1321sizeof(SVGA3dCmdDXUpdateSubResource),13221);1323if (!cmd)1324return PIPE_ERROR_OUT_OF_MEMORY;13251326swc->surface_relocation(swc, &cmd->sid, NULL, surface,1327SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);1328cmd->subResource = subResource;1329cmd->box = *box;13301331swc->commit(swc);1332return PIPE_OK;1333}13341335enum pipe_error1336SVGA3D_vgpu10_GenMips(struct svga_winsys_context *swc,1337SVGA3dShaderResourceViewId shaderResourceViewId,1338struct svga_winsys_surface *view)1339{1340SVGA3dCmdDXGenMips *cmd;13411342cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_GENMIPS,1343sizeof(SVGA3dCmdDXGenMips), 1);13441345if (!cmd)1346return PIPE_ERROR_OUT_OF_MEMORY;13471348swc->surface_relocation(swc, &cmd->shaderResourceViewId, NULL, view,1349SVGA_RELOC_WRITE);1350cmd->shaderResourceViewId = shaderResourceViewId;13511352swc->commit(swc);1353return PIPE_OK;1354}135513561357enum pipe_error1358SVGA3D_vgpu10_BufferCopy(struct svga_winsys_context *swc,1359struct svga_winsys_surface *src,1360struct svga_winsys_surface *dst,1361unsigned srcx, unsigned dstx, unsigned width)1362{1363SVGA3dCmdDXBufferCopy *cmd;13641365cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_BUFFER_COPY, sizeof *cmd, 2);13661367if (!cmd)1368return PIPE_ERROR_OUT_OF_MEMORY;13691370swc->surface_relocation(swc, &cmd->dest, NULL, dst, SVGA_RELOC_WRITE);1371swc->surface_relocation(swc, &cmd->src, NULL, src, SVGA_RELOC_READ);1372cmd->destX = dstx;1373cmd->srcX = srcx;1374cmd->width = width;13751376swc->commit(swc);1377return PIPE_OK;1378}13791380enum pipe_error1381SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context *swc,1382struct svga_winsys_surface *src,1383unsigned srcOffset, unsigned srcPitch,1384unsigned srcSlicePitch,1385struct svga_winsys_surface *dst,1386unsigned dstSubResource,1387SVGA3dBox *dstBox)1388{1389SVGA3dCmdDXTransferFromBuffer *cmd;13901391cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,1392sizeof(SVGA3dCmdDXTransferFromBuffer), 2);13931394if (!cmd)1395return PIPE_ERROR_OUT_OF_MEMORY;13961397swc->surface_relocation(swc, &cmd->srcSid, NULL, src, SVGA_RELOC_READ);1398swc->surface_relocation(swc, &cmd->destSid, NULL, dst, SVGA_RELOC_WRITE);1399cmd->srcOffset = srcOffset;1400cmd->srcPitch = srcPitch;1401cmd->srcSlicePitch = srcSlicePitch;1402cmd->destSubResource = dstSubResource;1403cmd->destBox = *dstBox;14041405swc->commit(swc);1406return PIPE_OK;1407}14081409enum pipe_error1410SVGA3D_vgpu10_IntraSurfaceCopy(struct svga_winsys_context *swc,1411struct svga_winsys_surface *surface,1412unsigned level, unsigned face,1413const SVGA3dCopyBox *box)1414{1415SVGA3dCmdIntraSurfaceCopy *cmd =1416SVGA3D_FIFOReserve(swc,1417SVGA_3D_CMD_INTRA_SURFACE_COPY,1418sizeof(SVGA3dCmdIntraSurfaceCopy),14191); /* one relocation */1420if (!cmd)1421return PIPE_ERROR_OUT_OF_MEMORY;14221423swc->surface_relocation(swc, &cmd->surface.sid, NULL, surface, SVGA_RELOC_READ | SVGA_RELOC_WRITE);1424cmd->surface.face = face;1425cmd->surface.mipmap = level;1426cmd->box = *box;14271428swc->commit(swc);14291430return PIPE_OK;1431}14321433enum pipe_error1434SVGA3D_vgpu10_ResolveCopy(struct svga_winsys_context *swc,1435unsigned dstSubResource,1436struct svga_winsys_surface *dst,1437unsigned srcSubResource,1438struct svga_winsys_surface *src,1439const SVGA3dSurfaceFormat copyFormat)1440{1441SVGA3dCmdDXResolveCopy *cmd =1442SVGA3D_FIFOReserve(swc,1443SVGA_3D_CMD_DX_RESOLVE_COPY,1444sizeof(SVGA3dCmdDXResolveCopy),14452); /* two relocations */1446if (!cmd)1447return PIPE_ERROR_OUT_OF_MEMORY;14481449cmd->dstSubResource = dstSubResource;1450swc->surface_relocation(swc, &cmd->dstSid, NULL, dst, SVGA_RELOC_WRITE);1451cmd->srcSubResource = srcSubResource;1452swc->surface_relocation(swc, &cmd->srcSid, NULL, src, SVGA_RELOC_READ);1453cmd->copyFormat = copyFormat;14541455swc->commit(swc);14561457return PIPE_OK;1458}145914601461enum pipe_error1462SVGA3D_sm5_DrawIndexedInstancedIndirect(struct svga_winsys_context *swc,1463struct svga_winsys_surface *argBuffer,1464unsigned argOffset)1465{1466SVGA3dCmdDXDrawIndexedInstancedIndirect *cmd =1467SVGA3D_FIFOReserve(swc,1468SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT,1469sizeof(SVGA3dCmdDXDrawIndexedInstancedIndirect),14701); /* one relocation */1471if (!cmd)1472return PIPE_ERROR_OUT_OF_MEMORY;14731474swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,1475SVGA_RELOC_READ);1476cmd->byteOffsetForArgs = argOffset;14771478swc->commit(swc);14791480return PIPE_OK;1481}148214831484enum pipe_error1485SVGA3D_sm5_DrawInstancedIndirect(struct svga_winsys_context *swc,1486struct svga_winsys_surface *argBuffer,1487unsigned argOffset)1488{1489SVGA3dCmdDXDrawInstancedIndirect *cmd =1490SVGA3D_FIFOReserve(swc,1491SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT,1492sizeof(SVGA3dCmdDXDrawInstancedIndirect),14931); /* one relocation */1494if (!cmd)1495return PIPE_ERROR_OUT_OF_MEMORY;14961497swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,1498SVGA_RELOC_READ);1499cmd->byteOffsetForArgs = argOffset;15001501swc->commit(swc);15021503return PIPE_OK;1504}150515061507enum pipe_error1508SVGA3D_sm5_Dispatch(struct svga_winsys_context *swc,1509const uint32 threadGroupCount[3])1510{1511SVGA3dCmdDXDispatch *cmd;15121513cmd = SVGA3D_FIFOReserve(swc,1514SVGA_3D_CMD_DX_DISPATCH,1515sizeof(SVGA3dCmdDXDispatch),15160);1517if (!cmd)1518return PIPE_ERROR_OUT_OF_MEMORY;15191520cmd->threadGroupCountX = threadGroupCount[0];1521cmd->threadGroupCountY = threadGroupCount[1];1522cmd->threadGroupCountZ = threadGroupCount[2];15231524swc->commit(swc);1525return PIPE_OK;1526}152715281529enum pipe_error1530SVGA3D_sm5_DispatchIndirect(struct svga_winsys_context *swc,1531struct svga_winsys_surface *argBuffer,1532uint32 argOffset)1533{1534SVGA3dCmdDXDispatchIndirect *cmd;15351536cmd = SVGA3D_FIFOReserve(swc,1537SVGA_3D_CMD_DX_DISPATCH_INDIRECT,1538sizeof(SVGA3dCmdDXDispatchIndirect),15391);1540if (!cmd)1541return PIPE_ERROR_OUT_OF_MEMORY;15421543swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,1544SVGA_RELOC_READ);1545cmd->byteOffsetForArgs = argOffset;15461547swc->commit(swc);1548return PIPE_OK;1549}155015511552/**1553* We don't want any flush between DefineStreamOutputWithMob and1554* BindStreamOutput because it will cause partial state in command1555* buffer. This function make that sure there is enough room for1556* both commands before issuing them1557*/15581559enum pipe_error1560SVGA3D_sm5_DefineAndBindStreamOutput(struct svga_winsys_context *swc,1561SVGA3dStreamOutputId soid,1562uint32 numOutputStreamEntries,1563uint32 numOutputStreamStrides,1564uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],1565struct svga_winsys_buffer *declBuf,1566uint32 rasterizedStream,1567uint32 sizeInBytes)1568{1569unsigned i;1570SVGA3dCmdHeader *header;1571SVGA3dCmdDXDefineStreamOutputWithMob *dcmd;1572SVGA3dCmdDXBindStreamOutput *bcmd;15731574unsigned totalSize = 2 * sizeof(*header) +1575sizeof(*dcmd) + sizeof(*bcmd);15761577/* Make sure there is room for both commands */1578header = swc->reserve(swc, totalSize, 2);1579if (!header)1580return PIPE_ERROR_OUT_OF_MEMORY;15811582/* DXDefineStreamOutputWithMob command */1583header->id = SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB;1584header->size = sizeof(*dcmd);1585dcmd = (SVGA3dCmdDXDefineStreamOutputWithMob *)(header + 1);1586dcmd->soid= soid;1587dcmd->numOutputStreamEntries = numOutputStreamEntries;1588dcmd->numOutputStreamStrides = numOutputStreamStrides;1589dcmd->rasterizedStream = rasterizedStream;15901591for (i = 0; i < ARRAY_SIZE(dcmd->streamOutputStrideInBytes); i++)1592dcmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];159315941595/* DXBindStreamOutput command */1596header = (SVGA3dCmdHeader *)(dcmd + 1);15971598header->id = SVGA_3D_CMD_DX_BIND_STREAMOUTPUT;1599header->size = sizeof(*bcmd);1600bcmd = (SVGA3dCmdDXBindStreamOutput *)(header + 1);16011602bcmd->soid = soid;1603bcmd->offsetInBytes = 0;1604swc->mob_relocation(swc, &bcmd->mobid,1605&bcmd->offsetInBytes, declBuf, 0,1606SVGA_RELOC_WRITE);16071608bcmd->sizeInBytes = sizeInBytes;1609bcmd->offsetInBytes = 0;161016111612swc->commit(swc);1613return PIPE_OK;1614}161516161617