Path: blob/21.2-virgl/src/gallium/drivers/svga/svga_context.h
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/**********************************************************1* Copyright 2008-2009 VMware, Inc. All rights reserved.2*3* Permission is hereby granted, free of charge, to any person4* obtaining a copy of this software and associated documentation5* files (the "Software"), to deal in the Software without6* restriction, including without limitation the rights to use, copy,7* modify, merge, publish, distribute, sublicense, and/or sell copies8* of the Software, and to permit persons to whom the Software is9* furnished to do so, subject to the following conditions:10*11* The above copyright notice and this permission notice shall be12* included in all copies or substantial portions of the Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,15* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF16* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND17* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS18* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN19* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN20* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE21* SOFTWARE.22*23**********************************************************/2425#ifndef SVGA_CONTEXT_H26#define SVGA_CONTEXT_H272829#include "pipe/p_context.h"30#include "pipe/p_defines.h"31#include "pipe/p_state.h"3233#include "util/os_time.h"3435#include "util/u_blitter.h"36#include "util/list.h"3738#include "tgsi/tgsi_scan.h"3940#include "svga_screen.h"41#include "svga_state.h"42#include "svga_winsys.h"43#include "svga_hw_reg.h"44#include "svga3d_shaderdefs.h"45#include "svga_debug.h"4647/** Non-GPU queries for gallium HUD */48enum svga_hud {49/* per-frame counters */50SVGA_QUERY_NUM_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC,51SVGA_QUERY_NUM_FALLBACKS,52SVGA_QUERY_NUM_FLUSHES,53SVGA_QUERY_NUM_VALIDATIONS,54SVGA_QUERY_MAP_BUFFER_TIME,55SVGA_QUERY_NUM_BUFFERS_MAPPED,56SVGA_QUERY_NUM_TEXTURES_MAPPED,57SVGA_QUERY_NUM_BYTES_UPLOADED,58SVGA_QUERY_NUM_COMMAND_BUFFERS,59SVGA_QUERY_COMMAND_BUFFER_SIZE,60SVGA_QUERY_FLUSH_TIME,61SVGA_QUERY_SURFACE_WRITE_FLUSHES,62SVGA_QUERY_NUM_READBACKS,63SVGA_QUERY_NUM_RESOURCE_UPDATES,64SVGA_QUERY_NUM_BUFFER_UPLOADS,65SVGA_QUERY_NUM_CONST_BUF_UPDATES,66SVGA_QUERY_NUM_CONST_UPDATES,67SVGA_QUERY_NUM_SHADER_RELOCATIONS,68SVGA_QUERY_NUM_SURFACE_RELOCATIONS,6970/* running total counters */71SVGA_QUERY_MEMORY_USED,72SVGA_QUERY_NUM_SHADERS,73SVGA_QUERY_NUM_RESOURCES,74SVGA_QUERY_NUM_STATE_OBJECTS,75SVGA_QUERY_NUM_SURFACE_VIEWS,76SVGA_QUERY_NUM_GENERATE_MIPMAP,77SVGA_QUERY_NUM_FAILED_ALLOCATIONS,78SVGA_QUERY_NUM_COMMANDS_PER_DRAW,79SVGA_QUERY_SHADER_MEM_USED,8081/*SVGA_QUERY_MAX has to be last because it is size of an array*/82SVGA_QUERY_MAX83};8485/**86* Maximum supported number of constant buffers per shader87*/88#define SVGA_MAX_CONST_BUFS 148990/**91* Maximum constant buffer size that can be set in the92* DXSetSingleConstantBuffer command is93* DX10 constant buffer element count * 4 4-bytes components94*/95#define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))9697#define CONST0_UPLOAD_ALIGNMENT 2569899struct draw_vertex_shader;100struct draw_fragment_shader;101struct svga_shader_variant;102struct SVGACmdMemory;103struct util_bitmask;104105106struct svga_cache_context;107struct svga_tracked_state;108109struct svga_blend_state {110unsigned need_white_fragments:1;111unsigned independent_blend_enable:1;112unsigned alpha_to_coverage:1;113unsigned alpha_to_one:1;114unsigned blend_color_alpha:1; /**< set blend color to alpha value */115unsigned logicop_enabled:1;116unsigned logicop_mode:5;117118/** Per-render target state */119struct {120uint8_t writemask;121122boolean blend_enable;123uint8_t srcblend;124uint8_t dstblend;125uint8_t blendeq;126127boolean separate_alpha_blend_enable;128uint8_t srcblend_alpha;129uint8_t dstblend_alpha;130uint8_t blendeq_alpha;131} rt[PIPE_MAX_COLOR_BUFS];132133SVGA3dBlendStateId id; /**< vgpu10 */134};135136struct svga_depth_stencil_state {137unsigned zfunc:8;138unsigned zenable:1;139unsigned zwriteenable:1;140141unsigned alphatestenable:1;142unsigned alphafunc:8;143144struct {145unsigned enabled:1;146unsigned func:8;147unsigned fail:8;148unsigned zfail:8;149unsigned pass:8;150} stencil[2];151152/* SVGA3D has one ref/mask/writemask triple shared between front &153* back face stencil. We really need two:154*/155unsigned stencil_mask:8;156unsigned stencil_writemask:8;157158float alpharef;159160SVGA3dDepthStencilStateId id; /**< vgpu10 */161};162163#define SVGA_UNFILLED_DISABLE 0164#define SVGA_UNFILLED_LINE 1165#define SVGA_UNFILLED_POINT 2166167#define SVGA_PIPELINE_FLAG_POINTS (1<<PIPE_PRIM_POINTS)168#define SVGA_PIPELINE_FLAG_LINES (1<<PIPE_PRIM_LINES)169#define SVGA_PIPELINE_FLAG_TRIS (1<<PIPE_PRIM_TRIANGLES)170171struct svga_rasterizer_state {172struct pipe_rasterizer_state templ; /* needed for draw module */173174unsigned shademode:8;175unsigned cullmode:8;176unsigned scissortestenable:1;177unsigned multisampleantialias:1;178unsigned antialiasedlineenable:1;179unsigned lastpixel:1;180unsigned pointsprite:1;181182unsigned linepattern;183184float slopescaledepthbias;185float depthbias;186float pointsize;187float linewidth;188189unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */190191/** Which prims do we need help for? Bitmask of (1 << PIPE_PRIM_x) flags */192unsigned need_pipeline:16;193194SVGA3dRasterizerStateId id; /**< vgpu10 */195196/** For debugging: */197const char* need_pipeline_tris_str;198const char* need_pipeline_lines_str;199const char* need_pipeline_points_str;200};201202struct svga_sampler_state {203unsigned mipfilter;204unsigned magfilter;205unsigned minfilter;206unsigned aniso_level;207float lod_bias;208unsigned addressu;209unsigned addressv;210unsigned addressw;211unsigned bordercolor;212unsigned normalized_coords:1;213unsigned compare_mode:1;214unsigned compare_func:3;215216unsigned min_lod;217unsigned view_min_lod;218unsigned view_max_lod;219220SVGA3dSamplerId id[2];221};222223224struct svga_pipe_sampler_view225{226struct pipe_sampler_view base;227228SVGA3dShaderResourceViewId id;229};230231232static inline struct svga_pipe_sampler_view *233svga_pipe_sampler_view(struct pipe_sampler_view *v)234{235return (struct svga_pipe_sampler_view *) v;236}237238239struct svga_velems_state {240unsigned count;241struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];242SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */243244/** Bitmasks indicating which attributes need format conversion */245unsigned adjust_attrib_range; /**< range adjustment */246unsigned attrib_is_pure_int; /**< pure int */247unsigned adjust_attrib_w_1; /**< set w = 1 */248unsigned adjust_attrib_itof; /**< int->float */249unsigned adjust_attrib_utof; /**< uint->float */250unsigned attrib_is_bgra; /**< R / B swizzling */251unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */252unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */253unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */254255boolean need_swvfetch;256257SVGA3dElementLayoutId id; /**< VGPU10 */258};259260struct svga_constant_buffer {261struct svga_winsys_surface *handle;262unsigned size;263};264265/* Use to calculate differences between state emitted to hardware and266* current driver-calculated state.267*/268struct svga_state269{270const struct svga_blend_state *blend;271const struct svga_depth_stencil_state *depth;272const struct svga_rasterizer_state *rast;273const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];274const struct svga_velems_state *velems;275276struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */277struct svga_fragment_shader *fs;278struct svga_vertex_shader *vs;279struct svga_geometry_shader *user_gs; /* user-specified GS */280struct svga_geometry_shader *gs; /* derived GS */281/* derived tessellation control shader */282struct svga_tcs_shader *tcs;283/* derived tessellation evaluation shader */284struct svga_tes_shader *tes;285struct svga_compute_shader *cs;286287struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];288/** Constant buffers for each shader.289* The size should probably always match with that of290* svga_shader_emitter_v10.num_shader_consts.291*/292struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];293294struct pipe_framebuffer_state framebuffer;295float depthscale;296297/* Hack to limit the number of different render targets between298* flushes. Helps avoid blowing out our surface cache in EXA.299*/300int nr_fbs;301302struct pipe_poly_stipple poly_stipple;303struct pipe_scissor_state scissor[SVGA3D_DX_MAX_VIEWPORTS];304struct pipe_blend_color blend_color;305struct pipe_stencil_ref stencil_ref;306struct pipe_clip_state clip;307struct pipe_viewport_state viewport[SVGA3D_DX_MAX_VIEWPORTS];308309unsigned num_samplers[PIPE_SHADER_TYPES];310unsigned num_sampler_views[PIPE_SHADER_TYPES];311unsigned num_vertex_buffers;312enum pipe_prim_type reduced_prim;313314unsigned vertex_id_bias;315316struct {317unsigned flag_1d;318unsigned flag_srgb;319} tex_flags;320321unsigned sample_mask;322unsigned vertices_per_patch;323float default_tesslevels[6]; /* tessellation (outer[4] + inner[2]) levels */324struct {325/* Determine the layout of the grid (in block units) to be used. */326unsigned size[3];327/* If DispatchIndirect is used, this will has grid size info*/328struct pipe_resource *indirect;329} grid_info;330};331332struct svga_prescale {333float translate[4];334float scale[4];335boolean enabled;336};337338struct svga_depthrange {339float zmin;340float zmax;341};342343/* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )344*/345struct svga_hw_clear_state346{347struct pipe_framebuffer_state framebuffer;348349/* VGPU9 only */350SVGA3dRect viewport;351struct svga_depthrange depthrange;352353/* VGPU10 state */354SVGA3dViewport viewports[SVGA3D_DX_MAX_VIEWPORTS];355struct svga_prescale prescale[SVGA3D_DX_MAX_VIEWPORTS];356struct pipe_scissor_state scissors[SVGA3D_DX_MAX_VIEWPORTS];357unsigned num_prescale;358359unsigned num_rendertargets;360struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS];361struct pipe_surface *dsv;362};363364struct svga_hw_view_state365{366struct pipe_resource *texture;367struct svga_sampler_view *v;368unsigned min_lod;369unsigned max_lod;370boolean dirty;371};372373/* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )374*/375struct svga_hw_draw_state376{377/** VGPU9 rasterization state */378unsigned rs[SVGA3D_RS_MAX];379/** VGPU9 texture sampler and bindings state */380unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];381382/** VGPU9 texture views */383unsigned num_views;384unsigned num_backed_views; /* views with backing copy of texture */385struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];386387/** VGPU9 constant buffer values */388float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];389390/** Currently bound shaders */391struct svga_shader_variant *fs;392struct svga_shader_variant *vs;393struct svga_shader_variant *gs;394struct svga_shader_variant *tcs;395struct svga_shader_variant *tes;396struct svga_shader_variant *cs;397398/** Currently bound constant buffer, per shader stage */399struct pipe_resource *constbuf[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];400struct svga_constant_buffer constbufoffsets[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];401402/** Bitmask of enabled constant buffers */403unsigned enabled_constbufs[PIPE_SHADER_TYPES];404405/**406* These are used to reduce the number of times we call u_upload_unmap()407* while updating the zero-th/default VGPU10 constant buffer.408*/409struct pipe_resource *const0_buffer;410struct svga_winsys_surface *const0_handle;411412/** VGPU10 HW state (used to prevent emitting redundant state) */413SVGA3dDepthStencilStateId depth_stencil_id;414unsigned stencil_ref;415SVGA3dBlendStateId blend_id;416float blend_factor[4];417unsigned blend_sample_mask;418SVGA3dRasterizerStateId rasterizer_id;419SVGA3dElementLayoutId layout_id;420SVGA3dPrimitiveType topology;421422/** Vertex buffer state */423SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS];424struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS];425unsigned num_vbuffers;426427struct pipe_resource *ib; /**< index buffer for drawing */428SVGA3dSurfaceFormat ib_format;429unsigned ib_offset;430431unsigned num_samplers[PIPE_SHADER_TYPES];432SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];433434unsigned num_sampler_views[PIPE_SHADER_TYPES];435struct pipe_sampler_view436*sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];437438/* used for rebinding */439unsigned default_constbuf_size[PIPE_SHADER_TYPES];440441boolean rasterizer_discard; /* set if rasterization is disabled */442boolean has_backed_views; /* set if any of the rtv/dsv is a backed surface view */443};444445446/* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )447*/448struct svga_sw_state449{450/* which parts we need */451boolean need_swvfetch;452boolean need_pipeline;453boolean need_swtnl;454455/* Flag to make sure that need sw is on while456* updating state within a swtnl call.457*/458boolean in_swtnl_draw;459};460461462/* Queue some state updates (like rss) and submit them to hardware in463* a single packet.464*/465struct svga_hw_queue;466467struct svga_query;468struct svga_qmem_alloc_entry;469470struct svga_context471{472struct pipe_context pipe;473struct svga_winsys_context *swc;474struct blitter_context *blitter;475struct u_upload_mgr *const0_upload;476struct u_upload_mgr *tex_upload;477478struct {479boolean no_swtnl;480boolean force_swtnl;481boolean use_min_mipmap;482483/* incremented for each shader */484unsigned shader_id;485486boolean no_line_width;487boolean force_hw_line_stipple;488489/** To report perf/conformance/etc issues to the gallium frontend */490struct pipe_debug_callback callback;491} debug;492493struct {494struct draw_context *draw;495struct vbuf_render *backend;496unsigned hw_prim;497boolean new_vbuf;498boolean new_vdecl;499} swtnl;500501/* Bitmask of blend state objects IDs */502struct util_bitmask *blend_object_id_bm;503504/* Bitmask of depth/stencil state objects IDs */505struct util_bitmask *ds_object_id_bm;506507/* Bitmask of input element object IDs */508struct util_bitmask *input_element_object_id_bm;509510/* Bitmask of rasterizer object IDs */511struct util_bitmask *rast_object_id_bm;512513/* Bitmask of sampler state objects IDs */514struct util_bitmask *sampler_object_id_bm;515516/* Bitmask of sampler view IDs */517struct util_bitmask *sampler_view_id_bm;518519/* Bitmask of used shader IDs */520struct util_bitmask *shader_id_bm;521522/* Bitmask of used surface view IDs */523struct util_bitmask *surface_view_id_bm;524525/* Bitmask of used stream output IDs */526struct util_bitmask *stream_output_id_bm;527528/* Bitmask of used query IDs */529struct util_bitmask *query_id_bm;530531struct {532uint64_t dirty[SVGA_STATE_MAX];533534/** bitmasks of which const buffers are changed */535unsigned dirty_constbufs[PIPE_SHADER_TYPES];536537unsigned texture_timestamp;538539struct svga_sw_state sw;540struct svga_hw_draw_state hw_draw;541struct svga_hw_clear_state hw_clear;542} state;543544struct svga_state curr; /* state from the gallium frontend */545uint64_t dirty; /* statechanges since last update_state() */546547union {548struct {549unsigned rendertargets:1;550unsigned texture_samplers:1;551unsigned constbufs:1;552unsigned vs:1;553unsigned fs:1;554unsigned gs:1;555unsigned tcs:1;556unsigned tes:1;557unsigned cs:1;558unsigned query:1;559} flags;560unsigned val;561} rebind;562563struct svga_hwtnl *hwtnl;564565/** Queries states */566struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */567unsigned gb_query_len; /**< gb query object size */568struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */569struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];570/**< query mem block mapping */571struct svga_query *sq[SVGA_QUERY_MAX+12]; /**< queries currently in progress */572/* The last 12 entries are for streamout573* queries for stream 0..3574*/575576/** List of buffers with queued transfers */577struct list_head dirty_buffers;578579/** performance / info queries for HUD */580struct {581uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */582uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */583uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */584uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */585uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */586uint64_t num_buffers_mapped; /**< SVGA_QUERY_NUM_BUFFERS_MAPPED */587uint64_t num_textures_mapped; /**< SVGA_QUERY_NUM_TEXTURES_MAPPED */588uint64_t num_command_buffers; /**< SVGA_QUERY_NUM_COMMAND_BUFFERS */589uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */590uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */591uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */592uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACKS */593uint64_t num_resource_updates; /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */594uint64_t num_buffer_uploads; /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */595uint64_t num_const_buf_updates; /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */596uint64_t num_const_updates; /**< SVGA_QUERY_NUM_CONST_UPDATES */597uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */598599/** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */600uint64_t num_blend_objects;601uint64_t num_depthstencil_objects;602uint64_t num_rasterizer_objects;603uint64_t num_sampler_objects;604uint64_t num_samplerview_objects;605uint64_t num_vertexelement_objects;606607uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */608uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */609uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */610uint64_t shader_mem_used; /**< SVGA_QUERY_SHADER_MEM_USED */611612boolean uses_time; /**< os_time_get() calls needed? */613} hud;614615/** The currently bound stream output targets */616boolean in_streamout; /* Set if streamout is active */617unsigned num_so_targets;618struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];619struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];620struct svga_stream_output *current_so;621622/**623* The following states are used in the workaround for auto draw with624* stream instancing.625*/626627/* Last bound SO targets that can be used to get vertex count */628struct pipe_stream_output_target *vcount_so_targets[SVGA3D_DX_MAX_SOTARGETS];629unsigned vcount_buffer_stream; /* SO buffer to stream index mask */630struct pipe_query *so_queries[4]; /* SO stat queries for each stream */631632/** A blend state with blending disabled, for falling back to when blending633* is illegal (e.g. an integer texture is bound)634*/635struct svga_blend_state *noop_blend;636637struct {638struct pipe_resource *texture;639struct svga_pipe_sampler_view *sampler_view;640void *sampler;641} polygon_stipple;642643/** Alternate rasterizer states created for point sprite */644struct svga_rasterizer_state *rasterizer_no_cull[2];645646/** Depth stencil state created to disable depth stencil test */647struct svga_depth_stencil_state *depthstencil_disable;648649/** Current conditional rendering predicate */650struct {651SVGA3dQueryId query_id;652boolean cond;653} pred;654655boolean render_condition;656boolean disable_rasterizer; /* Set if to disable rasterization */657658struct {659struct svga_tcs_shader *passthrough_tcs;660struct svga_vertex_shader *vs;661struct svga_tes_shader *tes;662unsigned vertices_per_patch;663boolean passthrough;664} tcs;665666};667668/* A flag for each frontend state object:669*/670#define SVGA_NEW_BLEND ((uint64_t) 0x1)671#define SVGA_NEW_DEPTH_STENCIL_ALPHA ((uint64_t) 0x2)672#define SVGA_NEW_RAST ((uint64_t) 0x4)673#define SVGA_NEW_SAMPLER ((uint64_t) 0x8)674#define SVGA_NEW_TEXTURE ((uint64_t) 0x10)675#define SVGA_NEW_VBUFFER ((uint64_t) 0x20)676#define SVGA_NEW_VELEMENT ((uint64_t) 0x40)677#define SVGA_NEW_FS ((uint64_t) 0x80)678#define SVGA_NEW_VS ((uint64_t) 0x100)679#define SVGA_NEW_FS_CONST_BUFFER ((uint64_t) 0x200)680#define SVGA_NEW_VS_CONST_BUFFER ((uint64_t) 0x400)681#define SVGA_NEW_FRAME_BUFFER ((uint64_t) 0x800)682#define SVGA_NEW_STIPPLE ((uint64_t) 0x1000)683#define SVGA_NEW_SCISSOR ((uint64_t) 0x2000)684#define SVGA_NEW_BLEND_COLOR ((uint64_t) 0x4000)685#define SVGA_NEW_CLIP ((uint64_t) 0x8000)686#define SVGA_NEW_VIEWPORT ((uint64_t) 0x10000)687#define SVGA_NEW_PRESCALE ((uint64_t) 0x20000)688#define SVGA_NEW_REDUCED_PRIMITIVE ((uint64_t) 0x40000)689#define SVGA_NEW_TEXTURE_BINDING ((uint64_t) 0x80000)690#define SVGA_NEW_NEED_PIPELINE ((uint64_t) 0x100000)691#define SVGA_NEW_NEED_SWVFETCH ((uint64_t) 0x200000)692#define SVGA_NEW_NEED_SWTNL ((uint64_t) 0x400000)693#define SVGA_NEW_FS_VARIANT ((uint64_t) 0x800000)694#define SVGA_NEW_VS_VARIANT ((uint64_t) 0x1000000)695#define SVGA_NEW_TEXTURE_FLAGS ((uint64_t) 0x4000000)696#define SVGA_NEW_STENCIL_REF ((uint64_t) 0x8000000)697#define SVGA_NEW_GS ((uint64_t) 0x10000000)698#define SVGA_NEW_GS_CONST_BUFFER ((uint64_t) 0x20000000)699#define SVGA_NEW_GS_VARIANT ((uint64_t) 0x40000000)700#define SVGA_NEW_TEXTURE_CONSTS ((uint64_t) 0x80000000)701#define SVGA_NEW_TCS ((uint64_t) 0x100000000)702#define SVGA_NEW_TES ((uint64_t) 0x200000000)703#define SVGA_NEW_TCS_VARIANT ((uint64_t) 0x400000000)704#define SVGA_NEW_TES_VARIANT ((uint64_t) 0x800000000)705#define SVGA_NEW_TCS_CONST_BUFFER ((uint64_t) 0x1000000000)706#define SVGA_NEW_TES_CONST_BUFFER ((uint64_t) 0x2000000000)707#define SVGA_NEW_TCS_PARAM ((uint64_t) 0x4000000000)708#define SVGA_NEW_FS_CONSTS ((uint64_t) 0x8000000000)709#define SVGA_NEW_VS_CONSTS ((uint64_t) 0x10000000000)710#define SVGA_NEW_GS_CONSTS ((uint64_t) 0x20000000000)711#define SVGA_NEW_TCS_CONSTS ((uint64_t) 0x40000000000)712#define SVGA_NEW_TES_CONSTS ((uint64_t) 0x800000000000)713#define SVGA_NEW_ALL ((uint64_t) 0xFFFFFFFFFFFFFFFF)714715#define SVGA_NEW_CONST_BUFFER \716(SVGA_NEW_FS_CONST_BUFFER | SVGA_NEW_VS_CONST_BUFFER | \717SVGA_NEW_GS_CONST_BUFFER | \718SVGA_NEW_TCS_CONST_BUFFER | SVGA_NEW_TES_CONST_BUFFER)719720721void svga_init_state_functions( struct svga_context *svga );722void svga_init_flush_functions( struct svga_context *svga );723void svga_init_string_functions( struct svga_context *svga );724void svga_init_blit_functions(struct svga_context *svga);725726void svga_init_blend_functions( struct svga_context *svga );727void svga_init_depth_stencil_functions( struct svga_context *svga );728void svga_init_misc_functions( struct svga_context *svga );729void svga_init_rasterizer_functions( struct svga_context *svga );730void svga_init_sampler_functions( struct svga_context *svga );731void svga_init_cs_functions( struct svga_context *svga );732void svga_init_fs_functions( struct svga_context *svga );733void svga_init_vs_functions( struct svga_context *svga );734void svga_init_gs_functions( struct svga_context *svga );735void svga_init_ts_functions( struct svga_context *svga );736void svga_init_vertex_functions( struct svga_context *svga );737void svga_init_constbuffer_functions( struct svga_context *svga );738void svga_init_draw_functions( struct svga_context *svga );739void svga_init_query_functions( struct svga_context *svga );740void svga_init_surface_functions(struct svga_context *svga);741void svga_init_stream_output_functions( struct svga_context *svga );742void svga_init_clear_functions( struct svga_context *svga );743744void svga_cleanup_vertex_state( struct svga_context *svga );745void svga_cleanup_sampler_state( struct svga_context *svga );746void svga_cleanup_tss_binding( struct svga_context *svga );747void svga_cleanup_framebuffer( struct svga_context *svga );748void svga_cleanup_tcs_state( struct svga_context *svga );749750void svga_context_flush( struct svga_context *svga,751struct pipe_fence_handle **pfence );752753void svga_context_finish(struct svga_context *svga);754755void svga_hwtnl_flush_retry( struct svga_context *svga );756void svga_hwtnl_flush_buffer( struct svga_context *svga,757struct pipe_resource *buffer );758boolean svga_hwtnl_has_pending_prim(struct svga_hwtnl *);759760void svga_surfaces_flush(struct svga_context *svga);761762struct pipe_context *763svga_context_create(struct pipe_screen *screen,764void *priv, unsigned flags);765766void svga_toggle_render_condition(struct svga_context *svga,767boolean render_condition_enabled,768boolean on);769770/***********************************************************************771* Inline conversion functions. These are better-typed than the772* macros used previously:773*/774static inline struct svga_context *775svga_context( struct pipe_context *pipe )776{777return (struct svga_context *)pipe;778}779780static inline struct svga_winsys_screen *781svga_sws(struct svga_context *svga)782{783return svga_screen(svga->pipe.screen)->sws;784}785786static inline boolean787svga_have_gb_objects(const struct svga_context *svga)788{789return svga_screen(svga->pipe.screen)->sws->have_gb_objects;790}791792static inline boolean793svga_have_gb_dma(const struct svga_context *svga)794{795return svga_screen(svga->pipe.screen)->sws->have_gb_dma;796}797798static inline boolean799svga_have_vgpu10(const struct svga_context *svga)800{801return svga_screen(svga->pipe.screen)->sws->have_vgpu10;802}803804static inline boolean805svga_have_sm4_1(const struct svga_context *svga)806{807return svga_screen(svga->pipe.screen)->sws->have_sm4_1;808}809810static inline boolean811svga_have_sm5(const struct svga_context *svga)812{813return svga_screen(svga->pipe.screen)->sws->have_sm5;814}815816static inline boolean817svga_need_to_rebind_resources(const struct svga_context *svga)818{819return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;820}821822static inline boolean823svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)824{825return memcmp(r1, r2, sizeof(*r1)) == 0;826}827828/**829* If the Gallium HUD is enabled, this will return the current time.830* Otherwise, just return zero.831*/832static inline int64_t833svga_get_time(struct svga_context *svga)834{835return svga->hud.uses_time ? os_time_get() : 0;836}837838/*839* The SVGA_TRY_XX family of macros can be used to optionally replace a840* function call with an error value, the purpose is to trigger and test841* retry path handling.842*/843#ifdef DEBUG844845/*846* Optionally replace a function call with a PIPE_ERROR_OUT_OF_MEMORY847* return value848*/849#define SVGA_TRY(_func) \850((SVGA_DEBUG & DEBUG_RETRY) ? PIPE_ERROR_OUT_OF_MEMORY : (_func))851852/* Optionally replace a function call with a NULL return value */853#define SVGA_TRY_PTR(_func) \854((SVGA_DEBUG & DEBUG_RETRY) ? NULL : (_func))855856/*857* Optionally replace a function call with a NULL return value, and set858* the _retry parameter to TRUE.859*/860#define SVGA_TRY_MAP(_func, _retry) \861((SVGA_DEBUG & DEBUG_RETRY) ? (_retry) = TRUE, NULL : (_func))862#else863864#define SVGA_TRY(_func) (_func)865866#define SVGA_TRY_PTR(_func) (_func)867868#define SVGA_TRY_MAP(_func, _retry) (_func)869#endif870871/**872* Enter retry processing after hitting out-of-command space873*/874static inline void875svga_retry_enter(struct svga_context *svga)876{877/* We shouldn't nest retries, but currently we do. */878if ((SVGA_DEBUG & DEBUG_RETRY) && svga->swc->in_retry) {879debug_printf("WARNING: Recursive retry. Level: %u.\n",880svga->swc->in_retry);881}882svga->swc->in_retry++;883}884885/**886* Exit retry processing after hitting out-of-command space887*/888static inline void889svga_retry_exit(struct svga_context *svga)890{891assert(svga->swc->in_retry > 0);892svga->swc->in_retry--;893}894895/**896* Perform a function call, and on failure flush the context and retry,897* asserting that the retry succeeded. On return, the boolean argument898* _retried indicates whether the function call was retried or not.899*/900#define SVGA_RETRY_CHECK(_svga, _func, _retried) \901do { \902enum pipe_error ret; \903\904ret = SVGA_TRY(_func); \905(_retried) = (ret != PIPE_OK); \906if (_retried) { \907svga_retry_enter(_svga); \908svga_context_flush(_svga, NULL); \909ret = (_func); \910assert(ret == PIPE_OK); \911svga_retry_exit(_svga); \912} \913} while(0)914915/**916* Perform a function call, and on failure flush the context and retry,917* asserting that the retry succeeded.918*/919#define SVGA_RETRY(_svga, _func) \920do { \921UNUSED boolean retried; \922\923SVGA_RETRY_CHECK(_svga, _func, retried); \924} while(0)925926/**927* Perform a function call, and on out-of-memory, flush the context and928* retry. The retry return value is stored in _ret for reuse.929*/930#define SVGA_RETRY_OOM(_svga, _ret, _func) \931do { \932(_ret) = SVGA_TRY(_func); \933if ((_ret) == PIPE_ERROR_OUT_OF_MEMORY) { \934svga_retry_enter(_svga); \935svga_context_flush(_svga, NULL); \936(_ret) = (_func); \937svga_retry_exit(_svga); \938} \939} while (0);940941#endif942943944