CoCalc -- svga

GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/svga/svga_format.c
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/**********************************************************
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 * Copyright 2011 VMware, Inc.  All rights reserved.
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 *
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 * Permission is hereby granted, free of charge, to any person
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 * obtaining a copy of this software and associated documentation
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 * files (the "Software"), to deal in the Software without
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 * restriction, including without limitation the rights to use, copy,
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 * modify, merge, publish, distribute, sublicense, and/or sell copies
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 * of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be
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 * included in all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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 * SOFTWARE.
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 *
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 **********************************************************/
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#include "pipe/p_format.h"
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#include "util/u_debug.h"
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#include "util/format/u_format.h"
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#include "util/u_memory.h"
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#include "svga_winsys.h"
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#include "svga_screen.h"
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#include "svga_format.h"
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/** Describes mapping from gallium formats to SVGA vertex/pixel formats */
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struct vgpu10_format_entry
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{
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   SVGA3dSurfaceFormat vertex_format;
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   SVGA3dSurfaceFormat pixel_format;
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   SVGA3dSurfaceFormat view_format;   /* view format for texture buffer */
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   unsigned flags;
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};
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struct format_compat_entry
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{
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   enum pipe_format pformat;
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   const SVGA3dSurfaceFormat *compat_format;
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};
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/**
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 * Table mapping Gallium formats to SVGA3d vertex/pixel formats.
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 * Note: the table is ordered according to PIPE_FORMAT_x order.
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 */
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static const struct vgpu10_format_entry format_conversion_table[] =
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{
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   /* Gallium format                    SVGA3D vertex format        SVGA3D pixel format          SVGA3D texbuf view format    Flags */
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   [ PIPE_FORMAT_B8G8R8A8_UNORM ] =        { SVGA3D_B8G8R8A8_UNORM,      SVGA3D_B8G8R8A8_UNORM,       SVGA3D_B8G8R8A8_UNORM,       TF_GEN_MIPS },
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   [ PIPE_FORMAT_B8G8R8X8_UNORM ] =        { SVGA3D_FORMAT_INVALID,      SVGA3D_B8G8R8X8_UNORM,       SVGA3D_B8G8R8X8_UNORM,       TF_GEN_MIPS },
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   [ PIPE_FORMAT_B5G5R5A1_UNORM ] =        { SVGA3D_FORMAT_INVALID,      SVGA3D_B5G5R5A1_UNORM,       SVGA3D_B5G5R5A1_UNORM,       TF_GEN_MIPS },
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   [ PIPE_FORMAT_B5G6R5_UNORM ] =          { SVGA3D_FORMAT_INVALID,      SVGA3D_B5G6R5_UNORM,         SVGA3D_B5G6R5_UNORM,         TF_GEN_MIPS },
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   [ PIPE_FORMAT_R10G10B10A2_UNORM ] =     { SVGA3D_R10G10B10A2_UNORM,   SVGA3D_R10G10B10A2_UNORM,    SVGA3D_R10G10B10A2_UNORM,    TF_GEN_MIPS },
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   [ PIPE_FORMAT_L8_UNORM ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8_UNORM,             TF_XXX1 },
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   [ PIPE_FORMAT_A8_UNORM ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_A8_UNORM,             SVGA3D_R8_UNORM,             TF_GEN_MIPS | TF_000X},
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   [ PIPE_FORMAT_I8_UNORM ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8_UNORM,             TF_XXXX },
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   [ PIPE_FORMAT_L8A8_UNORM ] =            { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8G8_UNORM,           TF_XXXY },
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   [ PIPE_FORMAT_L16_UNORM ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_UNORM,            TF_XXX1 },
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   [ PIPE_FORMAT_Z16_UNORM ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_D16_UNORM,            SVGA3D_D16_UNORM,            0 },
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   [ PIPE_FORMAT_Z32_FLOAT ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_D32_FLOAT,            SVGA3D_D32_FLOAT,            0 },
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   [ PIPE_FORMAT_Z24_UNORM_S8_UINT ] =     { SVGA3D_FORMAT_INVALID,      SVGA3D_D24_UNORM_S8_UINT,    SVGA3D_D24_UNORM_S8_UINT,    0 },
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   [ PIPE_FORMAT_Z24X8_UNORM ] =           { SVGA3D_FORMAT_INVALID,      SVGA3D_D24_UNORM_S8_UINT,    SVGA3D_D24_UNORM_S8_UINT,    0 },
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   [ PIPE_FORMAT_R32_FLOAT ] =             { SVGA3D_R32_FLOAT,           SVGA3D_R32_FLOAT,            SVGA3D_R32_FLOAT,            TF_GEN_MIPS  },
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   [ PIPE_FORMAT_R32G32_FLOAT ] =          { SVGA3D_R32G32_FLOAT,        SVGA3D_R32G32_FLOAT,         SVGA3D_R32G32_FLOAT,         TF_GEN_MIPS  },
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   [ PIPE_FORMAT_R32G32B32_FLOAT ] =       { SVGA3D_R32G32B32_FLOAT,     SVGA3D_R32G32B32_FLOAT,      SVGA3D_R32G32B32_FLOAT,      TF_GEN_MIPS },
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   [ PIPE_FORMAT_R32G32B32A32_FLOAT ] =    { SVGA3D_R32G32B32A32_FLOAT,  SVGA3D_R32G32B32A32_FLOAT,   SVGA3D_R32G32B32A32_FLOAT,   TF_GEN_MIPS  },
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   [ PIPE_FORMAT_R32_USCALED ] =           { SVGA3D_R32_UINT,            SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R32G32_USCALED ] =        { SVGA3D_R32G32_UINT,         SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R32G32B32_USCALED ] =     { SVGA3D_R32G32B32_UINT,      SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R32G32B32A32_USCALED ] =  { SVGA3D_R32G32B32A32_UINT,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R32_SSCALED ] =           { SVGA3D_R32_SINT,            SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R32G32_SSCALED ] =        { SVGA3D_R32G32_SINT,         SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R32G32B32_SSCALED ] =     { SVGA3D_R32G32B32_SINT,      SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R32G32B32A32_SSCALED ] =  { SVGA3D_R32G32B32A32_SINT,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R16_UNORM ] =             { SVGA3D_R16_UNORM,           SVGA3D_R16_UNORM,            SVGA3D_R16_UNORM,            TF_GEN_MIPS },
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   [ PIPE_FORMAT_R16G16_UNORM ] =          { SVGA3D_R16G16_UNORM,        SVGA3D_R16G16_UNORM,         SVGA3D_R16G16_UNORM,         TF_GEN_MIPS },
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   [ PIPE_FORMAT_R16G16B16_UNORM ] =       { SVGA3D_R16G16B16A16_UNORM,  SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 },
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   [ PIPE_FORMAT_R16G16B16A16_UNORM ] =    { SVGA3D_R16G16B16A16_UNORM,  SVGA3D_R16G16B16A16_UNORM,   SVGA3D_R16G16B16A16_UNORM,   TF_GEN_MIPS },
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   [ PIPE_FORMAT_R16_USCALED ] =           { SVGA3D_R16_UINT,            SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R16G16_USCALED ] =        { SVGA3D_R16G16_UINT,         SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R16G16B16_USCALED ] =     { SVGA3D_R16G16B16A16_UINT,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 | VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R16G16B16A16_USCALED ] =  { SVGA3D_R16G16B16A16_UINT,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R16_SNORM ] =             { SVGA3D_R16_SNORM,           SVGA3D_R16_SNORM,            SVGA3D_R16_SNORM,            0 },
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   [ PIPE_FORMAT_R16G16_SNORM ] =          { SVGA3D_R16G16_SNORM,        SVGA3D_R16G16_SNORM,         SVGA3D_R16G16_SNORM,         0 },
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   [ PIPE_FORMAT_R16G16B16_SNORM ] =       { SVGA3D_R16G16B16A16_SNORM,  SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 },
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   [ PIPE_FORMAT_R16G16B16A16_SNORM ] =    { SVGA3D_R16G16B16A16_SNORM,  SVGA3D_R16G16B16A16_SNORM,   SVGA3D_R16G16B16A16_SNORM,   0 },
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   [ PIPE_FORMAT_R16_SSCALED ] =           { SVGA3D_R16_SINT,            SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R16G16_SSCALED ] =        { SVGA3D_R16G16_SINT,         SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R16G16B16_SSCALED ] =     { SVGA3D_R16G16B16A16_SINT,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 | VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R16G16B16A16_SSCALED ] =  { SVGA3D_R16G16B16A16_SINT,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R8_UNORM ] =              { SVGA3D_R8_UNORM,            SVGA3D_R8_UNORM,             SVGA3D_R8_UNORM,             TF_GEN_MIPS },
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   [ PIPE_FORMAT_R8G8_UNORM ] =            { SVGA3D_R8G8_UNORM,          SVGA3D_R8G8_UNORM,           SVGA3D_R8G8_UNORM,           TF_GEN_MIPS },
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   [ PIPE_FORMAT_R8G8B8_UNORM ] =          { SVGA3D_R8G8B8A8_UNORM,      SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 },
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   [ PIPE_FORMAT_R8G8B8A8_UNORM ] =        { SVGA3D_R8G8B8A8_UNORM,      SVGA3D_R8G8B8A8_UNORM,       SVGA3D_R8G8B8A8_UNORM,       TF_GEN_MIPS },
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   [ PIPE_FORMAT_R8_USCALED ] =            { SVGA3D_R8_UINT,             SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R8G8_USCALED ] =          { SVGA3D_R8G8_UINT,           SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R8G8B8_USCALED ] =        { SVGA3D_R8G8B8A8_UINT,       SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 | VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R8G8B8A8_USCALED ] =      { SVGA3D_R8G8B8A8_UINT,       SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_U_TO_F_CAST },
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   [ PIPE_FORMAT_R8_SNORM ] =              { SVGA3D_R8_SNORM,            SVGA3D_R8_SNORM,             SVGA3D_R8_SNORM,             0 },
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   [ PIPE_FORMAT_R8G8_SNORM ] =            { SVGA3D_R8G8_SNORM,          SVGA3D_R8G8_SNORM,           SVGA3D_R8G8_SNORM,           0 },
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   [ PIPE_FORMAT_R8G8B8_SNORM ] =          { SVGA3D_R8G8B8A8_SNORM,      SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 },
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   [ PIPE_FORMAT_R8G8B8A8_SNORM ] =        { SVGA3D_R8G8B8A8_SNORM,      SVGA3D_R8G8B8A8_SNORM,       SVGA3D_R8G8B8A8_SNORM,       0 },
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   [ PIPE_FORMAT_R8_SSCALED ] =            { SVGA3D_R8_SINT,             SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R8G8_SSCALED ] =          { SVGA3D_R8G8_SINT,           SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R8G8B8_SSCALED ] =        { SVGA3D_R8G8B8A8_SINT,       SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 | VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R8G8B8A8_SSCALED ] =      { SVGA3D_R8G8B8A8_SINT,       SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_I_TO_F_CAST },
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   [ PIPE_FORMAT_R16_FLOAT ] =             { SVGA3D_R16_FLOAT,           SVGA3D_R16_FLOAT,            SVGA3D_R16_FLOAT,            TF_GEN_MIPS },
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   [ PIPE_FORMAT_R16G16_FLOAT ] =          { SVGA3D_R16G16_FLOAT,        SVGA3D_R16G16_FLOAT,         SVGA3D_R16G16_FLOAT,         TF_GEN_MIPS },
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   [ PIPE_FORMAT_R16G16B16_FLOAT ] =       { SVGA3D_R16G16B16A16_FLOAT,  SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 },
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   [ PIPE_FORMAT_R16G16B16A16_FLOAT ] =    { SVGA3D_R16G16B16A16_FLOAT,  SVGA3D_R16G16B16A16_FLOAT,   SVGA3D_R16G16B16A16_FLOAT,   TF_GEN_MIPS },
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   [ PIPE_FORMAT_B8G8R8A8_SRGB ] =         { SVGA3D_FORMAT_INVALID,      SVGA3D_B8G8R8A8_UNORM_SRGB,  SVGA3D_FORMAT_INVALID,       TF_GEN_MIPS },
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   [ PIPE_FORMAT_B8G8R8X8_SRGB ] =         { SVGA3D_FORMAT_INVALID,      SVGA3D_B8G8R8X8_UNORM_SRGB,  SVGA3D_FORMAT_INVALID,       TF_GEN_MIPS },
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   [ PIPE_FORMAT_R8G8B8A8_SRGB ] =         { SVGA3D_FORMAT_INVALID,      SVGA3D_R8G8B8A8_UNORM_SRGB,  SVGA3D_FORMAT_INVALID,       TF_GEN_MIPS },
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   [ PIPE_FORMAT_DXT1_RGB ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_BC1_UNORM,            SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_DXT1_RGBA ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_BC1_UNORM,            SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_DXT3_RGBA ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_BC2_UNORM,            SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_DXT5_RGBA ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_BC3_UNORM,            SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_DXT1_SRGB ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_BC1_UNORM_SRGB,       SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_DXT1_SRGBA ] =            { SVGA3D_FORMAT_INVALID,      SVGA3D_BC1_UNORM_SRGB,       SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_DXT3_SRGBA ] =            { SVGA3D_FORMAT_INVALID,      SVGA3D_BC2_UNORM_SRGB,       SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_DXT5_SRGBA ] =            { SVGA3D_FORMAT_INVALID,      SVGA3D_BC3_UNORM_SRGB,       SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_RGTC1_UNORM ] =           { SVGA3D_FORMAT_INVALID,      SVGA3D_BC4_UNORM,            SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_RGTC1_SNORM ] =           { SVGA3D_FORMAT_INVALID,      SVGA3D_BC4_SNORM,            SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_RGTC2_UNORM ] =           { SVGA3D_FORMAT_INVALID,      SVGA3D_BC5_UNORM,            SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_RGTC2_SNORM ] =           { SVGA3D_FORMAT_INVALID,      SVGA3D_BC5_SNORM,            SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_R10G10B10A2_USCALED ] =   { SVGA3D_R10G10B10A2_UNORM,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_PUINT_TO_USCALED },
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   [ PIPE_FORMAT_R11G11B10_FLOAT ] =       { SVGA3D_FORMAT_INVALID,      SVGA3D_R11G11B10_FLOAT,      SVGA3D_R11G11B10_FLOAT,      TF_GEN_MIPS },
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   [ PIPE_FORMAT_R9G9B9E5_FLOAT ] =        { SVGA3D_FORMAT_INVALID,      SVGA3D_R9G9B9E5_SHAREDEXP,   SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_Z32_FLOAT_S8X24_UINT ] =  { SVGA3D_FORMAT_INVALID,      SVGA3D_D32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID,       0 },
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   [ PIPE_FORMAT_B10G10R10A2_UNORM ] =     { SVGA3D_R10G10B10A2_UNORM,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_BGRA },
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   [ PIPE_FORMAT_L16A16_UNORM ] =          { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16G16_UNORM,         TF_XXXY },
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   [ PIPE_FORMAT_A16_UNORM ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_UNORM,            TF_000X },
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   [ PIPE_FORMAT_I16_UNORM ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_UNORM,            TF_XXXX },
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   [ PIPE_FORMAT_A16_FLOAT ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_FLOAT,            TF_000X },
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   [ PIPE_FORMAT_L16_FLOAT ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_FLOAT,            TF_XXX1 },
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   [ PIPE_FORMAT_L16A16_FLOAT ] =          { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16G16_FLOAT,         TF_XXXY },
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   [ PIPE_FORMAT_I16_FLOAT ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_FLOAT,            TF_XXXX },
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   [ PIPE_FORMAT_A32_FLOAT ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32_FLOAT,            TF_000X },
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   [ PIPE_FORMAT_L32_FLOAT ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32_FLOAT,            TF_XXX1 },
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   [ PIPE_FORMAT_L32A32_FLOAT ] =          { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32G32_FLOAT,         TF_XXXY },
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   [ PIPE_FORMAT_I32_FLOAT ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32_FLOAT,            TF_XXXX },
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   [ PIPE_FORMAT_R10G10B10A2_SSCALED ] =   { SVGA3D_R32_UINT,            SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_PUINT_TO_SSCALED },
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   [ PIPE_FORMAT_R10G10B10A2_SNORM ] =     { SVGA3D_R10G10B10A2_UNORM,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_PUINT_TO_SNORM },
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   [ PIPE_FORMAT_B10G10R10A2_USCALED ] =   { SVGA3D_R10G10B10A2_UNORM,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_BGRA | VF_PUINT_TO_USCALED },
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   [ PIPE_FORMAT_B10G10R10A2_SSCALED ] =   { SVGA3D_R32_UINT,            SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_BGRA | VF_PUINT_TO_SSCALED },
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   [ PIPE_FORMAT_B10G10R10A2_SNORM ] =     { SVGA3D_R10G10B10A2_UNORM,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_BGRA | VF_PUINT_TO_SNORM },
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   [ PIPE_FORMAT_R8_UINT ] =               { SVGA3D_R8_UINT,             SVGA3D_R8_UINT,              SVGA3D_R8_UINT,              0 },
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   [ PIPE_FORMAT_R8G8_UINT ] =             { SVGA3D_R8G8_UINT,           SVGA3D_R8G8_UINT,            SVGA3D_R8G8_UINT,            0 },
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   [ PIPE_FORMAT_R8G8B8_UINT ] =           { SVGA3D_R8G8B8A8_UINT,       SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 },
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   [ PIPE_FORMAT_R8G8B8A8_UINT ] =         { SVGA3D_R8G8B8A8_UINT,       SVGA3D_R8G8B8A8_UINT,        SVGA3D_R8G8B8A8_UINT,        0 },
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   [ PIPE_FORMAT_R8_SINT ] =               { SVGA3D_R8_SINT,             SVGA3D_R8_SINT,              SVGA3D_R8_SINT,              0 },
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   [ PIPE_FORMAT_R8G8_SINT ] =             { SVGA3D_R8G8_SINT,           SVGA3D_R8G8_SINT,            SVGA3D_R8G8_SINT,            0 },
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   [ PIPE_FORMAT_R8G8B8_SINT ] =           { SVGA3D_R8G8B8A8_SINT,       SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 },
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   [ PIPE_FORMAT_R8G8B8A8_SINT ] =         { SVGA3D_R8G8B8A8_SINT,       SVGA3D_R8G8B8A8_SINT,        SVGA3D_R8G8B8A8_SINT,        0 },
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   [ PIPE_FORMAT_R16_UINT ] =              { SVGA3D_R16_UINT,            SVGA3D_R16_UINT,             SVGA3D_R16_UINT,             0 },
170
   [ PIPE_FORMAT_R16G16_UINT ] =           { SVGA3D_R16G16_UINT,         SVGA3D_R16G16_UINT,          SVGA3D_R16G16_UINT,          0 },
171
   [ PIPE_FORMAT_R16G16B16_UINT ] =        { SVGA3D_R16G16B16A16_UINT,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 },
172
   [ PIPE_FORMAT_R16G16B16A16_UINT ] =     { SVGA3D_R16G16B16A16_UINT,   SVGA3D_R16G16B16A16_UINT,    SVGA3D_R16G16B16A16_UINT,    0 },
173
   [ PIPE_FORMAT_R16_SINT ] =              { SVGA3D_R16_SINT,            SVGA3D_R16_SINT,             SVGA3D_R16_SINT,             0 },
174
   [ PIPE_FORMAT_R16G16_SINT ] =           { SVGA3D_R16G16_SINT,         SVGA3D_R16G16_SINT,          SVGA3D_R16G16_SINT,          0 },
175
   [ PIPE_FORMAT_R16G16B16_SINT ] =        { SVGA3D_R16G16B16A16_SINT,   SVGA3D_FORMAT_INVALID,       SVGA3D_FORMAT_INVALID,       VF_W_TO_1 },
176
   [ PIPE_FORMAT_R16G16B16A16_SINT ] =     { SVGA3D_R16G16B16A16_SINT,   SVGA3D_R16G16B16A16_SINT,    SVGA3D_R16G16B16A16_SINT,    0 },
177
   [ PIPE_FORMAT_R32_UINT ] =              { SVGA3D_R32_UINT,            SVGA3D_R32_UINT,             SVGA3D_R32_UINT,             0 },
178
   [ PIPE_FORMAT_R32G32_UINT ] =           { SVGA3D_R32G32_UINT,         SVGA3D_R32G32_UINT,          SVGA3D_R32G32_UINT,          0 },
179
   [ PIPE_FORMAT_R32G32B32_UINT ] =        { SVGA3D_R32G32B32_UINT,      SVGA3D_R32G32B32_UINT,       SVGA3D_R32G32B32_UINT,       0 },
180
   [ PIPE_FORMAT_R32G32B32A32_UINT ] =     { SVGA3D_R32G32B32A32_UINT,   SVGA3D_R32G32B32A32_UINT,    SVGA3D_R32G32B32A32_UINT,    0 },
181
   [ PIPE_FORMAT_R32_SINT ] =              { SVGA3D_R32_SINT,            SVGA3D_R32_SINT,             SVGA3D_R32_SINT,             0 },
182
   [ PIPE_FORMAT_R32G32_SINT ] =           { SVGA3D_R32G32_SINT,         SVGA3D_R32G32_SINT,          SVGA3D_R32G32_SINT,          0 },
183
   [ PIPE_FORMAT_R32G32B32_SINT ] =        { SVGA3D_R32G32B32_SINT,      SVGA3D_R32G32B32_SINT,       SVGA3D_R32G32B32_SINT,       0 },
184
   [ PIPE_FORMAT_R32G32B32A32_SINT ] =     { SVGA3D_R32G32B32A32_SINT,   SVGA3D_R32G32B32A32_SINT,    SVGA3D_R32G32B32A32_SINT,    0 },
185
   [ PIPE_FORMAT_A8_UINT ] =               { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8_UINT,              TF_000X },
186
   [ PIPE_FORMAT_I8_UINT ] =               { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8_UINT,              TF_XXXX },
187
   [ PIPE_FORMAT_L8_UINT ] =               { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8_UINT,              TF_XXX1 },
188
   [ PIPE_FORMAT_L8A8_UINT ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8G8_UINT,            TF_XXXY },
189
   [ PIPE_FORMAT_A8_SINT ] =               { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8_SINT,              TF_000X },
190
   [ PIPE_FORMAT_I8_SINT ] =               { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8_SINT,              TF_XXXX },
191
   [ PIPE_FORMAT_L8_SINT ] =               { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8_SINT,              TF_XXX1 },
192
   [ PIPE_FORMAT_L8A8_SINT ] =             { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R8G8_SINT,            TF_XXXY },
193
   [ PIPE_FORMAT_A16_UINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_UINT,             TF_000X },
194
   [ PIPE_FORMAT_I16_UINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_UINT,             TF_XXXX },
195
   [ PIPE_FORMAT_L16_UINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_UINT,             TF_XXX1 },
196
   [ PIPE_FORMAT_L16A16_UINT ] =           { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16G16_UINT,          TF_XXXY },
197
   [ PIPE_FORMAT_A16_SINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_SINT,             TF_000X },
198
   [ PIPE_FORMAT_I16_SINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_SINT,             TF_XXXX },
199
   [ PIPE_FORMAT_L16_SINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16_SINT,             TF_XXX1 },
200
   [ PIPE_FORMAT_L16A16_SINT ] =           { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R16G16_SINT,          TF_XXXY },
201
   [ PIPE_FORMAT_A32_UINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32_UINT,             TF_000X },
202
   [ PIPE_FORMAT_I32_UINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32_UINT,             TF_XXXX },
203
   [ PIPE_FORMAT_L32_UINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32_UINT,             TF_XXX1 },
204
   [ PIPE_FORMAT_L32A32_UINT ] =           { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32G32_UINT,          TF_XXXY },
205
   [ PIPE_FORMAT_A32_SINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32_SINT,             TF_000X },
206
   [ PIPE_FORMAT_I32_SINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32_SINT,             TF_XXXX },
207
   [ PIPE_FORMAT_L32_SINT ] =              { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32_SINT,             TF_XXX1 },
208
   [ PIPE_FORMAT_L32A32_SINT ] =           { SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       SVGA3D_R32G32_SINT,          TF_XXXY },
209
   [ PIPE_FORMAT_R10G10B10A2_UINT ] =      { SVGA3D_R10G10B10A2_UINT,    SVGA3D_R10G10B10A2_UINT,     SVGA3D_R10G10B10A2_UINT,     0 },
210
   /* Must specify following entry to give the sense of size of format_conversion_table[] */
211
   [ PIPE_FORMAT_COUNT ] = {SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID,    SVGA3D_FORMAT_INVALID,       0 },
212
};
213

214

215
static const struct vgpu10_format_entry *
216
svga_format_entry(enum pipe_format format)
217
{
218
   /* Sparse filling of the table requires this. */
219
   STATIC_ASSERT(SVGA3D_FORMAT_INVALID == 0);
220
   assert(format < ARRAY_SIZE(format_conversion_table));
221
   if (format >= ARRAY_SIZE(format_conversion_table))
222
      return &format_conversion_table[PIPE_FORMAT_NONE];
223
   else
224
      return &format_conversion_table[format];
225
}
226

227
/**
228
 * Translate a gallium vertex format to a vgpu10 vertex format.
229
 * Also, return any special vertex format flags.
230
 */
231
void
232
svga_translate_vertex_format_vgpu10(enum pipe_format format,
233
                                    SVGA3dSurfaceFormat *svga_format,
234
                                    unsigned *vf_flags)
235
{
236
   const struct vgpu10_format_entry *entry = svga_format_entry(format);
237

238
   *svga_format = entry->vertex_format;
239
   *vf_flags = entry->flags;
240
}
241

242

243
/**
244
 * Translate a gallium pixel format to a vgpu10 format
245
 * to be used in a shader resource view for a texture buffer.
246
 * Also return any special texture format flags such as
247
 * any special swizzle mask.
248
 */
249
void
250
svga_translate_texture_buffer_view_format(enum pipe_format format,
251
                                          SVGA3dSurfaceFormat *svga_format,
252
                                          unsigned *tf_flags)
253
{
254
   const struct vgpu10_format_entry *entry = svga_format_entry(format);
255

256
   *svga_format = entry->view_format;
257
   *tf_flags = entry->flags;
258
}
259

260

261
/**
262
 * Translate a gallium scanout format to a svga format valid
263
 * for screen target surface.
264
 */
265
static SVGA3dSurfaceFormat
266
svga_translate_screen_target_format_vgpu10(enum pipe_format format)
267
{
268
   switch (format) {
269
   case PIPE_FORMAT_B8G8R8A8_UNORM:
270
      return SVGA3D_B8G8R8A8_UNORM;
271
   case PIPE_FORMAT_B8G8R8X8_UNORM:
272
      return SVGA3D_B8G8R8X8_UNORM;
273
   case PIPE_FORMAT_B5G6R5_UNORM:
274
      return SVGA3D_R5G6B5;
275
   case PIPE_FORMAT_B5G5R5A1_UNORM:
276
      return SVGA3D_A1R5G5B5;
277
   default:
278
      debug_printf("Invalid format %s specified for screen target\n",
279
                   svga_format_name(format));
280
      return SVGA3D_FORMAT_INVALID;
281
   }
282
}
283

284
/*
285
 * Translate from gallium format to SVGA3D format.
286
 */
287
SVGA3dSurfaceFormat
288
svga_translate_format(const struct svga_screen *ss,
289
                      enum pipe_format format,
290
                      unsigned bind)
291
{
292
   const struct vgpu10_format_entry *entry = svga_format_entry(format);
293

294
   if (ss->sws->have_vgpu10) {
295
      if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
296
         return entry->vertex_format;
297
      }
298
      else if (bind & PIPE_BIND_SCANOUT) {
299
         return svga_translate_screen_target_format_vgpu10(format);
300
      }
301
      else {
302
         return entry->pixel_format;
303
      }
304
   }
305

306
   switch(format) {
307
   case PIPE_FORMAT_B8G8R8A8_UNORM:
308
      return SVGA3D_A8R8G8B8;
309
   case PIPE_FORMAT_B8G8R8X8_UNORM:
310
      return SVGA3D_X8R8G8B8;
311

312
   /* sRGB required for GL2.1 */
313
   case PIPE_FORMAT_B8G8R8A8_SRGB:
314
      return SVGA3D_A8R8G8B8;
315
   case PIPE_FORMAT_DXT1_SRGB:
316
   case PIPE_FORMAT_DXT1_SRGBA:
317
      return SVGA3D_DXT1;
318
   case PIPE_FORMAT_DXT3_SRGBA:
319
      return SVGA3D_DXT3;
320
   case PIPE_FORMAT_DXT5_SRGBA:
321
      return SVGA3D_DXT5;
322

323
   case PIPE_FORMAT_B5G6R5_UNORM:
324
      return SVGA3D_R5G6B5;
325
   case PIPE_FORMAT_B5G5R5A1_UNORM:
326
      return SVGA3D_A1R5G5B5;
327
   case PIPE_FORMAT_B4G4R4A4_UNORM:
328
      return SVGA3D_A4R4G4B4;
329

330
   case PIPE_FORMAT_R16G16B16A16_UNORM:
331
      return SVGA3D_A16B16G16R16;
332

333
   case PIPE_FORMAT_Z16_UNORM:
334
      assert(!ss->sws->have_vgpu10);
335
      return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.z16 : SVGA3D_Z_D16;
336
   case PIPE_FORMAT_S8_UINT_Z24_UNORM:
337
      assert(!ss->sws->have_vgpu10);
338
      return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.s8z24 : SVGA3D_Z_D24S8;
339
   case PIPE_FORMAT_X8Z24_UNORM:
340
      assert(!ss->sws->have_vgpu10);
341
      return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.x8z24 : SVGA3D_Z_D24X8;
342

343
   case PIPE_FORMAT_A8_UNORM:
344
      return SVGA3D_ALPHA8;
345
   case PIPE_FORMAT_L8_UNORM:
346
      return SVGA3D_LUMINANCE8;
347

348
   case PIPE_FORMAT_DXT1_RGB:
349
   case PIPE_FORMAT_DXT1_RGBA:
350
      return SVGA3D_DXT1;
351
   case PIPE_FORMAT_DXT3_RGBA:
352
      return SVGA3D_DXT3;
353
   case PIPE_FORMAT_DXT5_RGBA:
354
      return SVGA3D_DXT5;
355

356
   /* Float formats (only 1, 2 and 4-component formats supported) */
357
   case PIPE_FORMAT_R32_FLOAT:
358
      return SVGA3D_R_S23E8;
359
   case PIPE_FORMAT_R32G32_FLOAT:
360
      return SVGA3D_RG_S23E8;
361
   case PIPE_FORMAT_R32G32B32A32_FLOAT:
362
      return SVGA3D_ARGB_S23E8;
363
   case PIPE_FORMAT_R16_FLOAT:
364
      return SVGA3D_R_S10E5;
365
   case PIPE_FORMAT_R16G16_FLOAT:
366
      return SVGA3D_RG_S10E5;
367
   case PIPE_FORMAT_R16G16B16A16_FLOAT:
368
      return SVGA3D_ARGB_S10E5;
369

370
   case PIPE_FORMAT_Z32_UNORM:
371
      /* SVGA3D_Z_D32 is not yet unsupported */
372
      FALLTHROUGH;
373
   default:
374
      return SVGA3D_FORMAT_INVALID;
375
   }
376
}
377

378

379
/*
380
 * Format capability description entry.
381
 */
382
struct format_cap {
383
   const char *name;
384

385
   SVGA3dSurfaceFormat format;
386

387
   /*
388
    * Capability index corresponding to the format.
389
    */
390
   SVGA3dDevCapIndex devcap;
391

392
   /* size of each pixel/block */
393
   unsigned block_width, block_height, block_bytes;
394

395
   /*
396
    * Mask of supported SVGA3dFormatOp operations, to be inferred when the
397
    * capability is not explicitly present.
398
    */
399
   uint32 defaultOperations;
400
};
401

402

403
/*
404
 * Format capability description table.
405
 *
406
 * Ordered by increasing SVGA3dSurfaceFormat value, but with gaps.
407
 */
408
static const struct format_cap format_cap_table[] = {
409
   {
410
      "SVGA3D_FORMAT_INVALID",
411
      SVGA3D_FORMAT_INVALID, 0, 0, 0, 0, 0
412
   },
413
   {
414
      "SVGA3D_X8R8G8B8",
415
      SVGA3D_X8R8G8B8,
416
      SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8,
417
      1, 1, 4,
418
      SVGA3DFORMAT_OP_TEXTURE |
419
      SVGA3DFORMAT_OP_CUBETEXTURE |
420
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
421
      SVGA3DFORMAT_OP_DISPLAYMODE |
422
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
423
   },
424
   {
425
      "SVGA3D_A8R8G8B8",
426
      SVGA3D_A8R8G8B8,
427
      SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8,
428
      1, 1, 4,
429
      SVGA3DFORMAT_OP_TEXTURE |
430
      SVGA3DFORMAT_OP_CUBETEXTURE |
431
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
432
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
433
   },
434
   {
435
      "SVGA3D_R5G6B5",
436
      SVGA3D_R5G6B5,
437
      SVGA3D_DEVCAP_SURFACEFMT_R5G6B5,
438
      1, 1, 2,
439
      SVGA3DFORMAT_OP_TEXTURE |
440
      SVGA3DFORMAT_OP_CUBETEXTURE |
441
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
442
      SVGA3DFORMAT_OP_DISPLAYMODE |
443
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
444
   },
445
   {
446
      "SVGA3D_X1R5G5B5",
447
      SVGA3D_X1R5G5B5,
448
      SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5,
449
      1, 1, 2,
450
      SVGA3DFORMAT_OP_TEXTURE |
451
      SVGA3DFORMAT_OP_CUBETEXTURE |
452
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
453
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
454
   },
455
   {
456
      "SVGA3D_A1R5G5B5",
457
      SVGA3D_A1R5G5B5,
458
      SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5,
459
      1, 1, 2,
460
      SVGA3DFORMAT_OP_TEXTURE |
461
      SVGA3DFORMAT_OP_CUBETEXTURE |
462
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
463
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
464
   },
465
   {
466
      "SVGA3D_A4R4G4B4",
467
      SVGA3D_A4R4G4B4,
468
      SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4,
469
      1, 1, 2,
470
      SVGA3DFORMAT_OP_TEXTURE |
471
      SVGA3DFORMAT_OP_CUBETEXTURE |
472
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
473
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
474
   },
475
   {
476
      /*
477
       * SVGA3D_Z_D32 is not yet supported, and has no corresponding
478
       * SVGA3D_DEVCAP_xxx.
479
       */
480
      "SVGA3D_Z_D32",
481
      SVGA3D_Z_D32, 0, 0, 0, 0, 0
482
   },
483
   {
484
      "SVGA3D_Z_D16",
485
      SVGA3D_Z_D16,
486
      SVGA3D_DEVCAP_SURFACEFMT_Z_D16,
487
      1, 1, 2,
488
      SVGA3DFORMAT_OP_ZSTENCIL
489
   },
490
   {
491
      "SVGA3D_Z_D24S8",
492
      SVGA3D_Z_D24S8,
493
      SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8,
494
      1, 1, 4,
495
      SVGA3DFORMAT_OP_ZSTENCIL
496
   },
497
   {
498
      "SVGA3D_Z_D15S1",
499
      SVGA3D_Z_D15S1,
500
      SVGA3D_DEVCAP_MAX,
501
      1, 1, 2,
502
      SVGA3DFORMAT_OP_ZSTENCIL
503
   },
504
   {
505
      "SVGA3D_LUMINANCE8",
506
      SVGA3D_LUMINANCE8,
507
      SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8,
508
      1, 1, 1,
509
      SVGA3DFORMAT_OP_TEXTURE |
510
      SVGA3DFORMAT_OP_CUBETEXTURE |
511
      SVGA3DFORMAT_OP_VOLUMETEXTURE
512
   },
513
   {
514
      /*
515
       * SVGA3D_LUMINANCE4_ALPHA4 is not supported, and has no corresponding
516
       * SVGA3D_DEVCAP_xxx.
517
       */
518
      "SVGA3D_LUMINANCE4_ALPHA4",
519
      SVGA3D_LUMINANCE4_ALPHA4, 0, 0, 0, 0, 0
520
   },
521
   {
522
      "SVGA3D_LUMINANCE16",
523
      SVGA3D_LUMINANCE16,
524
      SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16,
525
      1, 1, 2,
526
      SVGA3DFORMAT_OP_TEXTURE |
527
      SVGA3DFORMAT_OP_CUBETEXTURE |
528
      SVGA3DFORMAT_OP_VOLUMETEXTURE
529
   },
530
   {
531
      "SVGA3D_LUMINANCE8_ALPHA8",
532
      SVGA3D_LUMINANCE8_ALPHA8,
533
      SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8,
534
      1, 1, 2,
535
      SVGA3DFORMAT_OP_TEXTURE |
536
      SVGA3DFORMAT_OP_CUBETEXTURE |
537
      SVGA3DFORMAT_OP_VOLUMETEXTURE
538
   },
539
   {
540
      "SVGA3D_DXT1",
541
      SVGA3D_DXT1,
542
      SVGA3D_DEVCAP_SURFACEFMT_DXT1,
543
      4, 4, 8,
544
      SVGA3DFORMAT_OP_TEXTURE |
545
      SVGA3DFORMAT_OP_CUBETEXTURE
546
   },
547
   {
548
      "SVGA3D_DXT2",
549
      SVGA3D_DXT2,
550
      SVGA3D_DEVCAP_SURFACEFMT_DXT2,
551
      4, 4, 8,
552
      SVGA3DFORMAT_OP_TEXTURE |
553
      SVGA3DFORMAT_OP_CUBETEXTURE
554
   },
555
   {
556
      "SVGA3D_DXT3",
557
      SVGA3D_DXT3,
558
      SVGA3D_DEVCAP_SURFACEFMT_DXT3,
559
      4, 4, 16,
560
      SVGA3DFORMAT_OP_TEXTURE |
561
      SVGA3DFORMAT_OP_CUBETEXTURE
562
   },
563
   {
564
      "SVGA3D_DXT4",
565
      SVGA3D_DXT4,
566
      SVGA3D_DEVCAP_SURFACEFMT_DXT4,
567
      4, 4, 16,
568
      SVGA3DFORMAT_OP_TEXTURE |
569
      SVGA3DFORMAT_OP_CUBETEXTURE
570
   },
571
   {
572
      "SVGA3D_DXT5",
573
      SVGA3D_DXT5,
574
      SVGA3D_DEVCAP_SURFACEFMT_DXT5,
575
      4, 4, 8,
576
      SVGA3DFORMAT_OP_TEXTURE |
577
      SVGA3DFORMAT_OP_CUBETEXTURE
578
   },
579
   {
580
      "SVGA3D_BUMPU8V8",
581
      SVGA3D_BUMPU8V8,
582
      SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8,
583
      1, 1, 2,
584
      SVGA3DFORMAT_OP_TEXTURE |
585
      SVGA3DFORMAT_OP_CUBETEXTURE |
586
      SVGA3DFORMAT_OP_VOLUMETEXTURE
587
   },
588
   {
589
      /*
590
       * SVGA3D_BUMPL6V5U5 is unsupported; it has no corresponding
591
       * SVGA3D_DEVCAP_xxx.
592
       */
593
      "SVGA3D_BUMPL6V5U5",
594
      SVGA3D_BUMPL6V5U5, 0, 0, 0, 0, 0
595
   },
596
   {
597
      "SVGA3D_BUMPX8L8V8U8",
598
      SVGA3D_BUMPX8L8V8U8,
599
      SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8,
600
      1, 1, 4,
601
      SVGA3DFORMAT_OP_TEXTURE |
602
      SVGA3DFORMAT_OP_CUBETEXTURE
603
   },
604
   {
605
      "SVGA3D_FORMAT_DEAD1",
606
      SVGA3D_FORMAT_DEAD1, 0, 0, 0, 0, 0
607
   },
608
   {
609
      "SVGA3D_ARGB_S10E5",
610
      SVGA3D_ARGB_S10E5,
611
      SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5,
612
      1, 1, 2,
613
      SVGA3DFORMAT_OP_TEXTURE |
614
      SVGA3DFORMAT_OP_CUBETEXTURE |
615
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
616
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
617
   },
618
   {
619
      "SVGA3D_ARGB_S23E8",
620
      SVGA3D_ARGB_S23E8,
621
      SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8,
622
      1, 1, 4,
623
      SVGA3DFORMAT_OP_TEXTURE |
624
      SVGA3DFORMAT_OP_CUBETEXTURE |
625
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
626
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
627
   },
628
   {
629
      "SVGA3D_A2R10G10B10",
630
      SVGA3D_A2R10G10B10,
631
      SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10,
632
      1, 1, 4,
633
      SVGA3DFORMAT_OP_TEXTURE |
634
      SVGA3DFORMAT_OP_CUBETEXTURE |
635
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
636
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
637
   },
638
   {
639
      /*
640
       * SVGA3D_V8U8 is unsupported; it has no corresponding
641
       * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPU8V8 should be used instead.
642
       */
643
      "SVGA3D_V8U8",
644
      SVGA3D_V8U8, 0, 0, 0, 0, 0
645
   },
646
   {
647
      "SVGA3D_Q8W8V8U8",
648
      SVGA3D_Q8W8V8U8,
649
      SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8,
650
      1, 1, 4,
651
      SVGA3DFORMAT_OP_TEXTURE |
652
      SVGA3DFORMAT_OP_CUBETEXTURE
653
   },
654
   {
655
      "SVGA3D_CxV8U8",
656
      SVGA3D_CxV8U8,
657
      SVGA3D_DEVCAP_SURFACEFMT_CxV8U8,
658
      1, 1, 2,
659
      SVGA3DFORMAT_OP_TEXTURE
660
   },
661
   {
662
      /*
663
       * SVGA3D_X8L8V8U8 is unsupported; it has no corresponding
664
       * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPX8L8V8U8 should be used instead.
665
       */
666
      "SVGA3D_X8L8V8U8",
667
      SVGA3D_X8L8V8U8, 0, 0, 0, 0, 0
668
   },
669
   {
670
      "SVGA3D_A2W10V10U10",
671
      SVGA3D_A2W10V10U10,
672
      SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10,
673
      1, 1, 4,
674
      SVGA3DFORMAT_OP_TEXTURE
675
   },
676
   {
677
      "SVGA3D_ALPHA8",
678
      SVGA3D_ALPHA8,
679
      SVGA3D_DEVCAP_SURFACEFMT_ALPHA8,
680
      1, 1, 1,
681
      SVGA3DFORMAT_OP_TEXTURE |
682
      SVGA3DFORMAT_OP_CUBETEXTURE |
683
      SVGA3DFORMAT_OP_VOLUMETEXTURE
684
   },
685
   {
686
      "SVGA3D_R_S10E5",
687
      SVGA3D_R_S10E5,
688
      SVGA3D_DEVCAP_SURFACEFMT_R_S10E5,
689
      1, 1, 2,
690
      SVGA3DFORMAT_OP_TEXTURE |
691
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
692
      SVGA3DFORMAT_OP_CUBETEXTURE |
693
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
694
   },
695
   {
696
      "SVGA3D_R_S23E8",
697
      SVGA3D_R_S23E8,
698
      SVGA3D_DEVCAP_SURFACEFMT_R_S23E8,
699
      1, 1, 4,
700
      SVGA3DFORMAT_OP_TEXTURE |
701
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
702
      SVGA3DFORMAT_OP_CUBETEXTURE |
703
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
704
   },
705
   {
706
      "SVGA3D_RG_S10E5",
707
      SVGA3D_RG_S10E5,
708
      SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5,
709
      1, 1, 2,
710
      SVGA3DFORMAT_OP_TEXTURE |
711
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
712
      SVGA3DFORMAT_OP_CUBETEXTURE |
713
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
714
   },
715
   {
716
      "SVGA3D_RG_S23E8",
717
      SVGA3D_RG_S23E8,
718
      SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8,
719
      1, 1, 4,
720
      SVGA3DFORMAT_OP_TEXTURE |
721
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
722
      SVGA3DFORMAT_OP_CUBETEXTURE |
723
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
724
   },
725
   {
726
      /*
727
       * SVGA3D_BUFFER is a placeholder format for index/vertex buffers.
728
       */
729
      "SVGA3D_BUFFER",
730
      SVGA3D_BUFFER, 0, 1, 1, 1, 0
731
   },
732
   {
733
      "SVGA3D_Z_D24X8",
734
      SVGA3D_Z_D24X8,
735
      SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8,
736
      1, 1, 4,
737
      SVGA3DFORMAT_OP_ZSTENCIL
738
   },
739
   {
740
      "SVGA3D_V16U16",
741
      SVGA3D_V16U16,
742
      SVGA3D_DEVCAP_SURFACEFMT_V16U16,
743
      1, 1, 4,
744
      SVGA3DFORMAT_OP_TEXTURE |
745
      SVGA3DFORMAT_OP_CUBETEXTURE |
746
      SVGA3DFORMAT_OP_VOLUMETEXTURE
747
   },
748
   {
749
      "SVGA3D_G16R16",
750
      SVGA3D_G16R16,
751
      SVGA3D_DEVCAP_SURFACEFMT_G16R16,
752
      1, 1, 4,
753
      SVGA3DFORMAT_OP_TEXTURE |
754
      SVGA3DFORMAT_OP_CUBETEXTURE |
755
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
756
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
757
   },
758
   {
759
      "SVGA3D_A16B16G16R16",
760
      SVGA3D_A16B16G16R16,
761
      SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16,
762
      1, 1, 8,
763
      SVGA3DFORMAT_OP_TEXTURE |
764
      SVGA3DFORMAT_OP_CUBETEXTURE |
765
      SVGA3DFORMAT_OP_VOLUMETEXTURE |
766
      SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET
767
   },
768
   {
769
      "SVGA3D_UYVY",
770
      SVGA3D_UYVY,
771
      SVGA3D_DEVCAP_SURFACEFMT_UYVY,
772
      0, 0, 0, 0
773
   },
774
   {
775
      "SVGA3D_YUY2",
776
      SVGA3D_YUY2,
777
      SVGA3D_DEVCAP_SURFACEFMT_YUY2,
778
      0, 0, 0, 0
779
   },
780
   {
781
      "SVGA3D_NV12",
782
      SVGA3D_NV12,
783
      SVGA3D_DEVCAP_SURFACEFMT_NV12,
784
      0, 0, 0, 0
785
   },
786
   {
787
      "SVGA3D_AYUV",
788
      SVGA3D_AYUV,
789
      SVGA3D_DEVCAP_SURFACEFMT_AYUV,
790
      0, 0, 0, 0
791
   },
792
   {
793
      "SVGA3D_R32G32B32A32_TYPELESS",
794
      SVGA3D_R32G32B32A32_TYPELESS,
795
      SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS,
796
      1, 1, 16, 0
797
   },
798
   {
799
      "SVGA3D_R32G32B32A32_UINT",
800
      SVGA3D_R32G32B32A32_UINT,
801
      SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT,
802
      1, 1, 16, 0
803
   },
804
   {
805
      "SVGA3D_R32G32B32A32_SINT",
806
      SVGA3D_R32G32B32A32_SINT,
807
      SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT,
808
      1, 1, 16, 0
809
   },
810
   {
811
      "SVGA3D_R32G32B32_TYPELESS",
812
      SVGA3D_R32G32B32_TYPELESS,
813
      SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS,
814
      1, 1, 12, 0
815
   },
816
   {
817
      "SVGA3D_R32G32B32_FLOAT",
818
      SVGA3D_R32G32B32_FLOAT,
819
      SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT,
820
      1, 1, 12, 0
821
   },
822
   {
823
      "SVGA3D_R32G32B32_UINT",
824
      SVGA3D_R32G32B32_UINT,
825
      SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT,
826
      1, 1, 12, 0
827
   },
828
   {
829
      "SVGA3D_R32G32B32_SINT",
830
      SVGA3D_R32G32B32_SINT,
831
      SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT,
832
      1, 1, 12, 0
833
   },
834
   {
835
      "SVGA3D_R16G16B16A16_TYPELESS",
836
      SVGA3D_R16G16B16A16_TYPELESS,
837
      SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS,
838
      1, 1, 8, 0
839
   },
840
   {
841
      "SVGA3D_R16G16B16A16_UINT",
842
      SVGA3D_R16G16B16A16_UINT,
843
      SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT,
844
      1, 1, 8, 0
845
   },
846
   {
847
      "SVGA3D_R16G16B16A16_SNORM",
848
      SVGA3D_R16G16B16A16_SNORM,
849
      SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM,
850
      1, 1, 8, 0
851
   },
852
   {
853
      "SVGA3D_R16G16B16A16_SINT",
854
      SVGA3D_R16G16B16A16_SINT,
855
      SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT,
856
      1, 1, 8, 0
857
   },
858
   {
859
      "SVGA3D_R32G32_TYPELESS",
860
      SVGA3D_R32G32_TYPELESS,
861
      SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS,
862
      1, 1, 8, 0
863
   },
864
   {
865
      "SVGA3D_R32G32_UINT",
866
      SVGA3D_R32G32_UINT,
867
      SVGA3D_DEVCAP_DXFMT_R32G32_UINT,
868
      1, 1, 8, 0
869
   },
870
   {
871
      "SVGA3D_R32G32_SINT",
872
      SVGA3D_R32G32_SINT,
873
      SVGA3D_DEVCAP_DXFMT_R32G32_SINT,
874
      1, 1, 8,
875
      0
876
   },
877
   {
878
      "SVGA3D_R32G8X24_TYPELESS",
879
      SVGA3D_R32G8X24_TYPELESS,
880
      SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS,
881
      1, 1, 8, 0
882
   },
883
   {
884
      "SVGA3D_D32_FLOAT_S8X24_UINT",
885
      SVGA3D_D32_FLOAT_S8X24_UINT,
886
      SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT,
887
      1, 1, 8, 0
888
   },
889
   {
890
      "SVGA3D_R32_FLOAT_X8X24",
891
      SVGA3D_R32_FLOAT_X8X24,
892
      SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24,
893
      1, 1, 8, 0
894
   },
895
   {
896
      "SVGA3D_X32_G8X24_UINT",
897
      SVGA3D_X32_G8X24_UINT,
898
      SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT,
899
      1, 1, 4, 0
900
   },
901
   {
902
      "SVGA3D_R10G10B10A2_TYPELESS",
903
      SVGA3D_R10G10B10A2_TYPELESS,
904
      SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS,
905
      1, 1, 4, 0
906
   },
907
   {
908
      "SVGA3D_R10G10B10A2_UINT",
909
      SVGA3D_R10G10B10A2_UINT,
910
      SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT,
911
      1, 1, 4, 0
912
   },
913
   {
914
      "SVGA3D_R11G11B10_FLOAT",
915
      SVGA3D_R11G11B10_FLOAT,
916
      SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
917
      1, 1, 4, 0
918
   },
919
   {
920
      "SVGA3D_R8G8B8A8_TYPELESS",
921
      SVGA3D_R8G8B8A8_TYPELESS,
922
      SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS,
923
      1, 1, 4, 0
924
   },
925
   {
926
      "SVGA3D_R8G8B8A8_UNORM",
927
      SVGA3D_R8G8B8A8_UNORM,
928
      SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM,
929
      1, 1, 4, 0
930
   },
931
   {
932
      "SVGA3D_R8G8B8A8_UNORM_SRGB",
933
      SVGA3D_R8G8B8A8_UNORM_SRGB,
934
      SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB,
935
      1, 1, 4, 0
936
   },
937
   {
938
      "SVGA3D_R8G8B8A8_UINT",
939
      SVGA3D_R8G8B8A8_UINT,
940
      SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT,
941
      1, 1, 4, 0
942
      },
943
   {
944
      "SVGA3D_R8G8B8A8_SINT",
945
      SVGA3D_R8G8B8A8_SINT,
946
      SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT,
947
      1, 1, 4, 0
948
   },
949
   {
950
      "SVGA3D_R16G16_TYPELESS",
951
      SVGA3D_R16G16_TYPELESS,
952
      SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS,
953
      1, 1, 4, 0
954
   },
955
   {
956
      "SVGA3D_R16G16_UINT",
957
      SVGA3D_R16G16_UINT,
958
      SVGA3D_DEVCAP_DXFMT_R16G16_UINT,
959
      1, 1, 4, 0
960
   },
961
   {
962
      "SVGA3D_R16G16_SINT",
963
      SVGA3D_R16G16_SINT,
964
      SVGA3D_DEVCAP_DXFMT_R16G16_SINT,
965
      1, 1, 4, 0
966
   },
967
   {
968
      "SVGA3D_R32_TYPELESS",
969
      SVGA3D_R32_TYPELESS,
970
      SVGA3D_DEVCAP_DXFMT_R32_TYPELESS,
971
      1, 1, 4, 0
972
   },
973
   {
974
      "SVGA3D_D32_FLOAT",
975
      SVGA3D_D32_FLOAT,
976
      SVGA3D_DEVCAP_DXFMT_D32_FLOAT,
977
      1, 1, 4, 0
978
   },
979
   {
980
      "SVGA3D_R32_UINT",
981
      SVGA3D_R32_UINT,
982
      SVGA3D_DEVCAP_DXFMT_R32_UINT,
983
      1, 1, 4, 0
984
   },
985
   {
986
      "SVGA3D_R32_SINT",
987
      SVGA3D_R32_SINT,
988
      SVGA3D_DEVCAP_DXFMT_R32_SINT,
989
      1, 1, 4, 0
990
   },
991
   {
992
      "SVGA3D_R24G8_TYPELESS",
993
      SVGA3D_R24G8_TYPELESS,
994
      SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS,
995
      1, 1, 4, 0
996
   },
997
   {
998
      "SVGA3D_D24_UNORM_S8_UINT",
999
      SVGA3D_D24_UNORM_S8_UINT,
1000
      SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT,
1001
      1, 1, 4, 0
1002
   },
1003
   {
1004
      "SVGA3D_R24_UNORM_X8",
1005
      SVGA3D_R24_UNORM_X8,
1006
      SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8,
1007
      1, 1, 4, 0
1008
   },
1009
   {
1010
      "SVGA3D_X24_G8_UINT",
1011
      SVGA3D_X24_G8_UINT,
1012
      SVGA3D_DEVCAP_DXFMT_X24_G8_UINT,
1013
      1, 1, 4, 0
1014
   },
1015
   {
1016
      "SVGA3D_R8G8_TYPELESS",
1017
      SVGA3D_R8G8_TYPELESS,
1018
      SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS,
1019
      1, 1, 2, 0
1020
   },
1021
   {
1022
      "SVGA3D_R8G8_UNORM",
1023
      SVGA3D_R8G8_UNORM,
1024
      SVGA3D_DEVCAP_DXFMT_R8G8_UNORM,
1025
      1, 1, 2, 0
1026
   },
1027
   {
1028
      "SVGA3D_R8G8_UINT",
1029
      SVGA3D_R8G8_UINT,
1030
      SVGA3D_DEVCAP_DXFMT_R8G8_UINT,
1031
      1, 1, 2, 0
1032
   },
1033
   {
1034
      "SVGA3D_R8G8_SINT",
1035
      SVGA3D_R8G8_SINT,
1036
      SVGA3D_DEVCAP_DXFMT_R8G8_SINT,
1037
      1, 1, 2, 0
1038
   },
1039
   {
1040
      "SVGA3D_R16_TYPELESS",
1041
      SVGA3D_R16_TYPELESS,
1042
      SVGA3D_DEVCAP_DXFMT_R16_TYPELESS,
1043
      1, 1, 2, 0
1044
   },
1045
   {
1046
      "SVGA3D_R16_UNORM",
1047
      SVGA3D_R16_UNORM,
1048
      SVGA3D_DEVCAP_DXFMT_R16_UNORM,
1049
      1, 1, 2, 0
1050
   },
1051
   {
1052
      "SVGA3D_R16_UINT",
1053
      SVGA3D_R16_UINT,
1054
      SVGA3D_DEVCAP_DXFMT_R16_UINT,
1055
      1, 1, 2, 0
1056
   },
1057
   {
1058
      "SVGA3D_R16_SNORM",
1059
      SVGA3D_R16_SNORM,
1060
      SVGA3D_DEVCAP_DXFMT_R16_SNORM,
1061
      1, 1, 2, 0
1062
   },
1063
   {
1064
      "SVGA3D_R16_SINT",
1065
      SVGA3D_R16_SINT,
1066
      SVGA3D_DEVCAP_DXFMT_R16_SINT,
1067
      1, 1, 2, 0
1068
   },
1069
   {
1070
      "SVGA3D_R8_TYPELESS",
1071
      SVGA3D_R8_TYPELESS,
1072
      SVGA3D_DEVCAP_DXFMT_R8_TYPELESS,
1073
      1, 1, 1, 0
1074
   },
1075
   {
1076
      "SVGA3D_R8_UNORM",
1077
      SVGA3D_R8_UNORM,
1078
      SVGA3D_DEVCAP_DXFMT_R8_UNORM,
1079
      1, 1, 1, 0
1080
   },
1081
   {
1082
      "SVGA3D_R8_UINT",
1083
      SVGA3D_R8_UINT,
1084
      SVGA3D_DEVCAP_DXFMT_R8_UINT,
1085
      1, 1, 1, 0
1086
   },
1087
   {
1088
      "SVGA3D_R8_SNORM",
1089
      SVGA3D_R8_SNORM,
1090
      SVGA3D_DEVCAP_DXFMT_R8_SNORM,
1091
      1, 1, 1, 0
1092
   },
1093
   {
1094
      "SVGA3D_R8_SINT",
1095
      SVGA3D_R8_SINT,
1096
      SVGA3D_DEVCAP_DXFMT_R8_SINT,
1097
      1, 1, 1, 0
1098
   },
1099
   {
1100
      "SVGA3D_P8",
1101
      SVGA3D_P8, 0, 0, 0, 0, 0
1102
   },
1103
   {
1104
      "SVGA3D_R9G9B9E5_SHAREDEXP",
1105
      SVGA3D_R9G9B9E5_SHAREDEXP,
1106
      SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP,
1107
      1, 1, 4, 0
1108
   },
1109
   {
1110
      "SVGA3D_R8G8_B8G8_UNORM",
1111
      SVGA3D_R8G8_B8G8_UNORM, 0, 0, 0, 0, 0
1112
   },
1113
   {
1114
      "SVGA3D_G8R8_G8B8_UNORM",
1115
      SVGA3D_G8R8_G8B8_UNORM, 0, 0, 0, 0, 0
1116
   },
1117
   {
1118
      "SVGA3D_BC1_TYPELESS",
1119
      SVGA3D_BC1_TYPELESS,
1120
      SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS,
1121
      4, 4, 8, 0
1122
   },
1123
   {
1124
      "SVGA3D_BC1_UNORM_SRGB",
1125
      SVGA3D_BC1_UNORM_SRGB,
1126
      SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB,
1127
      4, 4, 8, 0
1128
   },
1129
   {
1130
      "SVGA3D_BC2_TYPELESS",
1131
      SVGA3D_BC2_TYPELESS,
1132
      SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS,
1133
      4, 4, 16, 0
1134
   },
1135
   {
1136
      "SVGA3D_BC2_UNORM_SRGB",
1137
      SVGA3D_BC2_UNORM_SRGB,
1138
      SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB,
1139
      4, 4, 16, 0
1140
   },
1141
   {
1142
      "SVGA3D_BC3_TYPELESS",
1143
      SVGA3D_BC3_TYPELESS,
1144
      SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS,
1145
      4, 4, 16, 0
1146
   },
1147
   {
1148
      "SVGA3D_BC3_UNORM_SRGB",
1149
      SVGA3D_BC3_UNORM_SRGB,
1150
      SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB,
1151
      4, 4, 16, 0
1152
   },
1153
   {
1154
      "SVGA3D_BC4_TYPELESS",
1155
      SVGA3D_BC4_TYPELESS,
1156
      SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS,
1157
      4, 4, 8, 0
1158
   },
1159
   {
1160
      "SVGA3D_ATI1",
1161
      SVGA3D_ATI1, 0, 0, 0, 0, 0
1162
   },
1163
   {
1164
      "SVGA3D_BC4_SNORM",
1165
      SVGA3D_BC4_SNORM,
1166
      SVGA3D_DEVCAP_DXFMT_BC4_SNORM,
1167
      4, 4, 8, 0
1168
   },
1169
   {
1170
      "SVGA3D_BC5_TYPELESS",
1171
      SVGA3D_BC5_TYPELESS,
1172
      SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS,
1173
      4, 4, 16, 0
1174
   },
1175
   {
1176
      "SVGA3D_ATI2",
1177
      SVGA3D_ATI2, 0, 0, 0, 0, 0
1178
   },
1179
   {
1180
      "SVGA3D_BC5_SNORM",
1181
      SVGA3D_BC5_SNORM,
1182
      SVGA3D_DEVCAP_DXFMT_BC5_SNORM,
1183
      4, 4, 16, 0
1184
   },
1185
   {
1186
      "SVGA3D_R10G10B10_XR_BIAS_A2_UNORM",
1187
      SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, 0, 0, 0, 0, 0
1188
   },
1189
   {
1190
      "SVGA3D_B8G8R8A8_TYPELESS",
1191
      SVGA3D_B8G8R8A8_TYPELESS,
1192
      SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS,
1193
      1, 1, 4, 0
1194
   },
1195
   {
1196
      "SVGA3D_B8G8R8A8_UNORM_SRGB",
1197
      SVGA3D_B8G8R8A8_UNORM_SRGB,
1198
      SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB,
1199
      1, 1, 4, 0
1200
   },
1201
   {
1202
      "SVGA3D_B8G8R8X8_TYPELESS",
1203
      SVGA3D_B8G8R8X8_TYPELESS,
1204
      SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS,
1205
      1, 1, 4, 0
1206
   },
1207
   {
1208
      "SVGA3D_B8G8R8X8_UNORM_SRGB",
1209
      SVGA3D_B8G8R8X8_UNORM_SRGB,
1210
      SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB,
1211
      1, 1, 4, 0
1212
   },
1213
   {
1214
      "SVGA3D_Z_DF16",
1215
      SVGA3D_Z_DF16,
1216
      SVGA3D_DEVCAP_SURFACEFMT_Z_DF16,
1217
      1, 1, 2, 0
1218
   },
1219
   {
1220
      "SVGA3D_Z_DF24",
1221
      SVGA3D_Z_DF24,
1222
      SVGA3D_DEVCAP_SURFACEFMT_Z_DF24,
1223
      1, 1, 4, 0
1224
   },
1225
   {
1226
      "SVGA3D_Z_D24S8_INT",
1227
      SVGA3D_Z_D24S8_INT,
1228
      SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT,
1229
      1, 1, 4, 0
1230
   },
1231
   {
1232
      "SVGA3D_YV12",
1233
      SVGA3D_YV12, 0, 0, 0, 0, 0
1234
   },
1235
   {
1236
      "SVGA3D_R32G32B32A32_FLOAT",
1237
      SVGA3D_R32G32B32A32_FLOAT,
1238
      SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT,
1239
      1, 1, 16, 0
1240
   },
1241
   {
1242
      "SVGA3D_R16G16B16A16_FLOAT",
1243
      SVGA3D_R16G16B16A16_FLOAT,
1244
      SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT,
1245
      1, 1, 8, 0
1246
   },
1247
   {
1248
      "SVGA3D_R16G16B16A16_UNORM",
1249
      SVGA3D_R16G16B16A16_UNORM,
1250
      SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM,
1251
      1, 1, 8, 0
1252
   },
1253
   {
1254
      "SVGA3D_R32G32_FLOAT",
1255
      SVGA3D_R32G32_FLOAT,
1256
      SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT,
1257
      1, 1, 8, 0
1258
   },
1259
   {
1260
      "SVGA3D_R10G10B10A2_UNORM",
1261
      SVGA3D_R10G10B10A2_UNORM,
1262
      SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM,
1263
      1, 1, 4, 0
1264
   },
1265
   {
1266
      "SVGA3D_R8G8B8A8_SNORM",
1267
      SVGA3D_R8G8B8A8_SNORM,
1268
      SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM,
1269
      1, 1, 4, 0
1270
   },
1271
   {
1272
      "SVGA3D_R16G16_FLOAT",
1273
      SVGA3D_R16G16_FLOAT,
1274
      SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT,
1275
      1, 1, 4, 0
1276
   },
1277
   {
1278
      "SVGA3D_R16G16_UNORM",
1279
      SVGA3D_R16G16_UNORM,
1280
      SVGA3D_DEVCAP_DXFMT_R16G16_UNORM,
1281
      1, 1, 4, 0
1282
   },
1283
   {
1284
      "SVGA3D_R16G16_SNORM",
1285
      SVGA3D_R16G16_SNORM,
1286
      SVGA3D_DEVCAP_DXFMT_R16G16_SNORM,
1287
      1, 1, 4, 0
1288
   },
1289
   {
1290
      "SVGA3D_R32_FLOAT",
1291
      SVGA3D_R32_FLOAT,
1292
      SVGA3D_DEVCAP_DXFMT_R32_FLOAT,
1293
      1, 1, 4, 0
1294
   },
1295
   {
1296
      "SVGA3D_R8G8_SNORM",
1297
      SVGA3D_R8G8_SNORM,
1298
      SVGA3D_DEVCAP_DXFMT_R8G8_SNORM,
1299
      1, 1, 2, 0
1300
   },
1301
   {
1302
      "SVGA3D_R16_FLOAT",
1303
      SVGA3D_R16_FLOAT,
1304
      SVGA3D_DEVCAP_DXFMT_R16_FLOAT,
1305
      1, 1, 2, 0
1306
   },
1307
   {
1308
      "SVGA3D_D16_UNORM",
1309
      SVGA3D_D16_UNORM,
1310
      SVGA3D_DEVCAP_DXFMT_D16_UNORM,
1311
      1, 1, 2, 0
1312
   },
1313
   {
1314
      "SVGA3D_A8_UNORM",
1315
      SVGA3D_A8_UNORM,
1316
      SVGA3D_DEVCAP_DXFMT_A8_UNORM,
1317
      1, 1, 1, 0
1318
   },
1319
   {
1320
      "SVGA3D_BC1_UNORM",
1321
      SVGA3D_BC1_UNORM,
1322
      SVGA3D_DEVCAP_DXFMT_BC1_UNORM,
1323
      4, 4, 8, 0
1324
   },
1325
   {
1326
      "SVGA3D_BC2_UNORM",
1327
      SVGA3D_BC2_UNORM,
1328
      SVGA3D_DEVCAP_DXFMT_BC2_UNORM,
1329
      4, 4, 16, 0
1330
   },
1331
   {
1332
      "SVGA3D_BC3_UNORM",
1333
      SVGA3D_BC3_UNORM,
1334
      SVGA3D_DEVCAP_DXFMT_BC3_UNORM,
1335
      4, 4, 16, 0
1336
   },
1337
   {
1338
      "SVGA3D_B5G6R5_UNORM",
1339
      SVGA3D_B5G6R5_UNORM,
1340
      SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM,
1341
      1, 1, 2, 0
1342
   },
1343
   {
1344
      "SVGA3D_B5G5R5A1_UNORM",
1345
      SVGA3D_B5G5R5A1_UNORM,
1346
      SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM,
1347
      1, 1, 2, 0
1348
   },
1349
   {
1350
      "SVGA3D_B8G8R8A8_UNORM",
1351
      SVGA3D_B8G8R8A8_UNORM,
1352
      SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM,
1353
      1, 1, 4, 0
1354
   },
1355
   {
1356
      "SVGA3D_B8G8R8X8_UNORM",
1357
      SVGA3D_B8G8R8X8_UNORM,
1358
      SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM,
1359
      1, 1, 4, 0
1360
   },
1361
   {
1362
      "SVGA3D_BC4_UNORM",
1363
     SVGA3D_BC4_UNORM,
1364
     SVGA3D_DEVCAP_DXFMT_BC4_UNORM,
1365
     4, 4, 8, 0
1366
   },
1367
   {
1368
      "SVGA3D_BC5_UNORM",
1369
     SVGA3D_BC5_UNORM,
1370
     SVGA3D_DEVCAP_DXFMT_BC5_UNORM,
1371
     4, 4, 16, 0
1372
   }
1373
};
1374

1375
static const SVGA3dSurfaceFormat compat_x8r8g8b8[] = {
1376
   SVGA3D_X8R8G8B8, SVGA3D_A8R8G8B8, SVGA3D_B8G8R8X8_UNORM,
1377
   SVGA3D_B8G8R8A8_UNORM, 0
1378
};
1379
static const SVGA3dSurfaceFormat compat_r8[] = {
1380
   SVGA3D_R8_UNORM, SVGA3D_NV12, SVGA3D_YV12, 0
1381
};
1382
static const SVGA3dSurfaceFormat compat_g8r8[] = {
1383
   SVGA3D_R8G8_UNORM, SVGA3D_NV12, 0
1384
};
1385
static const SVGA3dSurfaceFormat compat_r5g6b5[] = {
1386
   SVGA3D_R5G6B5, SVGA3D_B5G6R5_UNORM, 0
1387
};
1388

1389
static const struct format_compat_entry format_compats[] = {
1390
   {PIPE_FORMAT_B8G8R8X8_UNORM, compat_x8r8g8b8},
1391
   {PIPE_FORMAT_B8G8R8A8_UNORM, compat_x8r8g8b8},
1392
   {PIPE_FORMAT_R8_UNORM, compat_r8},
1393
   {PIPE_FORMAT_R8G8_UNORM, compat_g8r8},
1394
   {PIPE_FORMAT_B5G6R5_UNORM, compat_r5g6b5}
1395
};
1396

1397
/**
1398
 * Debug only:
1399
 * 1. check that format_cap_table[i] matches the i-th SVGA3D format.
1400
 * 2. check that format_conversion_table[i].pformat == i.
1401
 */
1402
static void
1403
check_format_tables(void)
1404
{
1405
   static boolean first_call = TRUE;
1406

1407
   if (first_call) {
1408
      unsigned i;
1409

1410
      STATIC_ASSERT(ARRAY_SIZE(format_cap_table) == SVGA3D_FORMAT_MAX);
1411
      for (i = 0; i < ARRAY_SIZE(format_cap_table); i++) {
1412
         assert(format_cap_table[i].format == i);
1413
      }
1414

1415
      first_call = FALSE;
1416
   }
1417
}
1418

1419

1420
/**
1421
 * Return string name of an SVGA3dDevCapIndex value.
1422
 * For debugging.
1423
 */
1424
static const char *
1425
svga_devcap_name(SVGA3dDevCapIndex cap)
1426
{
1427
   static const struct debug_named_value devcap_names[] = {
1428
      /* Note, we only list the DXFMT devcaps so far */
1429
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8R8G8B8),
1430
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8R8G8B8),
1431
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R5G6B5),
1432
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X1R5G5B5),
1433
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A1R5G5B5),
1434
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A4R4G4B4),
1435
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D32),
1436
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D16),
1437
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8),
1438
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D15S1),
1439
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8),
1440
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4),
1441
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE16),
1442
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8),
1443
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT1),
1444
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT2),
1445
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT3),
1446
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT4),
1447
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_DXT5),
1448
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPU8V8),
1449
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5),
1450
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8),
1451
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1),
1452
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S10E5),
1453
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ARGB_S23E8),
1454
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2R10G10B10),
1455
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V8U8),
1456
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Q8W8V8U8),
1457
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_CxV8U8),
1458
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X8L8V8U8),
1459
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A2W10V10U10),
1460
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ALPHA8),
1461
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S10E5),
1462
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R_S23E8),
1463
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S10E5),
1464
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_RG_S23E8),
1465
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BUFFER),
1466
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24X8),
1467
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_V16U16),
1468
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G16R16),
1469
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A16B16G16R16),
1470
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_UYVY),
1471
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YUY2),
1472
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_NV12),
1473
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_AYUV),
1474
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS),
1475
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT),
1476
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT),
1477
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS),
1478
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT),
1479
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT),
1480
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT),
1481
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS),
1482
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT),
1483
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM),
1484
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT),
1485
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS),
1486
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_UINT),
1487
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_SINT),
1488
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS),
1489
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT),
1490
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24),
1491
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT),
1492
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS),
1493
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT),
1494
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT),
1495
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS),
1496
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM),
1497
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB),
1498
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT),
1499
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT),
1500
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS),
1501
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UINT),
1502
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SINT),
1503
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_TYPELESS),
1504
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D32_FLOAT),
1505
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_UINT),
1506
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_SINT),
1507
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS),
1508
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT),
1509
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8),
1510
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_X24_G8_UINT),
1511
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS),
1512
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UNORM),
1513
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_UINT),
1514
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SINT),
1515
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_TYPELESS),
1516
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UNORM),
1517
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_UINT),
1518
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SNORM),
1519
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_SINT),
1520
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_TYPELESS),
1521
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UNORM),
1522
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_UINT),
1523
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SNORM),
1524
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8_SINT),
1525
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_P8),
1526
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP),
1527
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM),
1528
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM),
1529
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS),
1530
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB),
1531
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS),
1532
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB),
1533
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS),
1534
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB),
1535
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS),
1536
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI1),
1537
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_SNORM),
1538
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS),
1539
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_ATI2),
1540
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_SNORM),
1541
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM),
1542
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS),
1543
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB),
1544
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS),
1545
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB),
1546
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF16),
1547
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_DF24),
1548
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT),
1549
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_YV12),
1550
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT),
1551
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT),
1552
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM),
1553
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT),
1554
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM),
1555
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM),
1556
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT),
1557
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_UNORM),
1558
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16G16_SNORM),
1559
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R32_FLOAT),
1560
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R8G8_SNORM),
1561
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_R16_FLOAT),
1562
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_D16_UNORM),
1563
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_A8_UNORM),
1564
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC1_UNORM),
1565
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC2_UNORM),
1566
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC3_UNORM),
1567
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM),
1568
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM),
1569
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM),
1570
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM),
1571
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC4_UNORM),
1572
      DEBUG_NAMED_VALUE(SVGA3D_DEVCAP_DXFMT_BC5_UNORM),
1573
      DEBUG_NAMED_VALUE_END,
1574
   };
1575
   return debug_dump_enum(devcap_names, cap);
1576
}
1577

1578

1579
/**
1580
 * Return string for a bitmask of name of SVGA3D_DXFMT_x flags.
1581
 * For debugging.
1582
 */
1583
static const char *
1584
svga_devcap_format_flags(unsigned flags)
1585
{
1586
   static const struct debug_named_value devcap_flags[] = {
1587
      DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SUPPORTED),
1588
      DEBUG_NAMED_VALUE(SVGA3D_DXFMT_SHADER_SAMPLE),
1589
      DEBUG_NAMED_VALUE(SVGA3D_DXFMT_COLOR_RENDERTARGET),
1590
      DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DEPTH_RENDERTARGET),
1591
      DEBUG_NAMED_VALUE(SVGA3D_DXFMT_BLENDABLE),
1592
      DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MIPS),
1593
      DEBUG_NAMED_VALUE(SVGA3D_DXFMT_ARRAY),
1594
      DEBUG_NAMED_VALUE(SVGA3D_DXFMT_VOLUME),
1595
      DEBUG_NAMED_VALUE(SVGA3D_DXFMT_DX_VERTEX_BUFFER),
1596
      DEBUG_NAMED_VALUE(SVGA3D_DXFMT_MULTISAMPLE),
1597
      DEBUG_NAMED_VALUE_END
1598
   };
1599

1600
   return debug_dump_flags(devcap_flags, flags);
1601
}
1602

1603

1604
/*
1605
 * Get format capabilities from the host.  It takes in consideration
1606
 * deprecated/unsupported formats, and formats which are implicitely assumed to
1607
 * be supported when the host does not provide an explicit capability entry.
1608
 */
1609
void
1610
svga_get_format_cap(struct svga_screen *ss,
1611
                    SVGA3dSurfaceFormat format,
1612
                    SVGA3dSurfaceFormatCaps *caps)
1613
{
1614
   struct svga_winsys_screen *sws = ss->sws;
1615
   SVGA3dDevCapResult result;
1616
   const struct format_cap *entry;
1617

1618
#ifdef DEBUG
1619
   check_format_tables();
1620
#else
1621
   (void) check_format_tables;
1622
#endif
1623

1624
   assert(format < ARRAY_SIZE(format_cap_table));
1625
   entry = &format_cap_table[format];
1626
   assert(entry->format == format);
1627

1628
   if (entry->devcap && sws->get_cap(sws, entry->devcap, &result)) {
1629
      assert(format < SVGA3D_UYVY || entry->defaultOperations == 0);
1630
      caps->value = result.u;
1631
   } else {
1632
      /* Implicitly advertised format -- use default caps */
1633
      caps->value = entry->defaultOperations;
1634
   }
1635
}
1636

1637

1638
/*
1639
 * Get DX format capabilities from VGPU10 device.
1640
 */
1641
static void
1642
svga_get_dx_format_cap(struct svga_screen *ss,
1643
                       SVGA3dSurfaceFormat format,
1644
                       SVGA3dDevCapResult *caps)
1645
{
1646
   struct svga_winsys_screen *sws = ss->sws;
1647
   const struct format_cap *entry;
1648

1649
#ifdef DEBUG
1650
   check_format_tables();
1651
#else
1652
   (void) check_format_tables;
1653
#endif
1654

1655
   assert(sws->have_vgpu10);
1656
   assert(format < ARRAY_SIZE(format_cap_table));
1657
   entry = &format_cap_table[format];
1658
   assert(entry->format == format);
1659
   assert(entry->devcap > SVGA3D_DEVCAP_DXCONTEXT);
1660

1661
   caps->u = 0;
1662
   if (entry->devcap) {
1663
      sws->get_cap(sws, entry->devcap, caps);
1664

1665
      /* pre-SM41 capabable svga device supports SHADER_SAMPLE capability for
1666
       * these formats but does not advertise the devcap.
1667
       * So enable this bit here.
1668
       */
1669
      if (!sws->have_sm4_1 &&
1670
          (format == SVGA3D_R32_FLOAT_X8X24 ||
1671
           format == SVGA3D_R24_UNORM_X8)) {
1672
         caps->u |= SVGA3D_DXFMT_SHADER_SAMPLE;
1673
      }
1674
   }
1675

1676
   if (0) {
1677
      debug_printf("Format %s, devcap %s = 0x%x (%s)\n",
1678
                   svga_format_name(format),
1679
                   svga_devcap_name(entry->devcap),
1680
                   caps->u,
1681
                   svga_devcap_format_flags(caps->u));
1682
   }
1683
}
1684

1685

1686
void
1687
svga_format_size(SVGA3dSurfaceFormat format,
1688
                 unsigned *block_width,
1689
                 unsigned *block_height,
1690
                 unsigned *bytes_per_block)
1691
{
1692
   assert(format < ARRAY_SIZE(format_cap_table));
1693
   *block_width = format_cap_table[format].block_width;
1694
   *block_height = format_cap_table[format].block_height;
1695
   *bytes_per_block = format_cap_table[format].block_bytes;
1696
   /* Make sure the table entry was valid */
1697
   if (*block_width == 0)
1698
      debug_printf("Bad table entry for %s\n", svga_format_name(format));
1699
   assert(*block_width);
1700
   assert(*block_height);
1701
   assert(*bytes_per_block);
1702
}
1703

1704

1705
const char *
1706
svga_format_name(SVGA3dSurfaceFormat format)
1707
{
1708
   assert(format < ARRAY_SIZE(format_cap_table));
1709
   return format_cap_table[format].name;
1710
}
1711

1712

1713
/**
1714
 * Is the given SVGA3dSurfaceFormat a signed or unsigned integer color format?
1715
 */
1716
boolean
1717
svga_format_is_integer(SVGA3dSurfaceFormat format)
1718
{
1719
   switch (format) {
1720
   case SVGA3D_R32G32B32A32_SINT:
1721
   case SVGA3D_R32G32B32_SINT:
1722
   case SVGA3D_R32G32_SINT:
1723
   case SVGA3D_R32_SINT:
1724
   case SVGA3D_R16G16B16A16_SINT:
1725
   case SVGA3D_R16G16_SINT:
1726
   case SVGA3D_R16_SINT:
1727
   case SVGA3D_R8G8B8A8_SINT:
1728
   case SVGA3D_R8G8_SINT:
1729
   case SVGA3D_R8_SINT:
1730
   case SVGA3D_R32G32B32A32_UINT:
1731
   case SVGA3D_R32G32B32_UINT:
1732
   case SVGA3D_R32G32_UINT:
1733
   case SVGA3D_R32_UINT:
1734
   case SVGA3D_R16G16B16A16_UINT:
1735
   case SVGA3D_R16G16_UINT:
1736
   case SVGA3D_R16_UINT:
1737
   case SVGA3D_R8G8B8A8_UINT:
1738
   case SVGA3D_R8G8_UINT:
1739
   case SVGA3D_R8_UINT:
1740
   case SVGA3D_R10G10B10A2_UINT:
1741
      return TRUE;
1742
   default:
1743
      return FALSE;
1744
   }
1745
}
1746

1747
boolean
1748
svga_format_support_gen_mips(enum pipe_format format)
1749
{
1750
   const struct vgpu10_format_entry *entry = svga_format_entry(format);
1751

1752
   return (entry->flags & TF_GEN_MIPS) > 0;
1753
}
1754

1755

1756
/**
1757
 * Given a texture format, return the expected data type returned from
1758
 * the texture sampler.  For example, UNORM8 formats return floating point
1759
 * values while SINT formats returned signed integer values.
1760
 * Note: this function could be moved into the gallum u_format.[ch] code
1761
 * if it's useful to anyone else.
1762
 */
1763
enum tgsi_return_type
1764
svga_get_texture_datatype(enum pipe_format format)
1765
{
1766
   const struct util_format_description *desc = util_format_description(format);
1767
   enum tgsi_return_type t;
1768

1769
   if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ) {
1770
      if (util_format_is_depth_or_stencil(format)) {
1771
         t = TGSI_RETURN_TYPE_FLOAT; /* XXX revisit this */
1772
      }
1773
      else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
1774
         t = TGSI_RETURN_TYPE_FLOAT;
1775
      }
1776
      else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) {
1777
         t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_UNORM : TGSI_RETURN_TYPE_UINT;
1778
      }
1779
      else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
1780
         t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_SNORM : TGSI_RETURN_TYPE_SINT;
1781
      }
1782
      else {
1783
         assert(!"Unexpected channel type in svga_get_texture_datatype()");
1784
         t = TGSI_RETURN_TYPE_FLOAT;
1785
      }
1786
   }
1787
   else {
1788
      /* compressed format, shared exponent format, etc. */
1789
      switch (format) {
1790
      case PIPE_FORMAT_DXT1_RGB:
1791
      case PIPE_FORMAT_DXT1_RGBA:
1792
      case PIPE_FORMAT_DXT3_RGBA:
1793
      case PIPE_FORMAT_DXT5_RGBA:
1794
      case PIPE_FORMAT_DXT1_SRGB:
1795
      case PIPE_FORMAT_DXT1_SRGBA:
1796
      case PIPE_FORMAT_DXT3_SRGBA:
1797
      case PIPE_FORMAT_DXT5_SRGBA:
1798
      case PIPE_FORMAT_RGTC1_UNORM:
1799
      case PIPE_FORMAT_RGTC2_UNORM:
1800
      case PIPE_FORMAT_LATC1_UNORM:
1801
      case PIPE_FORMAT_LATC2_UNORM:
1802
      case PIPE_FORMAT_ETC1_RGB8:
1803
         t = TGSI_RETURN_TYPE_UNORM;
1804
         break;
1805
      case PIPE_FORMAT_RGTC1_SNORM:
1806
      case PIPE_FORMAT_RGTC2_SNORM:
1807
      case PIPE_FORMAT_LATC1_SNORM:
1808
      case PIPE_FORMAT_LATC2_SNORM:
1809
      case PIPE_FORMAT_R10G10B10X2_SNORM:
1810
         t = TGSI_RETURN_TYPE_SNORM;
1811
         break;
1812
      case PIPE_FORMAT_R11G11B10_FLOAT:
1813
      case PIPE_FORMAT_R9G9B9E5_FLOAT:
1814
         t = TGSI_RETURN_TYPE_FLOAT;
1815
         break;
1816
      default:
1817
         assert(!"Unexpected channel type in svga_get_texture_datatype()");
1818
         t = TGSI_RETURN_TYPE_FLOAT;
1819
      }
1820
   }
1821

1822
   return t;
1823
}
1824

1825

1826
/**
1827
 * Given an svga context, return true iff there are currently any integer color
1828
 * buffers attached to the framebuffer.
1829
 */
1830
boolean
1831
svga_has_any_integer_cbufs(const struct svga_context *svga)
1832
{
1833
   unsigned i;
1834
   for (i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) {
1835
      struct pipe_surface *cbuf = svga->curr.framebuffer.cbufs[i];
1836

1837
      if (cbuf && util_format_is_pure_integer(cbuf->format)) {
1838
         return TRUE;
1839
      }
1840
   }
1841
   return FALSE;
1842
}
1843

1844

1845
/**
1846
 * Given an SVGA format, return the corresponding typeless format.
1847
 * If there is no typeless format, return the format unchanged.
1848
 */
1849
SVGA3dSurfaceFormat
1850
svga_typeless_format(SVGA3dSurfaceFormat format)
1851
{
1852
   switch (format) {
1853
   case SVGA3D_R32G32B32A32_UINT:
1854
   case SVGA3D_R32G32B32A32_SINT:
1855
   case SVGA3D_R32G32B32A32_FLOAT:
1856
      return SVGA3D_R32G32B32A32_TYPELESS;
1857
   case SVGA3D_R32G32B32_FLOAT:
1858
   case SVGA3D_R32G32B32_UINT:
1859
   case SVGA3D_R32G32B32_SINT:
1860
      return SVGA3D_R32G32B32_TYPELESS;
1861
   case SVGA3D_R16G16B16A16_UINT:
1862
   case SVGA3D_R16G16B16A16_UNORM:
1863
   case SVGA3D_R16G16B16A16_SNORM:
1864
   case SVGA3D_R16G16B16A16_SINT:
1865
   case SVGA3D_R16G16B16A16_FLOAT:
1866
      return SVGA3D_R16G16B16A16_TYPELESS;
1867
   case SVGA3D_R32G32_UINT:
1868
   case SVGA3D_R32G32_SINT:
1869
   case SVGA3D_R32G32_FLOAT:
1870
      return SVGA3D_R32G32_TYPELESS;
1871
   case SVGA3D_D32_FLOAT_S8X24_UINT:
1872
   case SVGA3D_X32_G8X24_UINT:
1873
   case SVGA3D_R32G8X24_TYPELESS:
1874
      return SVGA3D_R32G8X24_TYPELESS;
1875
   case SVGA3D_R10G10B10A2_UINT:
1876
   case SVGA3D_R10G10B10A2_UNORM:
1877
      return SVGA3D_R10G10B10A2_TYPELESS;
1878
   case SVGA3D_R8G8B8A8_UNORM:
1879
   case SVGA3D_R8G8B8A8_SNORM:
1880
   case SVGA3D_R8G8B8A8_UNORM_SRGB:
1881
   case SVGA3D_R8G8B8A8_UINT:
1882
   case SVGA3D_R8G8B8A8_SINT:
1883
   case SVGA3D_R8G8B8A8_TYPELESS:
1884
      return SVGA3D_R8G8B8A8_TYPELESS;
1885
   case SVGA3D_R16G16_UINT:
1886
   case SVGA3D_R16G16_SINT:
1887
   case SVGA3D_R16G16_UNORM:
1888
   case SVGA3D_R16G16_SNORM:
1889
   case SVGA3D_R16G16_FLOAT:
1890
      return SVGA3D_R16G16_TYPELESS;
1891
   case SVGA3D_D32_FLOAT:
1892
   case SVGA3D_R32_FLOAT:
1893
   case SVGA3D_R32_UINT:
1894
   case SVGA3D_R32_SINT:
1895
   case SVGA3D_R32_TYPELESS:
1896
      return SVGA3D_R32_TYPELESS;
1897
   case SVGA3D_D24_UNORM_S8_UINT:
1898
   case SVGA3D_R24G8_TYPELESS:
1899
      return SVGA3D_R24G8_TYPELESS;
1900
   case SVGA3D_X24_G8_UINT:
1901
      return SVGA3D_R24_UNORM_X8;
1902
   case SVGA3D_R8G8_UNORM:
1903
   case SVGA3D_R8G8_SNORM:
1904
   case SVGA3D_R8G8_UINT:
1905
   case SVGA3D_R8G8_SINT:
1906
      return SVGA3D_R8G8_TYPELESS;
1907
   case SVGA3D_D16_UNORM:
1908
   case SVGA3D_R16_UNORM:
1909
   case SVGA3D_R16_UINT:
1910
   case SVGA3D_R16_SNORM:
1911
   case SVGA3D_R16_SINT:
1912
   case SVGA3D_R16_FLOAT:
1913
   case SVGA3D_R16_TYPELESS:
1914
      return SVGA3D_R16_TYPELESS;
1915
   case SVGA3D_R8_UNORM:
1916
   case SVGA3D_R8_UINT:
1917
   case SVGA3D_R8_SNORM:
1918
   case SVGA3D_R8_SINT:
1919
      return SVGA3D_R8_TYPELESS;
1920
   case SVGA3D_B8G8R8A8_UNORM_SRGB:
1921
   case SVGA3D_B8G8R8A8_UNORM:
1922
   case SVGA3D_B8G8R8A8_TYPELESS:
1923
      return SVGA3D_B8G8R8A8_TYPELESS;
1924
   case SVGA3D_B8G8R8X8_UNORM_SRGB:
1925
   case SVGA3D_B8G8R8X8_UNORM:
1926
   case SVGA3D_B8G8R8X8_TYPELESS:
1927
      return SVGA3D_B8G8R8X8_TYPELESS;
1928
   case SVGA3D_BC1_UNORM:
1929
   case SVGA3D_BC1_UNORM_SRGB:
1930
   case SVGA3D_BC1_TYPELESS:
1931
      return SVGA3D_BC1_TYPELESS;
1932
   case SVGA3D_BC2_UNORM:
1933
   case SVGA3D_BC2_UNORM_SRGB:
1934
   case SVGA3D_BC2_TYPELESS:
1935
      return SVGA3D_BC2_TYPELESS;
1936
   case SVGA3D_BC3_UNORM:
1937
   case SVGA3D_BC3_UNORM_SRGB:
1938
   case SVGA3D_BC3_TYPELESS:
1939
      return SVGA3D_BC3_TYPELESS;
1940
   case SVGA3D_BC4_UNORM:
1941
   case SVGA3D_BC4_SNORM:
1942
      return SVGA3D_BC4_TYPELESS;
1943
   case SVGA3D_BC5_UNORM:
1944
   case SVGA3D_BC5_SNORM:
1945
      return SVGA3D_BC5_TYPELESS;
1946

1947
   /* Special cases (no corresponding _TYPELESS formats) */
1948
   case SVGA3D_A8_UNORM:
1949
   case SVGA3D_B5G5R5A1_UNORM:
1950
   case SVGA3D_B5G6R5_UNORM:
1951
   case SVGA3D_R11G11B10_FLOAT:
1952
   case SVGA3D_R9G9B9E5_SHAREDEXP:
1953
      return format;
1954
   default:
1955
      debug_printf("Unexpected format %s in %s\n",
1956
                   svga_format_name(format), __FUNCTION__);
1957
      return format;
1958
   }
1959
}
1960

1961

1962
/**
1963
 * Given a surface format, return the corresponding format to use for
1964
 * a texture sampler.  In most cases, it's the format unchanged, but there
1965
 * are some special cases.
1966
 */
1967
SVGA3dSurfaceFormat
1968
svga_sampler_format(SVGA3dSurfaceFormat format)
1969
{
1970
   switch (format) {
1971
   case SVGA3D_D16_UNORM:
1972
      return SVGA3D_R16_UNORM;
1973
   case SVGA3D_D24_UNORM_S8_UINT:
1974
      return SVGA3D_R24_UNORM_X8;
1975
   case SVGA3D_D32_FLOAT:
1976
      return SVGA3D_R32_FLOAT;
1977
   case SVGA3D_D32_FLOAT_S8X24_UINT:
1978
      return SVGA3D_R32_FLOAT_X8X24;
1979
   default:
1980
      return format;
1981
   }
1982
}
1983

1984

1985
/**
1986
 * Is the given format an uncompressed snorm format?
1987
 */
1988
bool
1989
svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format)
1990
{
1991
   switch (format) {
1992
   case SVGA3D_R8G8B8A8_SNORM:
1993
   case SVGA3D_R8G8_SNORM:
1994
   case SVGA3D_R8_SNORM:
1995
   case SVGA3D_R16G16B16A16_SNORM:
1996
   case SVGA3D_R16G16_SNORM:
1997
   case SVGA3D_R16_SNORM:
1998
      return true;
1999
   default:
2000
      return false;
2001
   }
2002
}
2003

2004

2005
bool
2006
svga_format_is_typeless(SVGA3dSurfaceFormat format)
2007
{
2008
   switch (format) {
2009
   case SVGA3D_R32G32B32A32_TYPELESS:
2010
   case SVGA3D_R32G32B32_TYPELESS:
2011
   case SVGA3D_R16G16B16A16_TYPELESS:
2012
   case SVGA3D_R32G32_TYPELESS:
2013
   case SVGA3D_R32G8X24_TYPELESS:
2014
   case SVGA3D_R10G10B10A2_TYPELESS:
2015
   case SVGA3D_R8G8B8A8_TYPELESS:
2016
   case SVGA3D_R16G16_TYPELESS:
2017
   case SVGA3D_R32_TYPELESS:
2018
   case SVGA3D_R24G8_TYPELESS:
2019
   case SVGA3D_R8G8_TYPELESS:
2020
   case SVGA3D_R16_TYPELESS:
2021
   case SVGA3D_R8_TYPELESS:
2022
   case SVGA3D_BC1_TYPELESS:
2023
   case SVGA3D_BC2_TYPELESS:
2024
   case SVGA3D_BC3_TYPELESS:
2025
   case SVGA3D_BC4_TYPELESS:
2026
   case SVGA3D_BC5_TYPELESS:
2027
   case SVGA3D_B8G8R8A8_TYPELESS:
2028
   case SVGA3D_B8G8R8X8_TYPELESS:
2029
      return true;
2030
   default:
2031
      return false;
2032
   }
2033
}
2034

2035

2036
/**
2037
 * \brief Can we import a surface with a given SVGA3D format as a texture?
2038
 *
2039
 * \param ss[in]  pointer to the svga screen.
2040
 * \param pformat[in]  pipe format of the local texture.
2041
 * \param sformat[in]  svga3d format of the imported surface.
2042
 * \param bind[in]  bind flags of the imported texture.
2043
 * \param verbose[in]  Print out incompatibilities in debug mode.
2044
 */
2045
bool
2046
svga_format_is_shareable(const struct svga_screen *ss,
2047
                         enum pipe_format pformat,
2048
                         SVGA3dSurfaceFormat sformat,
2049
                         unsigned bind,
2050
                         bool verbose)
2051
{
2052
   SVGA3dSurfaceFormat default_format =
2053
      svga_translate_format(ss, pformat, bind);
2054
   int i;
2055

2056
   if (default_format == SVGA3D_FORMAT_INVALID)
2057
      return false;
2058
   if (default_format == sformat)
2059
      return true;
2060

2061
   for (i = 0; i < ARRAY_SIZE(format_compats); ++i) {
2062
      if (format_compats[i].pformat == pformat) {
2063
         const SVGA3dSurfaceFormat *compat_format =
2064
            format_compats[i].compat_format;
2065
         while (*compat_format != 0) {
2066
            if (*compat_format == sformat)
2067
               return true;
2068
            compat_format++;
2069
         }
2070
      }
2071
   }
2072

2073
   if (verbose) {
2074
      debug_printf("Incompatible imported surface format.\n");
2075
      debug_printf("Texture format: \"%s\". Imported format: \"%s\".\n",
2076
                   svga_format_name(default_format),
2077
                   svga_format_name(sformat));
2078
   }
2079

2080
   return false;
2081
}
2082

2083

2084
/**
2085
  * Return the sRGB format which corresponds to the given (linear) format.
2086
  * If there's no such sRGB format, return the format as-is.
2087
  */
2088
SVGA3dSurfaceFormat
2089
svga_linear_to_srgb(SVGA3dSurfaceFormat format)
2090
{
2091
   switch (format) {
2092
   case SVGA3D_R8G8B8A8_UNORM:
2093
      return SVGA3D_R8G8B8A8_UNORM_SRGB;
2094
   case SVGA3D_BC1_UNORM:
2095
      return SVGA3D_BC1_UNORM_SRGB;
2096
   case SVGA3D_BC2_UNORM:
2097
      return SVGA3D_BC2_UNORM_SRGB;
2098
   case SVGA3D_BC3_UNORM:
2099
      return SVGA3D_BC3_UNORM_SRGB;
2100
   case SVGA3D_B8G8R8A8_UNORM:
2101
      return SVGA3D_B8G8R8A8_UNORM_SRGB;
2102
   case SVGA3D_B8G8R8X8_UNORM:
2103
      return SVGA3D_B8G8R8X8_UNORM_SRGB;
2104
   default:
2105
      return format;
2106
   }
2107
}
2108

2109

2110
/**
2111
 * Implement pipe_screen::is_format_supported().
2112
 * \param bindings  bitmask of PIPE_BIND_x flags
2113
 */
2114
bool
2115
svga_is_format_supported(struct pipe_screen *screen,
2116
                         enum pipe_format format,
2117
                         enum pipe_texture_target target,
2118
                         unsigned sample_count,
2119
                         unsigned storage_sample_count,
2120
                         unsigned bindings)
2121
{
2122
   struct svga_screen *ss = svga_screen(screen);
2123
   SVGA3dSurfaceFormat svga_format;
2124
   SVGA3dSurfaceFormatCaps caps;
2125
   SVGA3dSurfaceFormatCaps mask;
2126

2127
   assert(bindings);
2128
   assert(!ss->sws->have_vgpu10);
2129

2130
   /* Multisamples is not supported in VGPU9 device */
2131
   if (sample_count > 1)
2132
      return false;
2133

2134
   svga_format = svga_translate_format(ss, format, bindings);
2135
   if (svga_format == SVGA3D_FORMAT_INVALID) {
2136
      return false;
2137
   }
2138

2139
   if (util_format_is_srgb(format) &&
2140
       (bindings & (PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_RENDER_TARGET))) {
2141
       /* We only support sRGB rendering with vgpu10 */
2142
      return false;
2143
   }
2144

2145
   /*
2146
    * Override host capabilities, so that we end up with the same
2147
    * visuals for all virtual hardware implementations.
2148
    */
2149
   if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2150
      switch (svga_format) {
2151
      case SVGA3D_A8R8G8B8:
2152
      case SVGA3D_X8R8G8B8:
2153
      case SVGA3D_R5G6B5:
2154
         break;
2155

2156
      /* VGPU10 formats */
2157
      case SVGA3D_B8G8R8A8_UNORM:
2158
      case SVGA3D_B8G8R8X8_UNORM:
2159
      case SVGA3D_B5G6R5_UNORM:
2160
      case SVGA3D_B8G8R8X8_UNORM_SRGB:
2161
      case SVGA3D_B8G8R8A8_UNORM_SRGB:
2162
      case SVGA3D_R8G8B8A8_UNORM_SRGB:
2163
         break;
2164

2165
      /* Often unsupported/problematic. This means we end up with the same
2166
       * visuals for all virtual hardware implementations.
2167
       */
2168
      case SVGA3D_A4R4G4B4:
2169
      case SVGA3D_A1R5G5B5:
2170
         return false;
2171

2172
      default:
2173
         return false;
2174
      }
2175
   }
2176

2177
   /*
2178
    * Query the host capabilities.
2179
    */
2180
   svga_get_format_cap(ss, svga_format, &caps);
2181

2182
   if (bindings & PIPE_BIND_RENDER_TARGET) {
2183
      /* Check that the color surface is blendable, unless it's an
2184
       * integer format.
2185
       */
2186
      if (!svga_format_is_integer(svga_format) &&
2187
          (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
2188
         return false;
2189
      }
2190
   }
2191

2192
   mask.value = 0;
2193
   if (bindings & PIPE_BIND_RENDER_TARGET)
2194
      mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
2195

2196
   if (bindings & PIPE_BIND_DEPTH_STENCIL)
2197
      mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
2198

2199
   if (bindings & PIPE_BIND_SAMPLER_VIEW)
2200
      mask.value |= SVGA3DFORMAT_OP_TEXTURE;
2201

2202
   if (target == PIPE_TEXTURE_CUBE)
2203
      mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
2204
   else if (target == PIPE_TEXTURE_3D)
2205
      mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
2206

2207
   return (caps.value & mask.value) == mask.value;
2208
}
2209

2210

2211
/**
2212
 * Implement pipe_screen::is_format_supported() for VGPU10 device.
2213
 * \param bindings  bitmask of PIPE_BIND_x flags
2214
 */
2215
bool
2216
svga_is_dx_format_supported(struct pipe_screen *screen,
2217
                            enum pipe_format format,
2218
                            enum pipe_texture_target target,
2219
                            unsigned sample_count,
2220
                            unsigned storage_sample_count,
2221
                            unsigned bindings)
2222
{
2223
   struct svga_screen *ss = svga_screen(screen);
2224
   SVGA3dSurfaceFormat svga_format;
2225
   SVGA3dDevCapResult caps;
2226
   unsigned int mask = 0;
2227

2228
   assert(bindings);
2229
   assert(ss->sws->have_vgpu10);
2230

2231
   if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
2232
      return false;
2233

2234
   if (sample_count > 1) {
2235
      /* In ms_samples, if bit N is set it means that we support
2236
       * multisample with N+1 samples per pixel.
2237
       */
2238
      if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
2239
         return false;
2240
      }
2241
      mask |= SVGA3D_DXFMT_MULTISAMPLE;
2242
   }
2243

2244
   /*
2245
    * For VGPU10 vertex formats, skip querying host capabilities
2246
    */
2247

2248
   if (bindings & PIPE_BIND_VERTEX_BUFFER) {
2249
      SVGA3dSurfaceFormat svga_format;
2250
      unsigned flags;
2251
      svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
2252
      return svga_format != SVGA3D_FORMAT_INVALID;
2253
   }
2254

2255
   if (bindings & PIPE_BIND_SAMPLER_VIEW && target == PIPE_BUFFER) {
2256
      unsigned flags;
2257
      svga_translate_texture_buffer_view_format(format, &svga_format, &flags);
2258
      return svga_format != SVGA3D_FORMAT_INVALID;
2259
   }
2260

2261
   svga_format = svga_translate_format(ss, format, bindings);
2262
   if (svga_format == SVGA3D_FORMAT_INVALID) {
2263
      return false;
2264
   }
2265

2266
   /*
2267
    * Override host capabilities, so that we end up with the same
2268
    * visuals for all virtual hardware implementations.
2269
    */
2270
   if (bindings & PIPE_BIND_DISPLAY_TARGET) {
2271
      switch (svga_format) {
2272
      case SVGA3D_A8R8G8B8:
2273
      case SVGA3D_X8R8G8B8:
2274
      case SVGA3D_R5G6B5:
2275
         break;
2276

2277
      /* VGPU10 formats */
2278
      case SVGA3D_B8G8R8A8_UNORM:
2279
      case SVGA3D_B8G8R8X8_UNORM:
2280
      case SVGA3D_B5G6R5_UNORM:
2281
      case SVGA3D_B8G8R8X8_UNORM_SRGB:
2282
      case SVGA3D_B8G8R8A8_UNORM_SRGB:
2283
      case SVGA3D_R8G8B8A8_UNORM_SRGB:
2284
         break;
2285

2286
      /* Often unsupported/problematic. This means we end up with the same
2287
       * visuals for all virtual hardware implementations.
2288
       */
2289
      case SVGA3D_A4R4G4B4:
2290
      case SVGA3D_A1R5G5B5:
2291
         return false;
2292

2293
      default:
2294
         return false;
2295
      }
2296
   }
2297

2298
   /*
2299
    * Query the host capabilities.
2300
    */
2301
   svga_get_dx_format_cap(ss, svga_format, &caps);
2302

2303
   if (bindings & PIPE_BIND_RENDER_TARGET) {
2304
      /* Check that the color surface is blendable, unless it's an
2305
       * integer format.
2306
       */
2307
      if (!(svga_format_is_integer(svga_format) ||
2308
            (caps.u & SVGA3D_DXFMT_BLENDABLE))) {
2309
         return false;
2310
      }
2311
      mask |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
2312
   }
2313

2314
   if (bindings & PIPE_BIND_DEPTH_STENCIL)
2315
      mask |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
2316

2317
   switch (target) {
2318
   case PIPE_TEXTURE_3D:
2319
      mask |= SVGA3D_DXFMT_VOLUME;
2320
      break;
2321
   case PIPE_TEXTURE_1D_ARRAY:
2322
   case PIPE_TEXTURE_2D_ARRAY:
2323
   case PIPE_TEXTURE_CUBE_ARRAY:
2324
      mask |= SVGA3D_DXFMT_ARRAY;
2325
      break;
2326
   default:
2327
      break;
2328
   }
2329

2330
   /* Is the format supported for rendering */
2331
   if ((caps.u & mask) != mask)
2332
      return false;
2333

2334
   if (bindings & PIPE_BIND_SAMPLER_VIEW) {
2335
      SVGA3dSurfaceFormat sampler_format;
2336

2337
      /* Get the sampler view format */
2338
      sampler_format = svga_sampler_format(svga_format);
2339
      if (sampler_format != svga_format) {
2340
         caps.u = 0;
2341
         svga_get_dx_format_cap(ss, sampler_format, &caps);
2342
         mask &= SVGA3D_DXFMT_VOLUME;
2343
         mask |= SVGA3D_DXFMT_SHADER_SAMPLE;
2344
         if ((caps.u & mask) != mask)
2345
            return false;
2346
      }
2347
   }
2348

2349
   return true;
2350
}
2351

2352
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