Path: blob/21.2-virgl/src/gallium/drivers/swr/rasterizer/common/simdlib.hpp
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/****************************************************************************1* Copyright (C) 2017 Intel Corporation. All Rights Reserved.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING19* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS20* IN THE SOFTWARE.21****************************************************************************/22#pragma once2324#include "simdlib_types.hpp"2526// For documentation, please see the following include...27// #include "simdlib_interface.hpp"2829namespace SIMDImpl30{31namespace SIMD128Impl32{33#if SIMD_ARCH >= SIMD_ARCH_AVX34struct AVXImpl35{36#define __SIMD_LIB_AVX_HPP__37#include "simdlib_128_avx.inl"38#undef __SIMD_LIB_AVX_HPP__39}; // struct AVXImpl40#endif // #if SIMD_ARCH >= SIMD_ARCH_AVX4142#if SIMD_ARCH >= SIMD_ARCH_AVX243struct AVX2Impl : AVXImpl44{45#define __SIMD_LIB_AVX2_HPP__46#include "simdlib_128_avx2.inl"47#undef __SIMD_LIB_AVX2_HPP__48}; // struct AVX2Impl49#endif // #if SIMD_ARCH >= SIMD_ARCH_AVX25051#if SIMD_ARCH >= SIMD_ARCH_AVX51252struct AVX512Impl : AVX2Impl53{54#if defined(SIMD_OPT_128_AVX512)55#define __SIMD_LIB_AVX512_HPP__56#include "simdlib_128_avx512.inl"57#if defined(SIMD_ARCH_KNIGHTS)58#include "simdlib_128_avx512_knights.inl"59#else // optimize for core60#include "simdlib_128_avx512_core.inl"61#endif // defined(SIMD_ARCH_KNIGHTS)62#undef __SIMD_LIB_AVX512_HPP__63#endif // SIMD_OPT_128_AVX51264}; // struct AVX2Impl65#endif // #if SIMD_ARCH >= SIMD_ARCH_AVX5126667struct Traits : SIMDImpl::Traits68{69#if SIMD_ARCH == SIMD_ARCH_AVX70using IsaImpl = AVXImpl;71#elif SIMD_ARCH == SIMD_ARCH_AVX272using IsaImpl = AVX2Impl;73#elif SIMD_ARCH == SIMD_ARCH_AVX51274using IsaImpl = AVX512Impl;75#else76#error Invalid value for SIMD_ARCH77#endif7879using Float = SIMD128Impl::Float;80using Double = SIMD128Impl::Double;81using Integer = SIMD128Impl::Integer;82using Vec4 = SIMD128Impl::Vec4;83using Mask = SIMD128Impl::Mask;84};85} // namespace SIMD128Impl8687namespace SIMD256Impl88{89#if SIMD_ARCH >= SIMD_ARCH_AVX90struct AVXImpl91{92#define __SIMD_LIB_AVX_HPP__93#include "simdlib_256_avx.inl"94#undef __SIMD_LIB_AVX_HPP__95}; // struct AVXImpl96#endif // #if SIMD_ARCH >= SIMD_ARCH_AVX9798#if SIMD_ARCH >= SIMD_ARCH_AVX299struct AVX2Impl : AVXImpl100{101#define __SIMD_LIB_AVX2_HPP__102#include "simdlib_256_avx2.inl"103#undef __SIMD_LIB_AVX2_HPP__104}; // struct AVX2Impl105#endif // #if SIMD_ARCH >= SIMD_ARCH_AVX2106107#if SIMD_ARCH >= SIMD_ARCH_AVX512108struct AVX512Impl : AVX2Impl109{110#if defined(SIMD_OPT_256_AVX512)111#define __SIMD_LIB_AVX512_HPP__112#include "simdlib_256_avx512.inl"113#if defined(SIMD_ARCH_KNIGHTS)114#include "simdlib_256_avx512_knights.inl"115#else // optimize for core116#include "simdlib_256_avx512_core.inl"117#endif // defined(SIMD_ARCH_KNIGHTS)118#undef __SIMD_LIB_AVX512_HPP__119#endif // SIMD_OPT_256_AVX512120}; // struct AVX2Impl121#endif // #if SIMD_ARCH >= SIMD_ARCH_AVX512122123struct Traits : SIMDImpl::Traits124{125#if SIMD_ARCH == SIMD_ARCH_AVX126using IsaImpl = AVXImpl;127#elif SIMD_ARCH == SIMD_ARCH_AVX2128using IsaImpl = AVX2Impl;129#elif SIMD_ARCH == SIMD_ARCH_AVX512130using IsaImpl = AVX512Impl;131#else132#error Invalid value for SIMD_ARCH133#endif134135using Float = SIMD256Impl::Float;136using Double = SIMD256Impl::Double;137using Integer = SIMD256Impl::Integer;138using Vec4 = SIMD256Impl::Vec4;139using Mask = SIMD256Impl::Mask;140};141} // namespace SIMD256Impl142143namespace SIMD512Impl144{145#if SIMD_ARCH >= SIMD_ARCH_AVX146template <typename SIMD256T>147struct AVXImplBase148{149#define __SIMD_LIB_AVX_HPP__150#include "simdlib_512_emu.inl"151#include "simdlib_512_emu_masks.inl"152#undef __SIMD_LIB_AVX_HPP__153}; // struct AVXImplBase154using AVXImpl = AVXImplBase<SIMD256Impl::AVXImpl>;155#endif // #if SIMD_ARCH >= SIMD_ARCH_AVX156157#if SIMD_ARCH >= SIMD_ARCH_AVX2158using AVX2Impl = AVXImplBase<SIMD256Impl::AVX2Impl>;159#endif // #if SIMD_ARCH >= SIMD_ARCH_AVX2160161#if SIMD_ARCH >= SIMD_ARCH_AVX512162struct AVX512Impl : AVXImplBase<SIMD256Impl::AVX512Impl>163{164#define __SIMD_LIB_AVX512_HPP__165#include "simdlib_512_avx512.inl"166#include "simdlib_512_avx512_masks.inl"167#if defined(SIMD_ARCH_KNIGHTS)168#include "simdlib_512_avx512_knights.inl"169#include "simdlib_512_avx512_masks_knights.inl"170#else // optimize for core171#include "simdlib_512_avx512_core.inl"172#include "simdlib_512_avx512_masks_core.inl"173#endif // defined(SIMD_ARCH_KNIGHTS)174#undef __SIMD_LIB_AVX512_HPP__175}; // struct AVX512ImplBase176#endif // #if SIMD_ARCH >= SIMD_ARCH_AVX512177178struct Traits : SIMDImpl::Traits179{180#if SIMD_ARCH == SIMD_ARCH_AVX181using IsaImpl = AVXImpl;182#elif SIMD_ARCH == SIMD_ARCH_AVX2183using IsaImpl = AVX2Impl;184#elif SIMD_ARCH == SIMD_ARCH_AVX512185using IsaImpl = AVX512Impl;186#else187#error Invalid value for SIMD_ARCH188#endif189190using Float = SIMD512Impl::Float;191using Double = SIMD512Impl::Double;192using Integer = SIMD512Impl::Integer;193using Vec4 = SIMD512Impl::Vec4;194using Mask = SIMD512Impl::Mask;195};196} // namespace SIMD512Impl197} // namespace SIMDImpl198199template <typename Traits>200struct SIMDBase : Traits::IsaImpl201{202using CompareType = typename Traits::CompareType;203using ScaleFactor = typename Traits::ScaleFactor;204using RoundMode = typename Traits::RoundMode;205using SIMD = typename Traits::IsaImpl;206using Float = typename Traits::Float;207using Double = typename Traits::Double;208using Integer = typename Traits::Integer;209using Vec4 = typename Traits::Vec4;210using Mask = typename Traits::Mask;211}; // struct SIMDBase212213using SIMD128 = SIMDBase<SIMDImpl::SIMD128Impl::Traits>;214using SIMD256 = SIMDBase<SIMDImpl::SIMD256Impl::Traits>;215using SIMD512 = SIMDBase<SIMDImpl::SIMD512Impl::Traits>;216217template <typename SIMD_T>218using CompareType = typename SIMD_T::CompareType;219template <typename SIMD_T>220using ScaleFactor = typename SIMD_T::ScaleFactor;221template <typename SIMD_T>222using RoundMode = typename SIMD_T::RoundMode;223template <typename SIMD_T>224using Float = typename SIMD_T::Float;225template <typename SIMD_T>226using Double = typename SIMD_T::Double;227template <typename SIMD_T>228using Integer = typename SIMD_T::Integer;229template <typename SIMD_T>230using Vec4 = typename SIMD_T::Vec4;231template <typename SIMD_T>232using Mask = typename SIMD_T::Mask;233234235236