Path: blob/21.2-virgl/src/gallium/drivers/swr/rasterizer/memory/SurfaceState.h
4574 views
/****************************************************************************1* Copyright (C) 2014-2019 Intel Corporation. All Rights Reserved.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING19* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS20* IN THE SOFTWARE.21*22* @file SurfaceState.h23*24* @brief Common definitions for surface state25*26******************************************************************************/27#pragma once2829#include "core/state.h"3031//////////////////////////////////////////////////////////////////////////32/// SWR_SURFACE_STATE33//////////////////////////////////////////////////////////////////////////34struct SWR_SURFACE_STATE35{36gfxptr_t xpBaseAddress;37SWR_SURFACE_TYPE type; // @llvm_enum38SWR_FORMAT format; // @llvm_enum39uint32_t width;40uint32_t height;41uint32_t depth;42uint32_t numSamples;43uint32_t samplePattern;44uint32_t pitch;45uint32_t qpitch;46uint32_t minLod; // for sampled surfaces, the most detailed LOD that can be accessed by sampler47uint32_t maxLod; // for sampled surfaces, the max LOD that can be accessed48float resourceMinLod; // for sampled surfaces, the most detailed fractional mip that can be49// accessed by sampler50uint32_t lod; // for render targets, the lod being rendered to51uint32_t arrayIndex; // for render targets, the array index being rendered to for arrayed surfaces52SWR_TILE_MODE tileMode; // @llvm_enum53uint32_t halign;54uint32_t valign;55uint32_t xOffset;56uint32_t yOffset;5758uint32_t lodOffsets[2][15]; // lod offsets for sampled surfaces5960gfxptr_t xpAuxBaseAddress; // Used for compression, append/consume counter, etc.61SWR_AUX_MODE auxMode; // @llvm_enum626364bool bInterleavedSamples; // are MSAA samples stored interleaved or planar65};6667