Path: blob/21.2-virgl/src/gallium/drivers/swr/swr_state.h
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/****************************************************************************1* Copyright (C) 2015 Intel Corporation. All Rights Reserved.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING19* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS20* IN THE SOFTWARE.21***************************************************************************/2223#ifndef SWR_STATE_H24#define SWR_STATE_H2526#include "pipe/p_defines.h"27#include "tgsi/tgsi_scan.h"28#include "tgsi/tgsi_parse.h"29#include "tgsi/tgsi_dump.h"30#include "gallivm/lp_bld_init.h"31#include "gallivm/lp_bld_tgsi.h"32#include "util/crc32.h"33#include "api.h"34#include "swr_tex_sample.h"35#include "swr_shader.h"36#include <unordered_map>37#include <memory>3839template <typename T>40struct ShaderVariant {41struct gallivm_state *gallivm;42T shader;4344ShaderVariant(struct gallivm_state *gs, T code) : gallivm(gs), shader(code) {}45~ShaderVariant() { gallivm_destroy(gallivm); }46};4748using PFN_TCS_FUNC = PFN_HS_FUNC;49using PFN_TES_FUNC = PFN_DS_FUNC;5051typedef ShaderVariant<PFN_VERTEX_FUNC> VariantVS;52typedef ShaderVariant<PFN_PIXEL_KERNEL> VariantFS;53typedef ShaderVariant<PFN_GS_FUNC> VariantGS;54typedef ShaderVariant<PFN_TCS_FUNC> VariantTCS;55typedef ShaderVariant<PFN_TES_FUNC> VariantTES;5657/* skeleton */58struct swr_vertex_shader {59struct pipe_shader_state pipe;60struct lp_tgsi_info info;61std::unordered_map<swr_jit_vs_key, std::unique_ptr<VariantVS>> map;62SWR_STREAMOUT_STATE soState;63PFN_SO_FUNC soFunc[PIPE_PRIM_MAX] {0};64};6566struct swr_fragment_shader {67struct pipe_shader_state pipe;68struct lp_tgsi_info info;69uint32_t constantMask;70uint32_t flatConstantMask;71uint32_t pointSpriteMask;72std::unordered_map<swr_jit_fs_key, std::unique_ptr<VariantFS>> map;73};7475struct swr_geometry_shader {76struct pipe_shader_state pipe;77struct lp_tgsi_info info;78SWR_GS_STATE gsState;7980std::unordered_map<swr_jit_gs_key, std::unique_ptr<VariantGS>> map;81};8283struct swr_tess_control_shader {84struct pipe_shader_state pipe;85struct lp_tgsi_info info;86uint32_t vertices_per_patch;8788std::unordered_map<swr_jit_tcs_key, std::unique_ptr<VariantTCS>> map;89};9091struct swr_tess_evaluation_shader {92struct pipe_shader_state pipe;93struct lp_tgsi_info info;94SWR_TS_STATE ts_state;9596std::unordered_map<swr_jit_tes_key, std::unique_ptr<VariantTES>> map;97};9899100/* Vertex element state */101struct swr_vertex_element_state {102FETCH_COMPILE_STATE fsState;103PFN_FETCH_FUNC fsFunc {NULL};104uint32_t stream_pitch[PIPE_MAX_ATTRIBS] {0};105uint32_t min_instance_div[PIPE_MAX_ATTRIBS] {0};106uint32_t instanced_bufs {0};107std::unordered_map<swr_jit_fetch_key, PFN_FETCH_FUNC> map;108};109110struct swr_blend_state {111struct pipe_blend_state pipe;112SWR_BLEND_STATE blendState;113RENDER_TARGET_BLEND_COMPILE_STATE compileState[PIPE_MAX_COLOR_BUFS];114};115116struct swr_poly_stipple {117struct pipe_poly_stipple pipe;118bool prim_is_poly;119};120121/*122* Derived SWR API DrawState123* For convenience of making simple changes without re-deriving state.124*/125struct swr_derived_state {126SWR_RASTSTATE rastState;127SWR_VIEWPORT vp[KNOB_NUM_VIEWPORTS_SCISSORS];128SWR_VIEWPORT_MATRICES vpm;129};130131void swr_update_derived(struct pipe_context *,132const struct pipe_draw_info * = nullptr,133const struct pipe_draw_start_count_bias *draw = nullptr);134135/*136* Conversion functions: Convert mesa state defines to SWR.137*/138139static INLINE SWR_LOGIC_OP140swr_convert_logic_op(const UINT op)141{142switch (op) {143case PIPE_LOGICOP_CLEAR:144return LOGICOP_CLEAR;145case PIPE_LOGICOP_NOR:146return LOGICOP_NOR;147case PIPE_LOGICOP_AND_INVERTED:148return LOGICOP_AND_INVERTED;149case PIPE_LOGICOP_COPY_INVERTED:150return LOGICOP_COPY_INVERTED;151case PIPE_LOGICOP_AND_REVERSE:152return LOGICOP_AND_REVERSE;153case PIPE_LOGICOP_INVERT:154return LOGICOP_INVERT;155case PIPE_LOGICOP_XOR:156return LOGICOP_XOR;157case PIPE_LOGICOP_NAND:158return LOGICOP_NAND;159case PIPE_LOGICOP_AND:160return LOGICOP_AND;161case PIPE_LOGICOP_EQUIV:162return LOGICOP_EQUIV;163case PIPE_LOGICOP_NOOP:164return LOGICOP_NOOP;165case PIPE_LOGICOP_OR_INVERTED:166return LOGICOP_OR_INVERTED;167case PIPE_LOGICOP_COPY:168return LOGICOP_COPY;169case PIPE_LOGICOP_OR_REVERSE:170return LOGICOP_OR_REVERSE;171case PIPE_LOGICOP_OR:172return LOGICOP_OR;173case PIPE_LOGICOP_SET:174return LOGICOP_SET;175default:176assert(0 && "Unsupported logic op");177return LOGICOP_NOOP;178}179}180181static INLINE SWR_STENCILOP182swr_convert_stencil_op(const UINT op)183{184switch (op) {185case PIPE_STENCIL_OP_KEEP:186return STENCILOP_KEEP;187case PIPE_STENCIL_OP_ZERO:188return STENCILOP_ZERO;189case PIPE_STENCIL_OP_REPLACE:190return STENCILOP_REPLACE;191case PIPE_STENCIL_OP_INCR:192return STENCILOP_INCRSAT;193case PIPE_STENCIL_OP_DECR:194return STENCILOP_DECRSAT;195case PIPE_STENCIL_OP_INCR_WRAP:196return STENCILOP_INCR;197case PIPE_STENCIL_OP_DECR_WRAP:198return STENCILOP_DECR;199case PIPE_STENCIL_OP_INVERT:200return STENCILOP_INVERT;201default:202assert(0 && "Unsupported stencil op");203return STENCILOP_KEEP;204}205}206207static INLINE SWR_FORMAT208swr_convert_index_type(const UINT index_size)209{210switch (index_size) {211case sizeof(unsigned char):212return R8_UINT;213case sizeof(unsigned short):214return R16_UINT;215case sizeof(unsigned int):216return R32_UINT;217default:218assert(0 && "Unsupported index type");219return R32_UINT;220}221}222223224static INLINE SWR_ZFUNCTION225swr_convert_depth_func(const UINT pipe_func)226{227switch (pipe_func) {228case PIPE_FUNC_NEVER:229return ZFUNC_NEVER;230case PIPE_FUNC_LESS:231return ZFUNC_LT;232case PIPE_FUNC_EQUAL:233return ZFUNC_EQ;234case PIPE_FUNC_LEQUAL:235return ZFUNC_LE;236case PIPE_FUNC_GREATER:237return ZFUNC_GT;238case PIPE_FUNC_NOTEQUAL:239return ZFUNC_NE;240case PIPE_FUNC_GEQUAL:241return ZFUNC_GE;242case PIPE_FUNC_ALWAYS:243return ZFUNC_ALWAYS;244default:245assert(0 && "Unsupported depth func");246return ZFUNC_ALWAYS;247}248}249250251static INLINE SWR_CULLMODE252swr_convert_cull_mode(const UINT cull_face)253{254switch (cull_face) {255case PIPE_FACE_NONE:256return SWR_CULLMODE_NONE;257case PIPE_FACE_FRONT:258return SWR_CULLMODE_FRONT;259case PIPE_FACE_BACK:260return SWR_CULLMODE_BACK;261case PIPE_FACE_FRONT_AND_BACK:262return SWR_CULLMODE_BOTH;263default:264assert(0 && "Invalid cull mode");265return SWR_CULLMODE_NONE;266}267}268269static INLINE SWR_BLEND_OP270swr_convert_blend_func(const UINT blend_func)271{272switch (blend_func) {273case PIPE_BLEND_ADD:274return BLENDOP_ADD;275case PIPE_BLEND_SUBTRACT:276return BLENDOP_SUBTRACT;277case PIPE_BLEND_REVERSE_SUBTRACT:278return BLENDOP_REVSUBTRACT;279case PIPE_BLEND_MIN:280return BLENDOP_MIN;281case PIPE_BLEND_MAX:282return BLENDOP_MAX;283default:284assert(0 && "Invalid blend func");285return BLENDOP_ADD;286}287}288289static INLINE SWR_BLEND_FACTOR290swr_convert_blend_factor(const UINT blend_factor)291{292switch (blend_factor) {293case PIPE_BLENDFACTOR_ONE:294return BLENDFACTOR_ONE;295case PIPE_BLENDFACTOR_SRC_COLOR:296return BLENDFACTOR_SRC_COLOR;297case PIPE_BLENDFACTOR_SRC_ALPHA:298return BLENDFACTOR_SRC_ALPHA;299case PIPE_BLENDFACTOR_DST_ALPHA:300return BLENDFACTOR_DST_ALPHA;301case PIPE_BLENDFACTOR_DST_COLOR:302return BLENDFACTOR_DST_COLOR;303case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:304return BLENDFACTOR_SRC_ALPHA_SATURATE;305case PIPE_BLENDFACTOR_CONST_COLOR:306return BLENDFACTOR_CONST_COLOR;307case PIPE_BLENDFACTOR_CONST_ALPHA:308return BLENDFACTOR_CONST_ALPHA;309case PIPE_BLENDFACTOR_SRC1_COLOR:310return BLENDFACTOR_SRC1_COLOR;311case PIPE_BLENDFACTOR_SRC1_ALPHA:312return BLENDFACTOR_SRC1_ALPHA;313case PIPE_BLENDFACTOR_ZERO:314return BLENDFACTOR_ZERO;315case PIPE_BLENDFACTOR_INV_SRC_COLOR:316return BLENDFACTOR_INV_SRC_COLOR;317case PIPE_BLENDFACTOR_INV_SRC_ALPHA:318return BLENDFACTOR_INV_SRC_ALPHA;319case PIPE_BLENDFACTOR_INV_DST_ALPHA:320return BLENDFACTOR_INV_DST_ALPHA;321case PIPE_BLENDFACTOR_INV_DST_COLOR:322return BLENDFACTOR_INV_DST_COLOR;323case PIPE_BLENDFACTOR_INV_CONST_COLOR:324return BLENDFACTOR_INV_CONST_COLOR;325case PIPE_BLENDFACTOR_INV_CONST_ALPHA:326return BLENDFACTOR_INV_CONST_ALPHA;327case PIPE_BLENDFACTOR_INV_SRC1_COLOR:328return BLENDFACTOR_INV_SRC1_COLOR;329case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:330return BLENDFACTOR_INV_SRC1_ALPHA;331default:332assert(0 && "Invalid blend factor");333return BLENDFACTOR_ONE;334}335}336337static INLINE enum SWR_SURFACE_TYPE338swr_convert_target_type(const enum pipe_texture_target target)339{340switch (target) {341case PIPE_BUFFER:342return SURFACE_BUFFER;343case PIPE_TEXTURE_1D:344case PIPE_TEXTURE_1D_ARRAY:345return SURFACE_1D;346case PIPE_TEXTURE_2D:347case PIPE_TEXTURE_2D_ARRAY:348case PIPE_TEXTURE_RECT:349return SURFACE_2D;350case PIPE_TEXTURE_3D:351return SURFACE_3D;352case PIPE_TEXTURE_CUBE:353case PIPE_TEXTURE_CUBE_ARRAY:354return SURFACE_CUBE;355default:356assert(0);357return SURFACE_NULL;358}359}360361/*362* Convert mesa PIPE_PRIM_X to SWR enum PRIMITIVE_TOPOLOGY363*/364static INLINE enum PRIMITIVE_TOPOLOGY365swr_convert_prim_topology(const unsigned mode, const unsigned tcs_verts)366{367switch (mode) {368case PIPE_PRIM_POINTS:369return TOP_POINT_LIST;370case PIPE_PRIM_LINES:371return TOP_LINE_LIST;372case PIPE_PRIM_LINE_LOOP:373return TOP_LINE_LOOP;374case PIPE_PRIM_LINE_STRIP:375return TOP_LINE_STRIP;376case PIPE_PRIM_TRIANGLES:377return TOP_TRIANGLE_LIST;378case PIPE_PRIM_TRIANGLE_STRIP:379return TOP_TRIANGLE_STRIP;380case PIPE_PRIM_TRIANGLE_FAN:381return TOP_TRIANGLE_FAN;382case PIPE_PRIM_QUADS:383return TOP_QUAD_LIST;384case PIPE_PRIM_QUAD_STRIP:385return TOP_QUAD_STRIP;386case PIPE_PRIM_POLYGON:387return TOP_TRIANGLE_FAN; /* XXX TOP_POLYGON; */388case PIPE_PRIM_LINES_ADJACENCY:389return TOP_LINE_LIST_ADJ;390case PIPE_PRIM_LINE_STRIP_ADJACENCY:391return TOP_LISTSTRIP_ADJ;392case PIPE_PRIM_TRIANGLES_ADJACENCY:393return TOP_TRI_LIST_ADJ;394case PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY:395return TOP_TRI_STRIP_ADJ;396case PIPE_PRIM_PATCHES:397// rasterizer has a separate type for each possible number of patch vertices398return (PRIMITIVE_TOPOLOGY)((unsigned)TOP_PATCHLIST_BASE + tcs_verts);399default:400assert(0 && "Unknown topology");401return TOP_UNKNOWN;402}403};404405/*406* convert mesa PIPE_POLYGON_MODE_X to SWR enum SWR_FILLMODE407*/408static INLINE enum SWR_FILLMODE409swr_convert_fill_mode(const unsigned mode)410{411switch(mode) {412case PIPE_POLYGON_MODE_FILL:413return SWR_FILLMODE_SOLID;414case PIPE_POLYGON_MODE_LINE:415return SWR_FILLMODE_WIREFRAME;416case PIPE_POLYGON_MODE_POINT:417return SWR_FILLMODE_POINT;418default:419assert(0 && "Unknown fillmode");420return SWR_FILLMODE_SOLID; // at least do something sensible421}422}423424425#endif426427428