Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/drivers/tegra/tegra_context.c
4570 views
1
/*
2
* Copyright © 2014-2018 NVIDIA Corporation
3
*
4
* Permission is hereby granted, free of charge, to any person obtaining a
5
* copy of this software and associated documentation files (the "Software"),
6
* to deal in the Software without restriction, including without limitation
7
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
* and/or sell copies of the Software, and to permit persons to whom the
9
* Software is furnished to do so, subject to the following conditions:
10
*
11
* The above copyright notice and this permission notice (including the next
12
* paragraph) shall be included in all copies or substantial portions of the
13
* Software.
14
*
15
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21
* IN THE SOFTWARE.
22
*/
23
24
#include <inttypes.h>
25
#include <stdlib.h>
26
27
#include "util/u_debug.h"
28
#include "util/u_draw.h"
29
#include "util/u_inlines.h"
30
#include "util/u_upload_mgr.h"
31
32
#include "tegra_context.h"
33
#include "tegra_resource.h"
34
#include "tegra_screen.h"
35
36
static void
37
tegra_destroy(struct pipe_context *pcontext)
38
{
39
struct tegra_context *context = to_tegra_context(pcontext);
40
41
if (context->base.stream_uploader)
42
u_upload_destroy(context->base.stream_uploader);
43
44
context->gpu->destroy(context->gpu);
45
free(context);
46
}
47
48
static void
49
tegra_draw_vbo(struct pipe_context *pcontext,
50
const struct pipe_draw_info *pinfo,
51
unsigned drawid_offset,
52
const struct pipe_draw_indirect_info *pindirect,
53
const struct pipe_draw_start_count_bias *draws,
54
unsigned num_draws)
55
{
56
if (num_draws > 1) {
57
util_draw_multi(pcontext, pinfo, drawid_offset, pindirect, draws, num_draws);
58
return;
59
}
60
61
if (!pindirect && (!draws[0].count || !pinfo->instance_count))
62
return;
63
64
struct tegra_context *context = to_tegra_context(pcontext);
65
struct pipe_draw_indirect_info indirect;
66
struct pipe_draw_info info;
67
68
if (pinfo && ((pindirect && pindirect->buffer) || pinfo->index_size)) {
69
memcpy(&info, pinfo, sizeof(info));
70
71
if (pindirect && pindirect->buffer) {
72
memcpy(&indirect, pindirect, sizeof(indirect));
73
indirect.buffer = tegra_resource_unwrap(pindirect->buffer);
74
indirect.indirect_draw_count = tegra_resource_unwrap(pindirect->indirect_draw_count);
75
pindirect = &indirect;
76
}
77
78
if (pinfo->index_size && !pinfo->has_user_indices)
79
info.index.resource = tegra_resource_unwrap(info.index.resource);
80
81
pinfo = &info;
82
}
83
84
context->gpu->draw_vbo(context->gpu, pinfo, drawid_offset, pindirect, draws, num_draws);
85
}
86
87
static void
88
tegra_render_condition(struct pipe_context *pcontext,
89
struct pipe_query *query,
90
bool condition,
91
unsigned int mode)
92
{
93
struct tegra_context *context = to_tegra_context(pcontext);
94
95
context->gpu->render_condition(context->gpu, query, condition, mode);
96
}
97
98
static struct pipe_query *
99
tegra_create_query(struct pipe_context *pcontext, unsigned int query_type,
100
unsigned int index)
101
{
102
struct tegra_context *context = to_tegra_context(pcontext);
103
104
return context->gpu->create_query(context->gpu, query_type, index);
105
}
106
107
static struct pipe_query *
108
tegra_create_batch_query(struct pipe_context *pcontext,
109
unsigned int num_queries,
110
unsigned int *queries)
111
{
112
struct tegra_context *context = to_tegra_context(pcontext);
113
114
return context->gpu->create_batch_query(context->gpu, num_queries,
115
queries);
116
}
117
118
static void
119
tegra_destroy_query(struct pipe_context *pcontext, struct pipe_query *query)
120
{
121
struct tegra_context *context = to_tegra_context(pcontext);
122
123
context->gpu->destroy_query(context->gpu, query);
124
}
125
126
static bool
127
tegra_begin_query(struct pipe_context *pcontext, struct pipe_query *query)
128
{
129
struct tegra_context *context = to_tegra_context(pcontext);
130
131
return context->gpu->begin_query(context->gpu, query);
132
}
133
134
static bool
135
tegra_end_query(struct pipe_context *pcontext, struct pipe_query *query)
136
{
137
struct tegra_context *context = to_tegra_context(pcontext);
138
139
return context->gpu->end_query(context->gpu, query);
140
}
141
142
static bool
143
tegra_get_query_result(struct pipe_context *pcontext,
144
struct pipe_query *query,
145
bool wait,
146
union pipe_query_result *result)
147
{
148
struct tegra_context *context = to_tegra_context(pcontext);
149
150
return context->gpu->get_query_result(context->gpu, query, wait,
151
result);
152
}
153
154
static void
155
tegra_get_query_result_resource(struct pipe_context *pcontext,
156
struct pipe_query *query,
157
bool wait,
158
enum pipe_query_value_type result_type,
159
int index,
160
struct pipe_resource *resource,
161
unsigned int offset)
162
{
163
struct tegra_context *context = to_tegra_context(pcontext);
164
165
context->gpu->get_query_result_resource(context->gpu, query, wait,
166
result_type, index, resource,
167
offset);
168
}
169
170
static void
171
tegra_set_active_query_state(struct pipe_context *pcontext, bool enable)
172
{
173
struct tegra_context *context = to_tegra_context(pcontext);
174
175
context->gpu->set_active_query_state(context->gpu, enable);
176
}
177
178
static void *
179
tegra_create_blend_state(struct pipe_context *pcontext,
180
const struct pipe_blend_state *cso)
181
{
182
struct tegra_context *context = to_tegra_context(pcontext);
183
184
return context->gpu->create_blend_state(context->gpu, cso);
185
}
186
187
static void
188
tegra_bind_blend_state(struct pipe_context *pcontext, void *so)
189
{
190
struct tegra_context *context = to_tegra_context(pcontext);
191
192
context->gpu->bind_blend_state(context->gpu, so);
193
}
194
195
static void
196
tegra_delete_blend_state(struct pipe_context *pcontext, void *so)
197
{
198
struct tegra_context *context = to_tegra_context(pcontext);
199
200
context->gpu->delete_blend_state(context->gpu, so);
201
}
202
203
static void *
204
tegra_create_sampler_state(struct pipe_context *pcontext,
205
const struct pipe_sampler_state *cso)
206
{
207
struct tegra_context *context = to_tegra_context(pcontext);
208
209
return context->gpu->create_sampler_state(context->gpu, cso);
210
}
211
212
static void
213
tegra_bind_sampler_states(struct pipe_context *pcontext, unsigned shader,
214
unsigned start_slot, unsigned num_samplers,
215
void **samplers)
216
{
217
struct tegra_context *context = to_tegra_context(pcontext);
218
219
context->gpu->bind_sampler_states(context->gpu, shader, start_slot,
220
num_samplers, samplers);
221
}
222
223
static void
224
tegra_delete_sampler_state(struct pipe_context *pcontext, void *so)
225
{
226
struct tegra_context *context = to_tegra_context(pcontext);
227
228
context->gpu->delete_sampler_state(context->gpu, so);
229
}
230
231
static void *
232
tegra_create_rasterizer_state(struct pipe_context *pcontext,
233
const struct pipe_rasterizer_state *cso)
234
{
235
struct tegra_context *context = to_tegra_context(pcontext);
236
237
return context->gpu->create_rasterizer_state(context->gpu, cso);
238
}
239
240
static void
241
tegra_bind_rasterizer_state(struct pipe_context *pcontext, void *so)
242
{
243
struct tegra_context *context = to_tegra_context(pcontext);
244
245
context->gpu->bind_rasterizer_state(context->gpu, so);
246
}
247
248
static void
249
tegra_delete_rasterizer_state(struct pipe_context *pcontext, void *so)
250
{
251
struct tegra_context *context = to_tegra_context(pcontext);
252
253
context->gpu->delete_rasterizer_state(context->gpu, so);
254
}
255
256
static void *
257
tegra_create_depth_stencil_alpha_state(struct pipe_context *pcontext,
258
const struct pipe_depth_stencil_alpha_state *cso)
259
{
260
struct tegra_context *context = to_tegra_context(pcontext);
261
262
return context->gpu->create_depth_stencil_alpha_state(context->gpu, cso);
263
}
264
265
static void
266
tegra_bind_depth_stencil_alpha_state(struct pipe_context *pcontext, void *so)
267
{
268
struct tegra_context *context = to_tegra_context(pcontext);
269
270
context->gpu->bind_depth_stencil_alpha_state(context->gpu, so);
271
}
272
273
static void
274
tegra_delete_depth_stencil_alpha_state(struct pipe_context *pcontext, void *so)
275
{
276
struct tegra_context *context = to_tegra_context(pcontext);
277
278
context->gpu->delete_depth_stencil_alpha_state(context->gpu, so);
279
}
280
281
static void *
282
tegra_create_fs_state(struct pipe_context *pcontext,
283
const struct pipe_shader_state *cso)
284
{
285
struct tegra_context *context = to_tegra_context(pcontext);
286
287
return context->gpu->create_fs_state(context->gpu, cso);
288
}
289
290
static void
291
tegra_bind_fs_state(struct pipe_context *pcontext, void *so)
292
{
293
struct tegra_context *context = to_tegra_context(pcontext);
294
295
context->gpu->bind_fs_state(context->gpu, so);
296
}
297
298
static void
299
tegra_delete_fs_state(struct pipe_context *pcontext, void *so)
300
{
301
struct tegra_context *context = to_tegra_context(pcontext);
302
303
context->gpu->delete_fs_state(context->gpu, so);
304
}
305
306
static void *
307
tegra_create_vs_state(struct pipe_context *pcontext,
308
const struct pipe_shader_state *cso)
309
{
310
struct tegra_context *context = to_tegra_context(pcontext);
311
312
return context->gpu->create_vs_state(context->gpu, cso);
313
}
314
315
static void
316
tegra_bind_vs_state(struct pipe_context *pcontext, void *so)
317
{
318
struct tegra_context *context = to_tegra_context(pcontext);
319
320
context->gpu->bind_vs_state(context->gpu, so);
321
}
322
323
static void
324
tegra_delete_vs_state(struct pipe_context *pcontext, void *so)
325
{
326
struct tegra_context *context = to_tegra_context(pcontext);
327
328
context->gpu->delete_vs_state(context->gpu, so);
329
}
330
331
static void *
332
tegra_create_gs_state(struct pipe_context *pcontext,
333
const struct pipe_shader_state *cso)
334
{
335
struct tegra_context *context = to_tegra_context(pcontext);
336
337
return context->gpu->create_gs_state(context->gpu, cso);
338
}
339
340
static void
341
tegra_bind_gs_state(struct pipe_context *pcontext, void *so)
342
{
343
struct tegra_context *context = to_tegra_context(pcontext);
344
345
context->gpu->bind_gs_state(context->gpu, so);
346
}
347
348
static void
349
tegra_delete_gs_state(struct pipe_context *pcontext, void *so)
350
{
351
struct tegra_context *context = to_tegra_context(pcontext);
352
353
context->gpu->delete_gs_state(context->gpu, so);
354
}
355
356
static void *
357
tegra_create_tcs_state(struct pipe_context *pcontext,
358
const struct pipe_shader_state *cso)
359
{
360
struct tegra_context *context = to_tegra_context(pcontext);
361
362
return context->gpu->create_tcs_state(context->gpu, cso);
363
}
364
365
static void
366
tegra_bind_tcs_state(struct pipe_context *pcontext, void *so)
367
{
368
struct tegra_context *context = to_tegra_context(pcontext);
369
370
context->gpu->bind_tcs_state(context->gpu, so);
371
}
372
373
static void
374
tegra_delete_tcs_state(struct pipe_context *pcontext, void *so)
375
{
376
struct tegra_context *context = to_tegra_context(pcontext);
377
378
context->gpu->delete_tcs_state(context->gpu, so);
379
}
380
381
static void *
382
tegra_create_tes_state(struct pipe_context *pcontext,
383
const struct pipe_shader_state *cso)
384
{
385
struct tegra_context *context = to_tegra_context(pcontext);
386
387
return context->gpu->create_tes_state(context->gpu, cso);
388
}
389
390
static void
391
tegra_bind_tes_state(struct pipe_context *pcontext, void *so)
392
{
393
struct tegra_context *context = to_tegra_context(pcontext);
394
395
context->gpu->bind_tes_state(context->gpu, so);
396
}
397
398
static void
399
tegra_delete_tes_state(struct pipe_context *pcontext, void *so)
400
{
401
struct tegra_context *context = to_tegra_context(pcontext);
402
403
context->gpu->delete_tes_state(context->gpu, so);
404
}
405
406
static void *
407
tegra_create_vertex_elements_state(struct pipe_context *pcontext,
408
unsigned num_elements,
409
const struct pipe_vertex_element *elements)
410
{
411
struct tegra_context *context = to_tegra_context(pcontext);
412
413
return context->gpu->create_vertex_elements_state(context->gpu,
414
num_elements,
415
elements);
416
}
417
418
static void
419
tegra_bind_vertex_elements_state(struct pipe_context *pcontext, void *so)
420
{
421
struct tegra_context *context = to_tegra_context(pcontext);
422
423
context->gpu->bind_vertex_elements_state(context->gpu, so);
424
}
425
426
static void
427
tegra_delete_vertex_elements_state(struct pipe_context *pcontext, void *so)
428
{
429
struct tegra_context *context = to_tegra_context(pcontext);
430
431
context->gpu->delete_vertex_elements_state(context->gpu, so);
432
}
433
434
static void
435
tegra_set_blend_color(struct pipe_context *pcontext,
436
const struct pipe_blend_color *color)
437
{
438
struct tegra_context *context = to_tegra_context(pcontext);
439
440
context->gpu->set_blend_color(context->gpu, color);
441
}
442
443
static void
444
tegra_set_stencil_ref(struct pipe_context *pcontext,
445
const struct pipe_stencil_ref ref)
446
{
447
struct tegra_context *context = to_tegra_context(pcontext);
448
449
context->gpu->set_stencil_ref(context->gpu, ref);
450
}
451
452
static void
453
tegra_set_sample_mask(struct pipe_context *pcontext, unsigned int mask)
454
{
455
struct tegra_context *context = to_tegra_context(pcontext);
456
457
context->gpu->set_sample_mask(context->gpu, mask);
458
}
459
460
static void
461
tegra_set_min_samples(struct pipe_context *pcontext, unsigned int samples)
462
{
463
struct tegra_context *context = to_tegra_context(pcontext);
464
465
context->gpu->set_min_samples(context->gpu, samples);
466
}
467
468
static void
469
tegra_set_clip_state(struct pipe_context *pcontext,
470
const struct pipe_clip_state *state)
471
{
472
struct tegra_context *context = to_tegra_context(pcontext);
473
474
context->gpu->set_clip_state(context->gpu, state);
475
}
476
477
static void
478
tegra_set_constant_buffer(struct pipe_context *pcontext, unsigned int shader,
479
unsigned int index, bool take_ownership,
480
const struct pipe_constant_buffer *buf)
481
{
482
struct tegra_context *context = to_tegra_context(pcontext);
483
struct pipe_constant_buffer buffer;
484
485
if (buf && buf->buffer) {
486
memcpy(&buffer, buf, sizeof(buffer));
487
buffer.buffer = tegra_resource_unwrap(buffer.buffer);
488
buf = &buffer;
489
}
490
491
context->gpu->set_constant_buffer(context->gpu, shader, index, take_ownership, buf);
492
}
493
494
static void
495
tegra_set_framebuffer_state(struct pipe_context *pcontext,
496
const struct pipe_framebuffer_state *fb)
497
{
498
struct tegra_context *context = to_tegra_context(pcontext);
499
struct pipe_framebuffer_state state;
500
unsigned i;
501
502
if (fb) {
503
memcpy(&state, fb, sizeof(state));
504
505
for (i = 0; i < fb->nr_cbufs; i++)
506
state.cbufs[i] = tegra_surface_unwrap(fb->cbufs[i]);
507
508
while (i < PIPE_MAX_COLOR_BUFS)
509
state.cbufs[i++] = NULL;
510
511
state.zsbuf = tegra_surface_unwrap(fb->zsbuf);
512
513
fb = &state;
514
}
515
516
context->gpu->set_framebuffer_state(context->gpu, fb);
517
}
518
519
static void
520
tegra_set_polygon_stipple(struct pipe_context *pcontext,
521
const struct pipe_poly_stipple *stipple)
522
{
523
struct tegra_context *context = to_tegra_context(pcontext);
524
525
context->gpu->set_polygon_stipple(context->gpu, stipple);
526
}
527
528
static void
529
tegra_set_scissor_states(struct pipe_context *pcontext, unsigned start_slot,
530
unsigned num_scissors,
531
const struct pipe_scissor_state *scissors)
532
{
533
struct tegra_context *context = to_tegra_context(pcontext);
534
535
context->gpu->set_scissor_states(context->gpu, start_slot, num_scissors,
536
scissors);
537
}
538
539
static void
540
tegra_set_window_rectangles(struct pipe_context *pcontext, bool include,
541
unsigned int num_rectangles,
542
const struct pipe_scissor_state *rectangles)
543
{
544
struct tegra_context *context = to_tegra_context(pcontext);
545
546
context->gpu->set_window_rectangles(context->gpu, include, num_rectangles,
547
rectangles);
548
}
549
550
static void
551
tegra_set_viewport_states(struct pipe_context *pcontext, unsigned start_slot,
552
unsigned num_viewports,
553
const struct pipe_viewport_state *viewports)
554
{
555
struct tegra_context *context = to_tegra_context(pcontext);
556
557
context->gpu->set_viewport_states(context->gpu, start_slot, num_viewports,
558
viewports);
559
}
560
561
static void
562
tegra_set_sampler_views(struct pipe_context *pcontext, unsigned shader,
563
unsigned start_slot, unsigned num_views,
564
unsigned unbind_num_trailing_slots,
565
struct pipe_sampler_view **pviews)
566
{
567
struct pipe_sampler_view *views[PIPE_MAX_SHADER_SAMPLER_VIEWS];
568
struct tegra_context *context = to_tegra_context(pcontext);
569
unsigned i;
570
571
for (i = 0; i < num_views; i++)
572
views[i] = tegra_sampler_view_unwrap(pviews[i]);
573
574
context->gpu->set_sampler_views(context->gpu, shader, start_slot,
575
num_views, unbind_num_trailing_slots,
576
views);
577
}
578
579
static void
580
tegra_set_tess_state(struct pipe_context *pcontext,
581
const float default_outer_level[4],
582
const float default_inner_level[2])
583
{
584
struct tegra_context *context = to_tegra_context(pcontext);
585
586
context->gpu->set_tess_state(context->gpu, default_outer_level,
587
default_inner_level);
588
}
589
590
static void
591
tegra_set_debug_callback(struct pipe_context *pcontext,
592
const struct pipe_debug_callback *callback)
593
{
594
struct tegra_context *context = to_tegra_context(pcontext);
595
596
context->gpu->set_debug_callback(context->gpu, callback);
597
}
598
599
static void
600
tegra_set_shader_buffers(struct pipe_context *pcontext, unsigned int shader,
601
unsigned start, unsigned count,
602
const struct pipe_shader_buffer *buffers,
603
unsigned writable_bitmask)
604
{
605
struct tegra_context *context = to_tegra_context(pcontext);
606
607
context->gpu->set_shader_buffers(context->gpu, shader, start, count,
608
buffers, writable_bitmask);
609
}
610
611
static void
612
tegra_set_shader_images(struct pipe_context *pcontext, unsigned int shader,
613
unsigned start, unsigned count,
614
unsigned unbind_num_trailing_slots,
615
const struct pipe_image_view *images)
616
{
617
struct tegra_context *context = to_tegra_context(pcontext);
618
619
context->gpu->set_shader_images(context->gpu, shader, start, count,
620
unbind_num_trailing_slots, images);
621
}
622
623
static void
624
tegra_set_vertex_buffers(struct pipe_context *pcontext, unsigned start_slot,
625
unsigned num_buffers, unsigned unbind_num_trailing_slots,
626
bool take_ownership,
627
const struct pipe_vertex_buffer *buffers)
628
{
629
struct tegra_context *context = to_tegra_context(pcontext);
630
struct pipe_vertex_buffer buf[PIPE_MAX_SHADER_INPUTS];
631
unsigned i;
632
633
if (num_buffers && buffers) {
634
memcpy(buf, buffers, num_buffers * sizeof(struct pipe_vertex_buffer));
635
636
for (i = 0; i < num_buffers; i++) {
637
if (!buf[i].is_user_buffer)
638
buf[i].buffer.resource = tegra_resource_unwrap(buf[i].buffer.resource);
639
}
640
641
buffers = buf;
642
}
643
644
context->gpu->set_vertex_buffers(context->gpu, start_slot, num_buffers,
645
unbind_num_trailing_slots,
646
take_ownership, buffers);
647
}
648
649
static struct pipe_stream_output_target *
650
tegra_create_stream_output_target(struct pipe_context *pcontext,
651
struct pipe_resource *presource,
652
unsigned buffer_offset,
653
unsigned buffer_size)
654
{
655
struct tegra_resource *resource = to_tegra_resource(presource);
656
struct tegra_context *context = to_tegra_context(pcontext);
657
658
return context->gpu->create_stream_output_target(context->gpu,
659
resource->gpu,
660
buffer_offset,
661
buffer_size);
662
}
663
664
static void
665
tegra_stream_output_target_destroy(struct pipe_context *pcontext,
666
struct pipe_stream_output_target *target)
667
{
668
struct tegra_context *context = to_tegra_context(pcontext);
669
670
context->gpu->stream_output_target_destroy(context->gpu, target);
671
}
672
673
static void
674
tegra_set_stream_output_targets(struct pipe_context *pcontext,
675
unsigned num_targets,
676
struct pipe_stream_output_target **targets,
677
const unsigned *offsets)
678
{
679
struct tegra_context *context = to_tegra_context(pcontext);
680
681
context->gpu->set_stream_output_targets(context->gpu, num_targets,
682
targets, offsets);
683
}
684
685
static void
686
tegra_resource_copy_region(struct pipe_context *pcontext,
687
struct pipe_resource *pdst,
688
unsigned int dst_level,
689
unsigned int dstx,
690
unsigned int dsty,
691
unsigned int dstz,
692
struct pipe_resource *psrc,
693
unsigned int src_level,
694
const struct pipe_box *src_box)
695
{
696
struct tegra_context *context = to_tegra_context(pcontext);
697
struct tegra_resource *dst = to_tegra_resource(pdst);
698
struct tegra_resource *src = to_tegra_resource(psrc);
699
700
context->gpu->resource_copy_region(context->gpu, dst->gpu, dst_level, dstx,
701
dsty, dstz, src->gpu, src_level,
702
src_box);
703
}
704
705
static void
706
tegra_blit(struct pipe_context *pcontext, const struct pipe_blit_info *pinfo)
707
{
708
struct tegra_context *context = to_tegra_context(pcontext);
709
struct pipe_blit_info info;
710
711
if (pinfo) {
712
memcpy(&info, pinfo, sizeof(info));
713
info.dst.resource = tegra_resource_unwrap(info.dst.resource);
714
info.src.resource = tegra_resource_unwrap(info.src.resource);
715
pinfo = &info;
716
}
717
718
context->gpu->blit(context->gpu, pinfo);
719
}
720
721
static void
722
tegra_clear(struct pipe_context *pcontext, unsigned buffers, const struct pipe_scissor_state *scissor_state,
723
const union pipe_color_union *color, double depth,
724
unsigned stencil)
725
{
726
struct tegra_context *context = to_tegra_context(pcontext);
727
728
context->gpu->clear(context->gpu, buffers, NULL, color, depth, stencil);
729
}
730
731
static void
732
tegra_clear_render_target(struct pipe_context *pcontext,
733
struct pipe_surface *pdst,
734
const union pipe_color_union *color,
735
unsigned int dstx,
736
unsigned int dsty,
737
unsigned int width,
738
unsigned int height,
739
bool render_condition)
740
{
741
struct tegra_context *context = to_tegra_context(pcontext);
742
struct tegra_surface *dst = to_tegra_surface(pdst);
743
744
context->gpu->clear_render_target(context->gpu, dst->gpu, color, dstx,
745
dsty, width, height, render_condition);
746
}
747
748
static void
749
tegra_clear_depth_stencil(struct pipe_context *pcontext,
750
struct pipe_surface *pdst,
751
unsigned int flags,
752
double depth,
753
unsigned int stencil,
754
unsigned int dstx,
755
unsigned int dsty,
756
unsigned int width,
757
unsigned int height,
758
bool render_condition)
759
{
760
struct tegra_context *context = to_tegra_context(pcontext);
761
struct tegra_surface *dst = to_tegra_surface(pdst);
762
763
context->gpu->clear_depth_stencil(context->gpu, dst->gpu, flags, depth,
764
stencil, dstx, dsty, width, height,
765
render_condition);
766
}
767
768
static void
769
tegra_clear_texture(struct pipe_context *pcontext,
770
struct pipe_resource *presource,
771
unsigned int level,
772
const struct pipe_box *box,
773
const void *data)
774
{
775
struct tegra_resource *resource = to_tegra_resource(presource);
776
struct tegra_context *context = to_tegra_context(pcontext);
777
778
context->gpu->clear_texture(context->gpu, resource->gpu, level, box, data);
779
}
780
781
static void
782
tegra_clear_buffer(struct pipe_context *pcontext,
783
struct pipe_resource *presource,
784
unsigned int offset,
785
unsigned int size,
786
const void *value,
787
int value_size)
788
{
789
struct tegra_resource *resource = to_tegra_resource(presource);
790
struct tegra_context *context = to_tegra_context(pcontext);
791
792
context->gpu->clear_buffer(context->gpu, resource->gpu, offset, size,
793
value, value_size);
794
}
795
796
static void
797
tegra_flush(struct pipe_context *pcontext, struct pipe_fence_handle **fence,
798
unsigned flags)
799
{
800
struct tegra_context *context = to_tegra_context(pcontext);
801
802
context->gpu->flush(context->gpu, fence, flags);
803
}
804
805
static void
806
tegra_create_fence_fd(struct pipe_context *pcontext,
807
struct pipe_fence_handle **fence,
808
int fd, enum pipe_fd_type type)
809
{
810
struct tegra_context *context = to_tegra_context(pcontext);
811
812
assert(type == PIPE_FD_TYPE_NATIVE_SYNC);
813
context->gpu->create_fence_fd(context->gpu, fence, fd, type);
814
}
815
816
static void
817
tegra_fence_server_sync(struct pipe_context *pcontext,
818
struct pipe_fence_handle *fence)
819
{
820
struct tegra_context *context = to_tegra_context(pcontext);
821
822
context->gpu->fence_server_sync(context->gpu, fence);
823
}
824
825
static struct pipe_sampler_view *
826
tegra_create_sampler_view(struct pipe_context *pcontext,
827
struct pipe_resource *presource,
828
const struct pipe_sampler_view *template)
829
{
830
struct tegra_resource *resource = to_tegra_resource(presource);
831
struct tegra_context *context = to_tegra_context(pcontext);
832
struct tegra_sampler_view *view;
833
834
view = calloc(1, sizeof(*view));
835
if (!view)
836
return NULL;
837
838
view->gpu = context->gpu->create_sampler_view(context->gpu, resource->gpu,
839
template);
840
memcpy(&view->base, view->gpu, sizeof(*view->gpu));
841
/* overwrite to prevent reference from being released */
842
view->base.texture = NULL;
843
844
pipe_reference_init(&view->base.reference, 1);
845
pipe_resource_reference(&view->base.texture, presource);
846
view->base.context = pcontext;
847
848
return &view->base;
849
}
850
851
static void
852
tegra_sampler_view_destroy(struct pipe_context *pcontext,
853
struct pipe_sampler_view *pview)
854
{
855
struct tegra_sampler_view *view = to_tegra_sampler_view(pview);
856
857
pipe_resource_reference(&view->base.texture, NULL);
858
pipe_sampler_view_reference(&view->gpu, NULL);
859
free(view);
860
}
861
862
static struct pipe_surface *
863
tegra_create_surface(struct pipe_context *pcontext,
864
struct pipe_resource *presource,
865
const struct pipe_surface *template)
866
{
867
struct tegra_resource *resource = to_tegra_resource(presource);
868
struct tegra_context *context = to_tegra_context(pcontext);
869
struct tegra_surface *surface;
870
871
surface = calloc(1, sizeof(*surface));
872
if (!surface)
873
return NULL;
874
875
surface->gpu = context->gpu->create_surface(context->gpu, resource->gpu,
876
template);
877
if (!surface->gpu) {
878
free(surface);
879
return NULL;
880
}
881
882
memcpy(&surface->base, surface->gpu, sizeof(*surface->gpu));
883
/* overwrite to prevent reference from being released */
884
surface->base.texture = NULL;
885
886
pipe_reference_init(&surface->base.reference, 1);
887
pipe_resource_reference(&surface->base.texture, presource);
888
surface->base.context = &context->base;
889
890
return &surface->base;
891
}
892
893
static void
894
tegra_surface_destroy(struct pipe_context *pcontext,
895
struct pipe_surface *psurface)
896
{
897
struct tegra_surface *surface = to_tegra_surface(psurface);
898
899
pipe_resource_reference(&surface->base.texture, NULL);
900
pipe_surface_reference(&surface->gpu, NULL);
901
free(surface);
902
}
903
904
static void *
905
tegra_transfer_map(struct pipe_context *pcontext,
906
struct pipe_resource *presource,
907
unsigned level, unsigned usage,
908
const struct pipe_box *box,
909
struct pipe_transfer **ptransfer)
910
{
911
struct tegra_resource *resource = to_tegra_resource(presource);
912
struct tegra_context *context = to_tegra_context(pcontext);
913
struct tegra_transfer *transfer;
914
915
transfer = calloc(1, sizeof(*transfer));
916
if (!transfer)
917
return NULL;
918
919
if (presource->target == PIPE_BUFFER) {
920
transfer->map = context->gpu->buffer_map(context->gpu, resource->gpu,
921
level, usage, box,
922
&transfer->gpu);
923
} else {
924
transfer->map = context->gpu->texture_map(context->gpu, resource->gpu,
925
level, usage, box,
926
&transfer->gpu);
927
}
928
memcpy(&transfer->base, transfer->gpu, sizeof(*transfer->gpu));
929
transfer->base.resource = NULL;
930
pipe_resource_reference(&transfer->base.resource, presource);
931
932
*ptransfer = &transfer->base;
933
934
return transfer->map;
935
}
936
937
static void
938
tegra_transfer_flush_region(struct pipe_context *pcontext,
939
struct pipe_transfer *ptransfer,
940
const struct pipe_box *box)
941
{
942
struct tegra_transfer *transfer = to_tegra_transfer(ptransfer);
943
struct tegra_context *context = to_tegra_context(pcontext);
944
945
context->gpu->transfer_flush_region(context->gpu, transfer->gpu, box);
946
}
947
948
static void
949
tegra_transfer_unmap(struct pipe_context *pcontext,
950
struct pipe_transfer *ptransfer)
951
{
952
struct tegra_transfer *transfer = to_tegra_transfer(ptransfer);
953
struct tegra_context *context = to_tegra_context(pcontext);
954
955
if (ptransfer->resource->target == PIPE_BUFFER)
956
context->gpu->buffer_unmap(context->gpu, transfer->gpu);
957
else
958
context->gpu->texture_unmap(context->gpu, transfer->gpu);
959
pipe_resource_reference(&transfer->base.resource, NULL);
960
free(transfer);
961
}
962
963
static void
964
tegra_buffer_subdata(struct pipe_context *pcontext,
965
struct pipe_resource *presource,
966
unsigned usage, unsigned offset,
967
unsigned size, const void *data)
968
{
969
struct tegra_resource *resource = to_tegra_resource(presource);
970
struct tegra_context *context = to_tegra_context(pcontext);
971
972
context->gpu->buffer_subdata(context->gpu, resource->gpu, usage, offset,
973
size, data);
974
}
975
976
static void
977
tegra_texture_subdata(struct pipe_context *pcontext,
978
struct pipe_resource *presource,
979
unsigned level,
980
unsigned usage,
981
const struct pipe_box *box,
982
const void *data,
983
unsigned stride,
984
unsigned layer_stride)
985
{
986
struct tegra_resource *resource = to_tegra_resource(presource);
987
struct tegra_context *context = to_tegra_context(pcontext);
988
989
context->gpu->texture_subdata(context->gpu, resource->gpu, level, usage,
990
box, data, stride, layer_stride);
991
}
992
993
static void
994
tegra_texture_barrier(struct pipe_context *pcontext, unsigned int flags)
995
{
996
struct tegra_context *context = to_tegra_context(pcontext);
997
998
context->gpu->texture_barrier(context->gpu, flags);
999
}
1000
1001
static void
1002
tegra_memory_barrier(struct pipe_context *pcontext, unsigned int flags)
1003
{
1004
struct tegra_context *context = to_tegra_context(pcontext);
1005
1006
if (!(flags & ~PIPE_BARRIER_UPDATE))
1007
return;
1008
1009
context->gpu->memory_barrier(context->gpu, flags);
1010
}
1011
1012
static struct pipe_video_codec *
1013
tegra_create_video_codec(struct pipe_context *pcontext,
1014
const struct pipe_video_codec *template)
1015
{
1016
struct tegra_context *context = to_tegra_context(pcontext);
1017
1018
return context->gpu->create_video_codec(context->gpu, template);
1019
}
1020
1021
static struct pipe_video_buffer *
1022
tegra_create_video_buffer(struct pipe_context *pcontext,
1023
const struct pipe_video_buffer *template)
1024
{
1025
struct tegra_context *context = to_tegra_context(pcontext);
1026
1027
return context->gpu->create_video_buffer(context->gpu, template);
1028
}
1029
1030
static void *
1031
tegra_create_compute_state(struct pipe_context *pcontext,
1032
const struct pipe_compute_state *template)
1033
{
1034
struct tegra_context *context = to_tegra_context(pcontext);
1035
1036
return context->gpu->create_compute_state(context->gpu, template);
1037
}
1038
1039
static void
1040
tegra_bind_compute_state(struct pipe_context *pcontext, void *so)
1041
{
1042
struct tegra_context *context = to_tegra_context(pcontext);
1043
1044
context->gpu->bind_compute_state(context->gpu, so);
1045
}
1046
1047
static void
1048
tegra_delete_compute_state(struct pipe_context *pcontext, void *so)
1049
{
1050
struct tegra_context *context = to_tegra_context(pcontext);
1051
1052
context->gpu->delete_compute_state(context->gpu, so);
1053
}
1054
1055
static void
1056
tegra_set_compute_resources(struct pipe_context *pcontext,
1057
unsigned int start, unsigned int count,
1058
struct pipe_surface **resources)
1059
{
1060
struct tegra_context *context = to_tegra_context(pcontext);
1061
1062
/* XXX unwrap resources */
1063
1064
context->gpu->set_compute_resources(context->gpu, start, count, resources);
1065
}
1066
1067
static void
1068
tegra_set_global_binding(struct pipe_context *pcontext, unsigned int first,
1069
unsigned int count, struct pipe_resource **resources,
1070
uint32_t **handles)
1071
{
1072
struct tegra_context *context = to_tegra_context(pcontext);
1073
1074
/* XXX unwrap resources */
1075
1076
context->gpu->set_global_binding(context->gpu, first, count, resources,
1077
handles);
1078
}
1079
1080
static void
1081
tegra_launch_grid(struct pipe_context *pcontext,
1082
const struct pipe_grid_info *info)
1083
{
1084
struct tegra_context *context = to_tegra_context(pcontext);
1085
1086
/* XXX unwrap info->indirect? */
1087
1088
context->gpu->launch_grid(context->gpu, info);
1089
}
1090
1091
static void
1092
tegra_get_sample_position(struct pipe_context *pcontext, unsigned int count,
1093
unsigned int index, float *value)
1094
{
1095
struct tegra_context *context = to_tegra_context(pcontext);
1096
1097
context->gpu->get_sample_position(context->gpu, count, index, value);
1098
}
1099
1100
static uint64_t
1101
tegra_get_timestamp(struct pipe_context *pcontext)
1102
{
1103
struct tegra_context *context = to_tegra_context(pcontext);
1104
1105
return context->gpu->get_timestamp(context->gpu);
1106
}
1107
1108
static void
1109
tegra_flush_resource(struct pipe_context *pcontext,
1110
struct pipe_resource *presource)
1111
{
1112
struct tegra_resource *resource = to_tegra_resource(presource);
1113
struct tegra_context *context = to_tegra_context(pcontext);
1114
1115
context->gpu->flush_resource(context->gpu, resource->gpu);
1116
}
1117
1118
static void
1119
tegra_invalidate_resource(struct pipe_context *pcontext,
1120
struct pipe_resource *presource)
1121
{
1122
struct tegra_resource *resource = to_tegra_resource(presource);
1123
struct tegra_context *context = to_tegra_context(pcontext);
1124
1125
context->gpu->invalidate_resource(context->gpu, resource->gpu);
1126
}
1127
1128
static enum pipe_reset_status
1129
tegra_get_device_reset_status(struct pipe_context *pcontext)
1130
{
1131
struct tegra_context *context = to_tegra_context(pcontext);
1132
1133
return context->gpu->get_device_reset_status(context->gpu);
1134
}
1135
1136
static void
1137
tegra_set_device_reset_callback(struct pipe_context *pcontext,
1138
const struct pipe_device_reset_callback *cb)
1139
{
1140
struct tegra_context *context = to_tegra_context(pcontext);
1141
1142
context->gpu->set_device_reset_callback(context->gpu, cb);
1143
}
1144
1145
static void
1146
tegra_dump_debug_state(struct pipe_context *pcontext, FILE *stream,
1147
unsigned int flags)
1148
{
1149
struct tegra_context *context = to_tegra_context(pcontext);
1150
1151
context->gpu->dump_debug_state(context->gpu, stream, flags);
1152
}
1153
1154
static void
1155
tegra_emit_string_marker(struct pipe_context *pcontext, const char *string,
1156
int length)
1157
{
1158
struct tegra_context *context = to_tegra_context(pcontext);
1159
1160
context->gpu->emit_string_marker(context->gpu, string, length);
1161
}
1162
1163
static bool
1164
tegra_generate_mipmap(struct pipe_context *pcontext,
1165
struct pipe_resource *presource,
1166
enum pipe_format format,
1167
unsigned int base_level,
1168
unsigned int last_level,
1169
unsigned int first_layer,
1170
unsigned int last_layer)
1171
{
1172
struct tegra_resource *resource = to_tegra_resource(presource);
1173
struct tegra_context *context = to_tegra_context(pcontext);
1174
1175
return context->gpu->generate_mipmap(context->gpu, resource->gpu, format,
1176
base_level, last_level, first_layer,
1177
last_layer);
1178
}
1179
1180
static uint64_t
1181
tegra_create_texture_handle(struct pipe_context *pcontext,
1182
struct pipe_sampler_view *view,
1183
const struct pipe_sampler_state *state)
1184
{
1185
struct tegra_context *context = to_tegra_context(pcontext);
1186
1187
return context->gpu->create_texture_handle(context->gpu, view, state);
1188
}
1189
1190
static void tegra_delete_texture_handle(struct pipe_context *pcontext,
1191
uint64_t handle)
1192
{
1193
struct tegra_context *context = to_tegra_context(pcontext);
1194
1195
context->gpu->delete_texture_handle(context->gpu, handle);
1196
}
1197
1198
static void tegra_make_texture_handle_resident(struct pipe_context *pcontext,
1199
uint64_t handle, bool resident)
1200
{
1201
struct tegra_context *context = to_tegra_context(pcontext);
1202
1203
context->gpu->make_texture_handle_resident(context->gpu, handle, resident);
1204
}
1205
1206
static uint64_t tegra_create_image_handle(struct pipe_context *pcontext,
1207
const struct pipe_image_view *image)
1208
{
1209
struct tegra_context *context = to_tegra_context(pcontext);
1210
1211
return context->gpu->create_image_handle(context->gpu, image);
1212
}
1213
1214
static void tegra_delete_image_handle(struct pipe_context *pcontext,
1215
uint64_t handle)
1216
{
1217
struct tegra_context *context = to_tegra_context(pcontext);
1218
1219
context->gpu->delete_image_handle(context->gpu, handle);
1220
}
1221
1222
static void tegra_make_image_handle_resident(struct pipe_context *pcontext,
1223
uint64_t handle, unsigned access,
1224
bool resident)
1225
{
1226
struct tegra_context *context = to_tegra_context(pcontext);
1227
1228
context->gpu->make_image_handle_resident(context->gpu, handle, access,
1229
resident);
1230
}
1231
1232
struct pipe_context *
1233
tegra_screen_context_create(struct pipe_screen *pscreen, void *priv,
1234
unsigned int flags)
1235
{
1236
struct tegra_screen *screen = to_tegra_screen(pscreen);
1237
struct tegra_context *context;
1238
1239
context = calloc(1, sizeof(*context));
1240
if (!context)
1241
return NULL;
1242
1243
context->gpu = screen->gpu->context_create(screen->gpu, priv, flags);
1244
if (!context->gpu) {
1245
debug_error("failed to create GPU context\n");
1246
goto free;
1247
}
1248
1249
context->base.screen = &screen->base;
1250
context->base.priv = priv;
1251
1252
/*
1253
* Create custom stream and const uploaders. Note that technically nouveau
1254
* already creates uploaders that could be reused, but that would make the
1255
* resource unwrapping rather complicate. The reason for that is that both
1256
* uploaders create resources based on the context that they were created
1257
* from, which means that nouveau's uploader will use the nouveau context
1258
* which means that those resources must not be unwrapped. So before each
1259
* resource is unwrapped, the code would need to check that it does not
1260
* correspond to the uploaders' buffers.
1261
*
1262
* However, duplicating the uploaders here sounds worse than it is. The
1263
* default implementation that nouveau uses allocates buffers lazily, and
1264
* since it is never used, no buffers will every be allocated and the only
1265
* memory wasted is that occupied by the nouveau uploader itself.
1266
*/
1267
context->base.stream_uploader = u_upload_create_default(&context->base);
1268
if (!context->base.stream_uploader)
1269
goto destroy;
1270
1271
context->base.const_uploader = context->base.stream_uploader;
1272
1273
context->base.destroy = tegra_destroy;
1274
1275
context->base.draw_vbo = tegra_draw_vbo;
1276
1277
context->base.render_condition = tegra_render_condition;
1278
1279
context->base.create_query = tegra_create_query;
1280
context->base.create_batch_query = tegra_create_batch_query;
1281
context->base.destroy_query = tegra_destroy_query;
1282
context->base.begin_query = tegra_begin_query;
1283
context->base.end_query = tegra_end_query;
1284
context->base.get_query_result = tegra_get_query_result;
1285
context->base.get_query_result_resource = tegra_get_query_result_resource;
1286
context->base.set_active_query_state = tegra_set_active_query_state;
1287
1288
context->base.create_blend_state = tegra_create_blend_state;
1289
context->base.bind_blend_state = tegra_bind_blend_state;
1290
context->base.delete_blend_state = tegra_delete_blend_state;
1291
1292
context->base.create_sampler_state = tegra_create_sampler_state;
1293
context->base.bind_sampler_states = tegra_bind_sampler_states;
1294
context->base.delete_sampler_state = tegra_delete_sampler_state;
1295
1296
context->base.create_rasterizer_state = tegra_create_rasterizer_state;
1297
context->base.bind_rasterizer_state = tegra_bind_rasterizer_state;
1298
context->base.delete_rasterizer_state = tegra_delete_rasterizer_state;
1299
1300
context->base.create_depth_stencil_alpha_state = tegra_create_depth_stencil_alpha_state;
1301
context->base.bind_depth_stencil_alpha_state = tegra_bind_depth_stencil_alpha_state;
1302
context->base.delete_depth_stencil_alpha_state = tegra_delete_depth_stencil_alpha_state;
1303
1304
context->base.create_fs_state = tegra_create_fs_state;
1305
context->base.bind_fs_state = tegra_bind_fs_state;
1306
context->base.delete_fs_state = tegra_delete_fs_state;
1307
1308
context->base.create_vs_state = tegra_create_vs_state;
1309
context->base.bind_vs_state = tegra_bind_vs_state;
1310
context->base.delete_vs_state = tegra_delete_vs_state;
1311
1312
context->base.create_gs_state = tegra_create_gs_state;
1313
context->base.bind_gs_state = tegra_bind_gs_state;
1314
context->base.delete_gs_state = tegra_delete_gs_state;
1315
1316
context->base.create_tcs_state = tegra_create_tcs_state;
1317
context->base.bind_tcs_state = tegra_bind_tcs_state;
1318
context->base.delete_tcs_state = tegra_delete_tcs_state;
1319
1320
context->base.create_tes_state = tegra_create_tes_state;
1321
context->base.bind_tes_state = tegra_bind_tes_state;
1322
context->base.delete_tes_state = tegra_delete_tes_state;
1323
1324
context->base.create_vertex_elements_state = tegra_create_vertex_elements_state;
1325
context->base.bind_vertex_elements_state = tegra_bind_vertex_elements_state;
1326
context->base.delete_vertex_elements_state = tegra_delete_vertex_elements_state;
1327
1328
context->base.set_blend_color = tegra_set_blend_color;
1329
context->base.set_stencil_ref = tegra_set_stencil_ref;
1330
context->base.set_sample_mask = tegra_set_sample_mask;
1331
context->base.set_min_samples = tegra_set_min_samples;
1332
context->base.set_clip_state = tegra_set_clip_state;
1333
1334
context->base.set_constant_buffer = tegra_set_constant_buffer;
1335
context->base.set_framebuffer_state = tegra_set_framebuffer_state;
1336
context->base.set_polygon_stipple = tegra_set_polygon_stipple;
1337
context->base.set_scissor_states = tegra_set_scissor_states;
1338
context->base.set_window_rectangles = tegra_set_window_rectangles;
1339
context->base.set_viewport_states = tegra_set_viewport_states;
1340
context->base.set_sampler_views = tegra_set_sampler_views;
1341
context->base.set_tess_state = tegra_set_tess_state;
1342
1343
context->base.set_debug_callback = tegra_set_debug_callback;
1344
1345
context->base.set_shader_buffers = tegra_set_shader_buffers;
1346
context->base.set_shader_images = tegra_set_shader_images;
1347
context->base.set_vertex_buffers = tegra_set_vertex_buffers;
1348
1349
context->base.create_stream_output_target = tegra_create_stream_output_target;
1350
context->base.stream_output_target_destroy = tegra_stream_output_target_destroy;
1351
context->base.set_stream_output_targets = tegra_set_stream_output_targets;
1352
1353
context->base.resource_copy_region = tegra_resource_copy_region;
1354
context->base.blit = tegra_blit;
1355
context->base.clear = tegra_clear;
1356
context->base.clear_render_target = tegra_clear_render_target;
1357
context->base.clear_depth_stencil = tegra_clear_depth_stencil;
1358
context->base.clear_texture = tegra_clear_texture;
1359
context->base.clear_buffer = tegra_clear_buffer;
1360
context->base.flush = tegra_flush;
1361
1362
context->base.create_fence_fd = tegra_create_fence_fd;
1363
context->base.fence_server_sync = tegra_fence_server_sync;
1364
1365
context->base.create_sampler_view = tegra_create_sampler_view;
1366
context->base.sampler_view_destroy = tegra_sampler_view_destroy;
1367
1368
context->base.create_surface = tegra_create_surface;
1369
context->base.surface_destroy = tegra_surface_destroy;
1370
1371
context->base.buffer_map = tegra_transfer_map;
1372
context->base.texture_map = tegra_transfer_map;
1373
context->base.transfer_flush_region = tegra_transfer_flush_region;
1374
context->base.buffer_unmap = tegra_transfer_unmap;
1375
context->base.texture_unmap = tegra_transfer_unmap;
1376
context->base.buffer_subdata = tegra_buffer_subdata;
1377
context->base.texture_subdata = tegra_texture_subdata;
1378
1379
context->base.texture_barrier = tegra_texture_barrier;
1380
context->base.memory_barrier = tegra_memory_barrier;
1381
1382
context->base.create_video_codec = tegra_create_video_codec;
1383
context->base.create_video_buffer = tegra_create_video_buffer;
1384
1385
context->base.create_compute_state = tegra_create_compute_state;
1386
context->base.bind_compute_state = tegra_bind_compute_state;
1387
context->base.delete_compute_state = tegra_delete_compute_state;
1388
context->base.set_compute_resources = tegra_set_compute_resources;
1389
context->base.set_global_binding = tegra_set_global_binding;
1390
context->base.launch_grid = tegra_launch_grid;
1391
context->base.get_sample_position = tegra_get_sample_position;
1392
context->base.get_timestamp = tegra_get_timestamp;
1393
1394
context->base.flush_resource = tegra_flush_resource;
1395
context->base.invalidate_resource = tegra_invalidate_resource;
1396
1397
context->base.get_device_reset_status = tegra_get_device_reset_status;
1398
context->base.set_device_reset_callback = tegra_set_device_reset_callback;
1399
context->base.dump_debug_state = tegra_dump_debug_state;
1400
context->base.emit_string_marker = tegra_emit_string_marker;
1401
1402
context->base.generate_mipmap = tegra_generate_mipmap;
1403
1404
context->base.create_texture_handle = tegra_create_texture_handle;
1405
context->base.delete_texture_handle = tegra_delete_texture_handle;
1406
context->base.make_texture_handle_resident = tegra_make_texture_handle_resident;
1407
context->base.create_image_handle = tegra_create_image_handle;
1408
context->base.delete_image_handle = tegra_delete_image_handle;
1409
context->base.make_image_handle_resident = tegra_make_image_handle_resident;
1410
1411
return &context->base;
1412
1413
destroy:
1414
context->gpu->destroy(context->gpu);
1415
free:
1416
free(context);
1417
return NULL;
1418
}
1419
1420