Path: blob/21.2-virgl/src/gallium/drivers/v3d/v3d_context.h
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/*1* Copyright © 2014-2017 Broadcom2* Copyright (C) 2012 Rob Clark <[email protected]>3*4* Permission is hereby granted, free of charge, to any person obtaining a5* copy of this software and associated documentation files (the "Software"),6* to deal in the Software without restriction, including without limitation7* the rights to use, copy, modify, merge, publish, distribute, sublicense,8* and/or sell copies of the Software, and to permit persons to whom the9* Software is furnished to do so, subject to the following conditions:10*11* The above copyright notice and this permission notice (including the next12* paragraph) shall be included in all copies or substantial portions of the13* Software.14*15* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL18* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER19* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING20* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS21* IN THE SOFTWARE.22*/2324#ifndef V3D_CONTEXT_H25#define V3D_CONTEXT_H2627#ifdef V3D_VERSION28#include "broadcom/common/v3d_macros.h"29#endif3031#include <stdio.h>3233#include "pipe/p_context.h"34#include "pipe/p_state.h"35#include "util/bitset.h"36#include "util/slab.h"37#include "xf86drm.h"38#include "drm-uapi/v3d_drm.h"39#include "v3d_screen.h"40#include "broadcom/common/v3d_limits.h"4142#include "broadcom/simulator/v3d_simulator.h"4344struct v3d_job;45struct v3d_bo;46void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);4748#include "v3d_bufmgr.h"49#include "v3d_resource.h"50#include "v3d_cl.h"5152#ifdef USE_V3D_SIMULATOR53#define using_v3d_simulator true54#else55#define using_v3d_simulator false56#endif5758#define V3D_DIRTY_BLEND (1ull << 0)59#define V3D_DIRTY_RASTERIZER (1ull << 1)60#define V3D_DIRTY_ZSA (1ull << 2)61#define V3D_DIRTY_COMPTEX (1ull << 3)62#define V3D_DIRTY_VERTTEX (1ull << 4)63#define V3D_DIRTY_GEOMTEX (1ull << 5)64#define V3D_DIRTY_FRAGTEX (1ull << 6)6566#define V3D_DIRTY_SHADER_IMAGE (1ull << 9)67#define V3D_DIRTY_BLEND_COLOR (1ull << 10)68#define V3D_DIRTY_STENCIL_REF (1ull << 11)69#define V3D_DIRTY_SAMPLE_STATE (1ull << 12)70#define V3D_DIRTY_FRAMEBUFFER (1ull << 13)71#define V3D_DIRTY_STIPPLE (1ull << 14)72#define V3D_DIRTY_VIEWPORT (1ull << 15)73#define V3D_DIRTY_CONSTBUF (1ull << 16)74#define V3D_DIRTY_VTXSTATE (1ull << 17)75#define V3D_DIRTY_VTXBUF (1ull << 18)76#define V3D_DIRTY_SCISSOR (1ull << 19)77#define V3D_DIRTY_FLAT_SHADE_FLAGS (1ull << 20)78#define V3D_DIRTY_PRIM_MODE (1ull << 21)79#define V3D_DIRTY_CLIP (1ull << 22)80#define V3D_DIRTY_UNCOMPILED_CS (1ull << 23)81#define V3D_DIRTY_UNCOMPILED_VS (1ull << 24)82#define V3D_DIRTY_UNCOMPILED_GS (1ull << 25)83#define V3D_DIRTY_UNCOMPILED_FS (1ull << 26)8485#define V3D_DIRTY_COMPILED_CS (1ull << 29)86#define V3D_DIRTY_COMPILED_VS (1ull << 30)87#define V3D_DIRTY_COMPILED_GS_BIN (1ULL << 31)88#define V3D_DIRTY_COMPILED_GS (1ULL << 32)89#define V3D_DIRTY_COMPILED_FS (1ull << 33)9091#define V3D_DIRTY_FS_INPUTS (1ull << 38)92#define V3D_DIRTY_GS_INPUTS (1ull << 39)93#define V3D_DIRTY_STREAMOUT (1ull << 40)94#define V3D_DIRTY_OQ (1ull << 41)95#define V3D_DIRTY_CENTROID_FLAGS (1ull << 42)96#define V3D_DIRTY_NOPERSPECTIVE_FLAGS (1ull << 43)97#define V3D_DIRTY_SSBO (1ull << 44)9899#define V3D_MAX_FS_INPUTS 64100101#define MAX_JOB_SCISSORS 16102103enum v3d_sampler_state_variant {104V3D_SAMPLER_STATE_BORDER_0,105V3D_SAMPLER_STATE_F16,106V3D_SAMPLER_STATE_F16_UNORM,107V3D_SAMPLER_STATE_F16_SNORM,108V3D_SAMPLER_STATE_F16_BGRA,109V3D_SAMPLER_STATE_F16_BGRA_UNORM,110V3D_SAMPLER_STATE_F16_BGRA_SNORM,111V3D_SAMPLER_STATE_F16_A,112V3D_SAMPLER_STATE_F16_A_SNORM,113V3D_SAMPLER_STATE_F16_A_UNORM,114V3D_SAMPLER_STATE_F16_LA,115V3D_SAMPLER_STATE_F16_LA_UNORM,116V3D_SAMPLER_STATE_F16_LA_SNORM,117V3D_SAMPLER_STATE_32,118V3D_SAMPLER_STATE_32_UNORM,119V3D_SAMPLER_STATE_32_SNORM,120V3D_SAMPLER_STATE_32_A,121V3D_SAMPLER_STATE_32_A_UNORM,122V3D_SAMPLER_STATE_32_A_SNORM,123V3D_SAMPLER_STATE_1010102U,124V3D_SAMPLER_STATE_16U,125V3D_SAMPLER_STATE_16I,126V3D_SAMPLER_STATE_8I,127V3D_SAMPLER_STATE_8U,128129V3D_SAMPLER_STATE_VARIANT_COUNT,130};131132enum v3d_flush_cond {133/* Flush job unless we are flushing for transform feedback, where we134* handle flushing in the driver via the 'Wait for TF' packet.135*/136V3D_FLUSH_DEFAULT,137/* Always flush the job, even for cases where we would normally not138* do it, such as transform feedback.139*/140V3D_FLUSH_ALWAYS,141/* Flush job if it is not the current FBO job. This is intended to142* skip automatic flushes of the current job for resources that we143* expect to be externally synchronized by the application using144* glMemoryBarrier(), such as SSBOs and shader images.145*/146V3D_FLUSH_NOT_CURRENT_JOB,147};148149struct v3d_sampler_view {150struct pipe_sampler_view base;151uint32_t p0;152uint32_t p1;153/* Precomputed swizzles to pass in to the shader key. */154uint8_t swizzle[4];155156uint8_t texture_shader_state[32];157/* V3D 4.x: Texture state struct. */158struct v3d_bo *bo;159160enum v3d_sampler_state_variant sampler_variant;161162/* Actual texture to be read by this sampler view. May be different163* from base.texture in the case of having a shadow tiled copy of a164* raster texture.165*/166struct pipe_resource *texture;167};168169struct v3d_sampler_state {170struct pipe_sampler_state base;171uint32_t p0;172uint32_t p1;173174/* V3D 3.x: Packed texture state. */175uint8_t texture_shader_state[32];176/* V3D 4.x: Sampler state struct. */177struct pipe_resource *sampler_state;178uint32_t sampler_state_offset[V3D_SAMPLER_STATE_VARIANT_COUNT];179180bool border_color_variants;181};182183struct v3d_texture_stateobj {184struct pipe_sampler_view *textures[V3D_MAX_TEXTURE_SAMPLERS];185unsigned num_textures;186struct pipe_sampler_state *samplers[V3D_MAX_TEXTURE_SAMPLERS];187unsigned num_samplers;188struct v3d_cl_reloc texture_state[V3D_MAX_TEXTURE_SAMPLERS];189};190191struct v3d_shader_uniform_info {192enum quniform_contents *contents;193uint32_t *data;194uint32_t count;195};196197struct v3d_uncompiled_shader {198/** A name for this program, so you can track it in shader-db output. */199uint32_t program_id;200/** How many variants of this program were compiled, for shader-db. */201uint32_t compiled_variant_count;202struct pipe_shader_state base;203uint32_t num_tf_outputs;204struct v3d_varying_slot *tf_outputs;205uint16_t tf_specs[16];206uint16_t tf_specs_psiz[16];207uint32_t num_tf_specs;208};209210struct v3d_compiled_shader {211struct pipe_resource *resource;212uint32_t offset;213214union {215struct v3d_prog_data *base;216struct v3d_vs_prog_data *vs;217struct v3d_gs_prog_data *gs;218struct v3d_fs_prog_data *fs;219struct v3d_compute_prog_data *compute;220} prog_data;221222/**223* V3D_DIRTY_* flags that, when set in v3d->dirty, mean that the224* uniforms have to be rewritten (and therefore the shader state225* reemitted).226*/227uint64_t uniform_dirty_bits;228};229230struct v3d_program_stateobj {231struct v3d_uncompiled_shader *bind_vs, *bind_gs, *bind_fs, *bind_compute;232struct v3d_compiled_shader *cs, *vs, *gs_bin, *gs, *fs, *compute;233234struct hash_table *cache[MESA_SHADER_STAGES];235236struct v3d_bo *spill_bo;237int spill_size_per_thread;238};239240struct v3d_constbuf_stateobj {241struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];242uint32_t enabled_mask;243uint32_t dirty_mask;244};245246struct v3d_vertexbuf_stateobj {247struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];248unsigned count;249uint32_t enabled_mask;250uint32_t dirty_mask;251};252253struct v3d_vertex_stateobj {254struct pipe_vertex_element pipe[V3D_MAX_VS_INPUTS / 4];255unsigned num_elements;256257uint8_t attrs[16 * (V3D_MAX_VS_INPUTS / 4)];258struct pipe_resource *defaults;259uint32_t defaults_offset;260};261262struct v3d_stream_output_target {263struct pipe_stream_output_target base;264/* Number of transform feedback vertices written to this target */265uint32_t recorded_vertex_count;266};267268struct v3d_streamout_stateobj {269struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];270/* Number of vertices we've written into the buffer so far. */271uint32_t offsets[PIPE_MAX_SO_BUFFERS];272unsigned num_targets;273};274275struct v3d_ssbo_stateobj {276struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];277uint32_t enabled_mask;278};279280/* Hash table key for v3d->jobs */281struct v3d_job_key {282struct pipe_surface *cbufs[4];283struct pipe_surface *zsbuf;284struct pipe_surface *bbuf;285};286287enum v3d_ez_state {288V3D_EZ_UNDECIDED = 0,289V3D_EZ_GT_GE,290V3D_EZ_LT_LE,291V3D_EZ_DISABLED,292};293294struct v3d_image_view {295struct pipe_image_view base;296/* V3D 4.x texture shader state struct */297struct pipe_resource *tex_state;298uint32_t tex_state_offset;299};300301struct v3d_shaderimg_stateobj {302struct v3d_image_view si[PIPE_MAX_SHADER_IMAGES];303uint32_t enabled_mask;304};305306/**307* A complete bin/render job.308*309* This is all of the state necessary to submit a bin/render to the kernel.310* We want to be able to have multiple in progress at a time, so that we don't311* need to flush an existing CL just to switch to rendering to a new render312* target (which would mean reading back from the old render target when313* starting to render to it again).314*/315struct v3d_job {316struct v3d_context *v3d;317struct v3d_cl bcl;318struct v3d_cl rcl;319struct v3d_cl indirect;320struct v3d_bo *tile_alloc;321struct v3d_bo *tile_state;322323struct drm_v3d_submit_cl submit;324325/**326* Set of all BOs referenced by the job. This will be used for making327* the list of BOs that the kernel will need to have paged in to328* execute our job.329*/330struct set *bos;331332/** Sum of the sizes of the BOs referenced by the job. */333uint32_t referenced_size;334335struct set *write_prscs;336struct set *tf_write_prscs;337338/* Size of the submit.bo_handles array. */339uint32_t bo_handles_size;340341/** @{342* Surfaces to submit rendering for.343* For blit operations, bbuf is the source surface, and cbufs[0] is344* the destination surface.345*/346uint32_t nr_cbufs;347struct pipe_surface *cbufs[4];348struct pipe_surface *zsbuf;349struct pipe_surface *bbuf;350/** @} */351/** @{352* Bounding box of the scissor across all queued drawing.353*354* Note that the max values are exclusive.355*/356uint32_t draw_min_x;357uint32_t draw_min_y;358uint32_t draw_max_x;359uint32_t draw_max_y;360361/** @} */362/** @{363* List of scissor rects used for all queued drawing. All scissor364* rects will be contained in the draw_{min/max}_{x/y} bounding box.365*366* This is used as an optimization when all drawing is scissored to367* limit tile flushing only to tiles that intersect a scissor rect.368* If scissor is used together with non-scissored drawing, then369* the optimization is disabled.370*/371struct {372bool disabled;373uint32_t count;374struct {375uint32_t min_x, min_y;376uint32_t max_x, max_y;377} rects[MAX_JOB_SCISSORS];378} scissor;379380/** @} */381/** @{382* Width/height of the color framebuffer being rendered to,383* for V3D_TILE_RENDERING_MODE_CONFIG.384*/385uint32_t draw_width;386uint32_t draw_height;387uint32_t num_layers;388389/** @} */390/** @{ Tile information, depending on MSAA and float color buffer. */391uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */392uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */393394uint32_t tile_width; /** @< Width of a tile. */395uint32_t tile_height; /** @< Height of a tile. */396/** maximum internal_bpp of all color render targets. */397uint32_t internal_bpp;398399/** Whether the current rendering is in a 4X MSAA tile buffer. */400bool msaa;401/** @} */402403/* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the404* first rendering.405*/406uint32_t clear;407/* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw408* call without having been cleared first.409*/410uint32_t load;411/* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to412* (either clears or draws) and should be stored.413*/414uint32_t store;415uint32_t clear_color[4][4];416float clear_z;417uint8_t clear_s;418419/**420* Set if some drawing (triangles, blits, or just a glClear()) has421* been done to the FBO, meaning that we need to422* DRM_IOCTL_V3D_SUBMIT_CL.423*/424bool needs_flush;425426/* Set if any shader has dirtied cachelines in the TMU that need to be427* flushed before job end.428*/429bool tmu_dirty_rcl;430431/**432* Set if a packet enabling TF has been emitted in the job (V3D 4.x).433*/434bool tf_enabled;435436/**437* Current EZ state for drawing. Updated at the start of draw after438* we've decided on the shader being rendered.439*/440enum v3d_ez_state ez_state;441/**442* The first EZ state that was used for drawing with a decided EZ443* direction (so either UNDECIDED, GT, or LT).444*/445enum v3d_ez_state first_ez_state;446447/**448* Number of draw calls (not counting full buffer clears) queued in449* the current job.450*/451uint32_t draw_calls_queued;452453/**454* Number of draw calls (not counting full buffer clears) queued in455* the current job during active transform feedback.456*/457uint32_t tf_draw_calls_queued;458459struct v3d_job_key key;460};461462struct v3d_context {463struct pipe_context base;464465int fd;466struct v3d_screen *screen;467468/** The 3D rendering job for the currently bound FBO. */469struct v3d_job *job;470471/* Map from struct v3d_job_key to the job for that FBO.472*/473struct hash_table *jobs;474475/**476* Map from v3d_resource to a job writing to that resource.477*478* Primarily for flushing jobs rendering to textures that are now479* being read from.480*/481struct hash_table *write_jobs;482483struct slab_child_pool transfer_pool;484struct blitter_context *blitter;485486/** bitfield of V3D_DIRTY_* */487uint64_t dirty;488489struct primconvert_context *primconvert;490491uint32_t next_uncompiled_program_id;492uint64_t next_compiled_program_id;493494struct v3d_compiler_state *compiler_state;495496uint8_t prim_mode;497498/** Maximum index buffer valid for the current shader_rec. */499uint32_t max_index;500501/** Sync object that our RCL or TFU job will update as its out_sync. */502uint32_t out_sync;503504/* Stream uploader used by gallium internals. This could also be used505* by driver internals, but we tend to use the v3d_cl.h interfaces506* instead.507*/508struct u_upload_mgr *uploader;509/* State uploader used inside the driver. This is for packing bits of510* long-term state inside buffers, since the kernel interfaces511* allocate a page at a time.512*/513struct u_upload_mgr *state_uploader;514515struct pipe_shader_state *sand8_blit_vs;516struct pipe_shader_state *sand8_blit_fs_luma;517struct pipe_shader_state *sand8_blit_fs_chroma;518519/** @{ Current pipeline state objects */520struct pipe_scissor_state scissor;521struct v3d_blend_state *blend;522struct v3d_rasterizer_state *rasterizer;523struct v3d_depth_stencil_alpha_state *zsa;524525struct v3d_program_stateobj prog;526uint32_t compute_num_workgroups[3];527struct v3d_bo *compute_shared_memory;528529struct v3d_vertex_stateobj *vtx;530531struct {532struct pipe_blend_color f;533uint16_t hf[4];534} blend_color;535struct pipe_stencil_ref stencil_ref;536unsigned sample_mask;537struct pipe_framebuffer_state framebuffer;538539/* Per render target, whether we should swap the R and B fields in the540* shader's color output and in blending. If render targets disagree541* on the R/B swap and use the constant color, then we would need to542* fall back to in-shader blending.543*/544uint8_t swap_color_rb;545546/* Per render target, whether we should treat the dst alpha values as547* one in blending.548*549* For RGBX formats, the tile buffer's alpha channel will be550* undefined.551*/552uint8_t blend_dst_alpha_one;553554bool active_queries;555556/**557* If a compute job writes a resource read by a non-compute stage we558* should sync on the last compute job.559*/560bool sync_on_last_compute_job;561562uint32_t tf_prims_generated;563uint32_t prims_generated;564565struct pipe_poly_stipple stipple;566struct pipe_clip_state clip;567struct pipe_viewport_state viewport;568struct v3d_ssbo_stateobj ssbo[PIPE_SHADER_TYPES];569struct v3d_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];570struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];571struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES];572struct v3d_vertexbuf_stateobj vertexbuf;573struct v3d_streamout_stateobj streamout;574struct v3d_bo *current_oq;575struct pipe_resource *prim_counts;576uint32_t prim_counts_offset;577struct pipe_debug_callback debug;578/** @} */579};580581struct v3d_rasterizer_state {582struct pipe_rasterizer_state base;583584float point_size;585586uint8_t depth_offset[9];587uint8_t depth_offset_z16[9];588};589590struct v3d_depth_stencil_alpha_state {591struct pipe_depth_stencil_alpha_state base;592593enum v3d_ez_state ez_state;594595uint8_t stencil_front[6];596uint8_t stencil_back[6];597};598599struct v3d_blend_state {600struct pipe_blend_state base;601602/* Per-RT mask of whether blending is enabled. */603uint8_t blend_enables;604};605606#define perf_debug(...) do { \607if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \608fprintf(stderr, __VA_ARGS__); \609if (unlikely(v3d->debug.debug_message)) \610pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \611} while (0)612613static inline struct v3d_context *614v3d_context(struct pipe_context *pcontext)615{616return (struct v3d_context *)pcontext;617}618619static inline struct v3d_sampler_view *620v3d_sampler_view(struct pipe_sampler_view *psview)621{622return (struct v3d_sampler_view *)psview;623}624625static inline struct v3d_sampler_state *626v3d_sampler_state(struct pipe_sampler_state *psampler)627{628return (struct v3d_sampler_state *)psampler;629}630631static inline struct v3d_stream_output_target *632v3d_stream_output_target(struct pipe_stream_output_target *ptarget)633{634return (struct v3d_stream_output_target *)ptarget;635}636637static inline uint32_t638v3d_stream_output_target_get_vertex_count(struct pipe_stream_output_target *ptarget)639{640return v3d_stream_output_target(ptarget)->recorded_vertex_count;641}642643struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,644void *priv, unsigned flags);645void v3d_program_init(struct pipe_context *pctx);646void v3d_program_fini(struct pipe_context *pctx);647void v3d_query_init(struct pipe_context *pctx);648649static inline int650v3d_ioctl(int fd, unsigned long request, void *arg)651{652if (using_v3d_simulator)653return v3d_simulator_ioctl(fd, request, arg);654else655return drmIoctl(fd, request, arg);656}657658static inline bool659v3d_transform_feedback_enabled(struct v3d_context *v3d)660{661return (v3d->prog.bind_vs->num_tf_specs != 0 ||662(v3d->prog.bind_gs && v3d->prog.bind_gs->num_tf_specs != 0)) &&663v3d->active_queries;664}665666void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);667struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,668struct v3d_job *job,669struct v3d_compiled_shader *shader,670enum pipe_shader_type stage);671672void v3d_flush(struct pipe_context *pctx);673void v3d_job_init(struct v3d_context *v3d);674struct v3d_job *v3d_job_create(struct v3d_context *v3d);675void v3d_job_free(struct v3d_context *v3d, struct v3d_job *job);676struct v3d_job *v3d_get_job(struct v3d_context *v3d,677uint32_t nr_cbufs,678struct pipe_surface **cbufs,679struct pipe_surface *zsbuf,680struct pipe_surface *bbuf);681struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);682void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);683void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);684void v3d_job_add_tf_write_resource(struct v3d_job *job, struct pipe_resource *prsc);685void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);686void v3d_flush_jobs_using_bo(struct v3d_context *v3d, struct v3d_bo *bo);687void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,688struct pipe_resource *prsc,689enum v3d_flush_cond flush_cond,690bool is_compute_pipeline);691void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,692struct pipe_resource *prsc,693enum v3d_flush_cond flush_cond,694bool is_compute_pipeline);695void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);696void v3d_update_compiled_cs(struct v3d_context *v3d);697698bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,699enum pipe_format f);700bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,701enum pipe_format f);702uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);703uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);704uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,705enum pipe_format f,706enum pipe_tex_compare compare);707uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,708enum pipe_format f);709const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,710enum pipe_format f);711void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,712uint32_t format,713uint32_t *type,714uint32_t *bpp);715bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo,716uint32_t tex_format,717bool for_mipmap);718bool v3d_format_supports_tlb_msaa_resolve(const struct v3d_device_info *devinfo,719enum pipe_format f);720721void v3d_init_query_functions(struct v3d_context *v3d);722void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);723void v3d_blitter_save(struct v3d_context *v3d);724bool v3d_generate_mipmap(struct pipe_context *pctx,725struct pipe_resource *prsc,726enum pipe_format format,727unsigned int base_level,728unsigned int last_level,729unsigned int first_layer,730unsigned int last_layer);731732struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);733734void v3d_update_primitive_counters(struct v3d_context *v3d);735736bool v3d_line_smoothing_enabled(struct v3d_context *v3d);737738float v3d_get_real_line_width(struct v3d_context *v3d);739740void v3d_flag_dirty_sampler_state(struct v3d_context *v3d,741enum pipe_shader_type shader);742743void v3d_create_texture_shader_state_bo(struct v3d_context *v3d,744struct v3d_sampler_view *so);745746void v3d_get_tile_buffer_size(bool is_msaa,747uint32_t nr_cbufs,748struct pipe_surface **cbufs,749struct pipe_surface *bbuf,750uint32_t *tile_width,751uint32_t *tile_height,752uint32_t *max_bpp);753754#ifdef v3dX755# include "v3dx_context.h"756#else757# define v3dX(x) v3d33_##x758# include "v3dx_context.h"759# undef v3dX760761# define v3dX(x) v3d41_##x762# include "v3dx_context.h"763# undef v3dX764#endif765766#endif /* V3D_CONTEXT_H */767768769