Path: blob/21.2-virgl/src/gallium/drivers/vc4/kernel/vc4_drv.h
4574 views
/*1* Copyright © 2014 Broadcom2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING19* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS20* IN THE SOFTWARE.21*/2223#ifndef VC4_DRV_H24#define VC4_DRV_H2526#include "vc4_simulator_validate.h"2728struct vc4_exec_info {29/* Sequence number for this bin/render job. */30uint64_t seqno;3132/* Kernel-space copy of the ioctl arguments */33struct drm_vc4_submit_cl *args;3435/* This is the array of BOs that were looked up at the start of exec.36* Command validation will use indices into this array.37*/38struct drm_gem_cma_object **bo;39uint32_t bo_count;4041/* List of other BOs used in the job that need to be released42* once the job is complete.43*/44struct list_head unref_list;4546/* Current unvalidated indices into @bo loaded by the non-hardware47* VC4_PACKET_GEM_HANDLES.48*/49uint32_t bo_index[2];5051/* This is the BO where we store the validated command lists, shader52* records, and uniforms.53*/54struct drm_gem_cma_object *exec_bo;5556/**57* This tracks the per-shader-record state (packet 64) that58* determines the length of the shader record and the offset59* it's expected to be found at. It gets read in from the60* command lists.61*/62struct vc4_shader_state {63uint32_t addr;64/* Maximum vertex index referenced by any primitive using this65* shader state.66*/67uint32_t max_index;68} *shader_state;6970/** How many shader states the user declared they were using. */71uint32_t shader_state_size;72/** How many shader state records the validator has seen. */73uint32_t shader_state_count;7475bool found_tile_binning_mode_config_packet;76bool found_start_tile_binning_packet;77bool found_increment_semaphore_packet;78bool found_flush;79uint8_t bin_tiles_x, bin_tiles_y;80struct drm_gem_cma_object *tile_bo;81uint32_t tile_alloc_offset;8283uint32_t tile_width, tile_height;8485/**86* Computed addresses pointing into exec_bo where we start the87* bin thread (ct0) and render thread (ct1).88*/89uint32_t ct0ca, ct0ea;90uint32_t ct1ca, ct1ea;9192/* Pointer to the unvalidated bin CL (if present). */93void *bin_u;9495/* Pointers to the shader recs. These paddr gets incremented as CL96* packets are relocated in validate_gl_shader_state, and the vaddrs97* (u and v) get incremented and size decremented as the shader recs98* themselves are validated.99*/100void *shader_rec_u;101void *shader_rec_v;102uint32_t shader_rec_p;103uint32_t shader_rec_size;104105/* Pointers to the uniform data. These pointers are incremented, and106* size decremented, as each batch of uniforms is uploaded.107*/108void *uniforms_u;109void *uniforms_v;110uint32_t uniforms_p;111uint32_t uniforms_size;112};113114/**115* struct vc4_texture_sample_info - saves the offsets into the UBO for texture116* setup parameters.117*118* This will be used at draw time to relocate the reference to the texture119* contents in p0, and validate that the offset combined with120* width/height/stride/etc. from p1 and p2/p3 doesn't sample outside the BO.121* Note that the hardware treats unprovided config parameters as 0, so not all122* of them need to be set up for every texture sample, and we'll store ~0 as123* the offset to mark the unused ones.124*125* See the VC4 3D architecture guide page 41 ("Texture and Memory Lookup Unit126* Setup") for definitions of the texture parameters.127*/128struct vc4_texture_sample_info {129bool is_direct;130uint32_t p_offset[4];131};132133/**134* struct vc4_validated_shader_info - information about validated shaders that135* needs to be used from command list validation.136*137* For a given shader, each time a shader state record references it, we need138* to verify that the shader doesn't read more uniforms than the shader state139* record's uniform BO pointer can provide, and we need to apply relocations140* and validate the shader state record's uniforms that define the texture141* samples.142*/143struct vc4_validated_shader_info144{145uint32_t uniforms_size;146uint32_t uniforms_src_size;147uint32_t num_texture_samples;148struct vc4_texture_sample_info *texture_samples;149150uint32_t num_uniform_addr_offsets;151uint32_t *uniform_addr_offsets;152153bool is_threaded;154};155156/* vc4_validate.c */157int158vc4_validate_bin_cl(struct drm_device *dev,159void *validated,160void *unvalidated,161struct vc4_exec_info *exec);162163int164vc4_validate_shader_recs(struct drm_device *dev, struct vc4_exec_info *exec);165166struct vc4_validated_shader_info *167vc4_validate_shader(struct drm_gem_cma_object *shader_obj);168169struct drm_gem_cma_object *vc4_use_bo(struct vc4_exec_info *exec,170uint32_t hindex);171172int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec);173174bool vc4_check_tex_size(struct vc4_exec_info *exec,175struct drm_gem_cma_object *fbo,176uint32_t offset, uint8_t tiling_format,177uint32_t width, uint32_t height, uint8_t cpp);178179#endif /* VC4_DRV_H */180181182