Path: blob/21.2-virgl/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
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/*1* Copyright © 2011 Marek Olšák <[email protected]>2* All Rights Reserved.3*4* Permission is hereby granted, free of charge, to any person obtaining5* a copy of this software and associated documentation files (the6* "Software"), to deal in the Software without restriction, including7* without limitation the rights to use, copy, modify, merge, publish,8* distribute, sub license, and/or sell copies of the Software, and to9* permit persons to whom the Software is furnished to do so, subject to10* the following conditions:11*12* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES14* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND15* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS16* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER17* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,18* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE19* USE OR OTHER DEALINGS IN THE SOFTWARE.20*21* The above copyright notice and this permission notice (including the22* next paragraph) shall be included in all copies or substantial portions23* of the Software.24*/2526#ifndef RADEON_DRM_CS_H27#define RADEON_DRM_CS_H2829#include "radeon_drm_bo.h"3031struct radeon_ctx {32struct radeon_drm_winsys *ws;33uint32_t gpu_reset_counter;34};3536struct radeon_bo_item {37struct radeon_bo *bo;38union {39struct {40uint32_t priority_usage;41} real;42struct {43unsigned real_idx;44} slab;45} u;46};4748struct radeon_cs_context {49uint32_t buf[16 * 1024];5051int fd;52struct drm_radeon_cs cs;53struct drm_radeon_cs_chunk chunks[3];54uint64_t chunk_array[3];55uint32_t flags[2];5657/* Buffers. */58unsigned max_relocs;59unsigned num_relocs;60unsigned num_validated_relocs;61struct radeon_bo_item *relocs_bo;62struct drm_radeon_cs_reloc *relocs;6364unsigned num_slab_buffers;65unsigned max_slab_buffers;66struct radeon_bo_item *slab_buffers;6768int reloc_indices_hashlist[4096];69};7071struct radeon_drm_cs {72enum ring_type ring_type;7374/* We flip between these two CS. While one is being consumed75* by the kernel in another thread, the other one is being filled76* by the pipe driver. */77struct radeon_cs_context csc1;78struct radeon_cs_context csc2;79/* The currently-used CS. */80struct radeon_cs_context *csc;81/* The CS being currently-owned by the other thread. */82struct radeon_cs_context *cst;8384/* The winsys. */85struct radeon_drm_winsys *ws;8687/* Flush CS. */88void (*flush_cs)(void *ctx, unsigned flags, struct pipe_fence_handle **fence);89void *flush_data;9091struct util_queue_fence flush_completed;92struct pipe_fence_handle *next_fence;93};9495int radeon_lookup_buffer(struct radeon_cs_context *csc, struct radeon_bo *bo);9697static inline struct radeon_drm_cs *98radeon_drm_cs(struct radeon_cmdbuf *rcs)99{100return (struct radeon_drm_cs*)rcs->priv;101}102103static inline bool104radeon_bo_is_referenced_by_cs(struct radeon_drm_cs *cs,105struct radeon_bo *bo)106{107int num_refs = bo->num_cs_references;108return num_refs == bo->rws->num_cs ||109(num_refs && radeon_lookup_buffer(cs->csc, bo) != -1);110}111112static inline bool113radeon_bo_is_referenced_by_cs_for_write(struct radeon_drm_cs *cs,114struct radeon_bo *bo)115{116int index;117118if (!bo->num_cs_references)119return false;120121index = radeon_lookup_buffer(cs->csc, bo);122if (index == -1)123return false;124125if (!bo->handle)126index = cs->csc->slab_buffers[index].u.slab.real_idx;127128return cs->csc->relocs[index].write_domain != 0;129}130131static inline bool132radeon_bo_is_referenced_by_any_cs(struct radeon_bo *bo)133{134return bo->num_cs_references != 0;135}136137void radeon_drm_cs_sync_flush(struct radeon_cmdbuf *rcs);138void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws);139void radeon_drm_cs_emit_ioctl_oneshot(void *job, void *gdata, int thread_index);140141#endif142143144