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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
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/*
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* Copyright © 2011 Marek Olšák <[email protected]>
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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#ifndef RADEON_DRM_CS_H
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#define RADEON_DRM_CS_H
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#include "radeon_drm_bo.h"
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struct radeon_ctx {
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struct radeon_drm_winsys *ws;
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uint32_t gpu_reset_counter;
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};
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struct radeon_bo_item {
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struct radeon_bo *bo;
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union {
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struct {
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uint32_t priority_usage;
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} real;
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struct {
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unsigned real_idx;
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} slab;
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} u;
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};
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struct radeon_cs_context {
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uint32_t buf[16 * 1024];
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int fd;
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struct drm_radeon_cs cs;
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struct drm_radeon_cs_chunk chunks[3];
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uint64_t chunk_array[3];
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uint32_t flags[2];
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/* Buffers. */
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unsigned max_relocs;
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unsigned num_relocs;
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unsigned num_validated_relocs;
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struct radeon_bo_item *relocs_bo;
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struct drm_radeon_cs_reloc *relocs;
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unsigned num_slab_buffers;
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unsigned max_slab_buffers;
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struct radeon_bo_item *slab_buffers;
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int reloc_indices_hashlist[4096];
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};
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struct radeon_drm_cs {
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enum ring_type ring_type;
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/* We flip between these two CS. While one is being consumed
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* by the kernel in another thread, the other one is being filled
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* by the pipe driver. */
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struct radeon_cs_context csc1;
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struct radeon_cs_context csc2;
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/* The currently-used CS. */
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struct radeon_cs_context *csc;
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/* The CS being currently-owned by the other thread. */
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struct radeon_cs_context *cst;
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/* The winsys. */
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struct radeon_drm_winsys *ws;
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/* Flush CS. */
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void (*flush_cs)(void *ctx, unsigned flags, struct pipe_fence_handle **fence);
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void *flush_data;
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struct util_queue_fence flush_completed;
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struct pipe_fence_handle *next_fence;
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};
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int radeon_lookup_buffer(struct radeon_cs_context *csc, struct radeon_bo *bo);
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static inline struct radeon_drm_cs *
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radeon_drm_cs(struct radeon_cmdbuf *rcs)
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{
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return (struct radeon_drm_cs*)rcs->priv;
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}
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static inline bool
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radeon_bo_is_referenced_by_cs(struct radeon_drm_cs *cs,
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struct radeon_bo *bo)
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{
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int num_refs = bo->num_cs_references;
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return num_refs == bo->rws->num_cs ||
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(num_refs && radeon_lookup_buffer(cs->csc, bo) != -1);
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}
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static inline bool
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radeon_bo_is_referenced_by_cs_for_write(struct radeon_drm_cs *cs,
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struct radeon_bo *bo)
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{
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int index;
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if (!bo->num_cs_references)
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return false;
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index = radeon_lookup_buffer(cs->csc, bo);
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if (index == -1)
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return false;
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if (!bo->handle)
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index = cs->csc->slab_buffers[index].u.slab.real_idx;
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return cs->csc->relocs[index].write_domain != 0;
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}
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static inline bool
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radeon_bo_is_referenced_by_any_cs(struct radeon_bo *bo)
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{
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return bo->num_cs_references != 0;
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}
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void radeon_drm_cs_sync_flush(struct radeon_cmdbuf *rcs);
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void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws);
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void radeon_drm_cs_emit_ioctl_oneshot(void *job, void *gdata, int thread_index);
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#endif
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