Path: blob/21.2-virgl/src/gallium/winsys/svga/drm/vmw_screen.h
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/**********************************************************1* Copyright 2009-2015 VMware, Inc. All rights reserved.2*3* Permission is hereby granted, free of charge, to any person4* obtaining a copy of this software and associated documentation5* files (the "Software"), to deal in the Software without6* restriction, including without limitation the rights to use, copy,7* modify, merge, publish, distribute, sublicense, and/or sell copies8* of the Software, and to permit persons to whom the Software is9* furnished to do so, subject to the following conditions:10*11* The above copyright notice and this permission notice shall be12* included in all copies or substantial portions of the Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,15* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF16* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND17* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS18* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN19* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN20* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE21* SOFTWARE.22*23**********************************************************/2425/**26* @file27* Common definitions for the VMware SVGA winsys.28*29* @author Jose Fonseca <[email protected]>30*/313233#ifndef VMW_SCREEN_H_34#define VMW_SCREEN_H_353637#include "pipe/p_compiler.h"38#include "pipe/p_state.h"3940#include "svga_winsys.h"41#include "pipebuffer/pb_buffer_fenced.h"42#include <os/os_thread.h>43#include <sys/types.h>4445#define VMW_GMR_POOL_SIZE (16*1024*1024)46#define VMW_QUERY_POOL_SIZE (8192)47#define VMW_DEBUG_FLUSH_STACK 104849/*50* Something big, but arbitrary. The kernel reports an error if it can't51* handle this, and the svga driver will resort to multiple partial52* uploads.53*/54#define VMW_MAX_BUFFER_SIZE (512*1024*1024)5556struct pb_manager;57struct vmw_region;5859struct vmw_cap_3d {60boolean has_cap;61SVGA3dDevCapResult result;62};6364struct vmw_winsys_screen65{66struct svga_winsys_screen base;6768struct {69int drm_fd;70uint32_t hwversion;71uint32_t num_cap_3d;72struct vmw_cap_3d *cap_3d;73uint64_t max_mob_memory;74uint64_t max_surface_memory;75uint64_t max_texture_size;76boolean have_drm_2_6;77boolean have_drm_2_9;78uint32_t drm_execbuf_version;79boolean have_drm_2_15;80boolean have_drm_2_16;81boolean have_drm_2_17;82boolean have_drm_2_18;83} ioctl;8485struct {86struct pb_manager *gmr;87struct pb_manager *gmr_mm;88struct pb_manager *gmr_fenced;89struct pb_manager *gmr_slab;90struct pb_manager *gmr_slab_fenced;91struct pb_manager *query_mm;92struct pb_manager *query_fenced;93struct pb_manager *mob_fenced;94struct pb_manager *mob_cache;95struct pb_manager *mob_shader_slab;96struct pb_manager *mob_shader_slab_fenced;97} pools;9899struct pb_fence_ops *fence_ops;100101/*102* Screen instances103*/104dev_t device;105int open_count;106107cnd_t cs_cond;108mtx_t cs_mutex;109110boolean force_coherent;111boolean cache_maps;112};113114115static inline struct vmw_winsys_screen *116vmw_winsys_screen(struct svga_winsys_screen *base)117{118return (struct vmw_winsys_screen *)base;119}120121/* */122uint32_t123vmw_region_size(struct vmw_region *region);124125uint32126vmw_ioctl_context_create(struct vmw_winsys_screen *vws);127128uint32129vmw_ioctl_extended_context_create(struct vmw_winsys_screen *vws,130boolean vgpu10);131132void133vmw_ioctl_context_destroy(struct vmw_winsys_screen *vws,134uint32 cid);135136uint32137vmw_ioctl_surface_create(struct vmw_winsys_screen *vws,138SVGA3dSurface1Flags flags,139SVGA3dSurfaceFormat format,140unsigned usage,141SVGA3dSize size,142uint32 numFaces,143uint32 numMipLevels,144unsigned sampleCount);145uint32146vmw_ioctl_gb_surface_create(struct vmw_winsys_screen *vws,147SVGA3dSurfaceAllFlags flags,148SVGA3dSurfaceFormat format,149unsigned usage,150SVGA3dSize size,151uint32 numFaces,152uint32 numMipLevels,153unsigned sampleCount,154uint32 buffer_handle,155SVGA3dMSPattern multisamplePattern,156SVGA3dMSQualityLevel qualityLevel,157struct vmw_region **p_region);158159int160vmw_ioctl_gb_surface_ref(struct vmw_winsys_screen *vws,161const struct winsys_handle *whandle,162SVGA3dSurfaceAllFlags *flags,163SVGA3dSurfaceFormat *format,164uint32_t *numMipLevels,165uint32_t *handle,166struct vmw_region **p_region);167168void169vmw_ioctl_surface_destroy(struct vmw_winsys_screen *vws,170uint32 sid);171172void173vmw_ioctl_command(struct vmw_winsys_screen *vws,174int32_t cid,175uint32_t throttle_us,176void *commands,177uint32_t size,178struct pipe_fence_handle **fence,179int32_t imported_fence_fd,180uint32_t flags);181182struct vmw_region *183vmw_ioctl_region_create(struct vmw_winsys_screen *vws, uint32_t size);184185void186vmw_ioctl_region_destroy(struct vmw_region *region);187188struct SVGAGuestPtr189vmw_ioctl_region_ptr(struct vmw_region *region);190191void *192vmw_ioctl_region_map(struct vmw_region *region);193void194vmw_ioctl_region_unmap(struct vmw_region *region);195196197int198vmw_ioctl_fence_finish(struct vmw_winsys_screen *vws,199uint32_t handle, uint32_t flags);200201int202vmw_ioctl_fence_signalled(struct vmw_winsys_screen *vws,203uint32_t handle, uint32_t flags);204205void206vmw_ioctl_fence_unref(struct vmw_winsys_screen *vws,207uint32_t handle);208209uint32210vmw_ioctl_shader_create(struct vmw_winsys_screen *vws,211SVGA3dShaderType type,212uint32 code_len);213void214vmw_ioctl_shader_destroy(struct vmw_winsys_screen *vws, uint32 shid);215216int217vmw_ioctl_syncforcpu(struct vmw_region *region,218boolean dont_block,219boolean readonly,220boolean allow_cs);221void222vmw_ioctl_releasefromcpu(struct vmw_region *region,223boolean readonly,224boolean allow_cs);225/* Initialize parts of vmw_winsys_screen at startup:226*/227boolean vmw_ioctl_init(struct vmw_winsys_screen *vws);228boolean vmw_pools_init(struct vmw_winsys_screen *vws);229boolean vmw_query_pools_init(struct vmw_winsys_screen *vws);230boolean vmw_mob_pools_init(struct vmw_winsys_screen *vws);231boolean vmw_winsys_screen_init_svga(struct vmw_winsys_screen *vws);232233void vmw_ioctl_cleanup(struct vmw_winsys_screen *vws);234void vmw_pools_cleanup(struct vmw_winsys_screen *vws);235236struct vmw_winsys_screen *vmw_winsys_create(int fd);237void vmw_winsys_destroy(struct vmw_winsys_screen *sws);238void vmw_winsys_screen_set_throttling(struct pipe_screen *screen,239uint32_t throttle_us);240241struct pb_manager *242simple_fenced_bufmgr_create(struct pb_manager *provider,243struct pb_fence_ops *ops);244void245vmw_fences_signal(struct pb_fence_ops *fence_ops,246uint32_t signaled,247uint32_t emitted,248boolean has_emitted);249250struct svga_winsys_gb_shader *251vmw_svga_winsys_shader_create(struct svga_winsys_screen *sws,252SVGA3dShaderType type,253const uint32 *bytecode,254uint32 bytecodeLen);255void256vmw_svga_winsys_shader_destroy(struct svga_winsys_screen *sws,257struct svga_winsys_gb_shader *shader);258259#endif /* VMW_SCREEN_H_ */260261262