Path: blob/21.2-virgl/src/intel/common/intel_decoder.h
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/*1* Copyright © 2016 Intel Corporation2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING19* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS20* IN THE SOFTWARE.21*/2223#ifndef INTEL_DECODER_H24#define INTEL_DECODER_H2526#include <stdint.h>27#include <stdbool.h>28#include <stdio.h>2930#include "dev/intel_device_info.h"31#include "util/hash_table.h"32#include "util/bitset.h"3334#include "drm-uapi/i915_drm.h"3536#ifdef __cplusplus37extern "C" {38#endif3940struct intel_spec;41struct intel_group;42struct intel_field;43union intel_field_value;4445#define I915_ENGINE_CLASS_TO_MASK(x) BITSET_BIT(x)4647static inline uint32_t intel_make_gen(uint32_t major, uint32_t minor)48{49return (major << 8) | minor;50}5152struct intel_group *intel_spec_find_struct(struct intel_spec *spec, const char *name);53struct intel_spec *intel_spec_load(const struct intel_device_info *devinfo);54struct intel_spec *55intel_spec_load_from_path(const struct intel_device_info *devinfo,56const char *path);57struct intel_spec *intel_spec_load_filename(const char *filename);58void intel_spec_destroy(struct intel_spec *spec);59uint32_t intel_spec_get_gen(struct intel_spec *spec);60struct intel_group *intel_spec_find_instruction(struct intel_spec *spec,61enum drm_i915_gem_engine_class engine,62const uint32_t *p);63struct intel_group *intel_spec_find_register(struct intel_spec *spec, uint32_t offset);64struct intel_group *intel_spec_find_register_by_name(struct intel_spec *spec, const char *name);65struct intel_enum *intel_spec_find_enum(struct intel_spec *spec, const char *name);6667int intel_group_get_length(struct intel_group *group, const uint32_t *p);68const char *intel_group_get_name(struct intel_group *group);69uint32_t intel_group_get_opcode(struct intel_group *group);70struct intel_field *intel_group_find_field(struct intel_group *group, const char *name);71struct intel_enum *intel_spec_find_enum(struct intel_spec *spec, const char *name);7273bool intel_field_is_header(struct intel_field *field);7475/* Only allow 5 levels of subgroup'ing76*/77#define DECODE_MAX_ARRAY_DEPTH 57879struct intel_field_iterator {80struct intel_group *group;81char name[128];82char value[128];83uint64_t raw_value;84struct intel_group *struct_desc;85const uint32_t *p;86int p_bit; /**< bit offset into p */87const uint32_t *p_end;88int start_bit; /**< current field starts at this bit offset into p */89int end_bit; /**< current field ends at this bit offset into p */9091struct intel_field *fields[DECODE_MAX_ARRAY_DEPTH];92struct intel_group *groups[DECODE_MAX_ARRAY_DEPTH];93int array_iter[DECODE_MAX_ARRAY_DEPTH];94int level;9596struct intel_field *field;97bool print_colors;98};99100struct intel_spec {101uint32_t gen;102103struct hash_table *commands;104struct hash_table *structs;105struct hash_table *registers_by_name;106struct hash_table *registers_by_offset;107struct hash_table *enums;108109struct hash_table *access_cache;110};111112struct intel_group {113struct intel_spec *spec;114char *name;115116struct intel_field *fields; /* linked list of fields */117struct intel_field *dword_length_field; /* <instruction> specific */118119uint32_t dw_length;120uint32_t engine_mask; /* <instruction> specific */121uint32_t bias; /* <instruction> specific */122uint32_t array_offset; /* <group> specific */123uint32_t array_count; /* number of elements, <group> specific */124uint32_t array_item_size; /* <group> specific */125bool variable; /* <group> specific */126bool fixed_length; /* True for <struct> & <register> */127128struct intel_group *parent;129struct intel_group *next;130131uint32_t opcode_mask;132uint32_t opcode;133134uint32_t register_offset; /* <register> specific */135};136137struct intel_value {138char *name;139uint64_t value;140};141142struct intel_enum {143char *name;144int nvalues;145struct intel_value **values;146};147148struct intel_type {149enum {150INTEL_TYPE_UNKNOWN,151INTEL_TYPE_INT,152INTEL_TYPE_UINT,153INTEL_TYPE_BOOL,154INTEL_TYPE_FLOAT,155INTEL_TYPE_ADDRESS,156INTEL_TYPE_OFFSET,157INTEL_TYPE_STRUCT,158INTEL_TYPE_UFIXED,159INTEL_TYPE_SFIXED,160INTEL_TYPE_MBO,161INTEL_TYPE_ENUM162} kind;163164/* Struct definition for INTEL_TYPE_STRUCT */165union {166struct intel_group *intel_struct;167struct intel_enum *intel_enum;168struct {169/* Integer and fractional sizes for INTEL_TYPE_UFIXED and INTEL_TYPE_SFIXED */170int i, f;171};172};173};174175union intel_field_value {176bool b32;177float f32;178uint64_t u64;179int64_t i64;180};181182struct intel_field {183struct intel_group *parent;184struct intel_field *next;185struct intel_group *array;186187char *name;188int start, end;189struct intel_type type;190bool has_default;191uint32_t default_value;192193struct intel_enum inline_enum;194};195196void intel_field_iterator_init(struct intel_field_iterator *iter,197struct intel_group *group,198const uint32_t *p, int p_bit,199bool print_colors);200201bool intel_field_iterator_next(struct intel_field_iterator *iter);202203void intel_print_group(FILE *out,204struct intel_group *group,205uint64_t offset, const uint32_t *p, int p_bit,206bool color);207208enum intel_batch_decode_flags {209/** Print in color! */210INTEL_BATCH_DECODE_IN_COLOR = (1 << 0),211/** Print everything, not just headers */212INTEL_BATCH_DECODE_FULL = (1 << 1),213/** Print offsets along with the batch */214INTEL_BATCH_DECODE_OFFSETS = (1 << 2),215/** Guess when a value is a float and print it as such */216INTEL_BATCH_DECODE_FLOATS = (1 << 3),217};218219struct intel_batch_decode_bo {220uint64_t addr;221uint32_t size;222const void *map;223};224225struct intel_batch_decode_ctx {226/**227* Return information about the buffer containing the given address.228*229* If the given address is inside a buffer, the map pointer should be230* offset accordingly so it points at the data corresponding to address.231*/232struct intel_batch_decode_bo (*get_bo)(void *user_data, bool ppgtt, uint64_t address);233unsigned (*get_state_size)(void *user_data,234uint64_t address,235uint64_t base_address);236void *user_data;237238FILE *fp;239struct intel_device_info devinfo;240struct intel_spec *spec;241enum intel_batch_decode_flags flags;242243bool use_256B_binding_tables;244uint64_t surface_base;245uint64_t bt_pool_base;246uint64_t dynamic_base;247uint64_t instruction_base;248249int max_vbo_decoded_lines;250251enum drm_i915_gem_engine_class engine;252253int n_batch_buffer_start;254};255256void intel_batch_decode_ctx_init(struct intel_batch_decode_ctx *ctx,257const struct intel_device_info *devinfo,258FILE *fp, enum intel_batch_decode_flags flags,259const char *xml_path,260struct intel_batch_decode_bo (*get_bo)(void *,261bool,262uint64_t),263unsigned (*get_state_size)(void *, uint64_t,264uint64_t),265void *user_data);266void intel_batch_decode_ctx_finish(struct intel_batch_decode_ctx *ctx);267268269void intel_print_batch(struct intel_batch_decode_ctx *ctx,270const uint32_t *batch, uint32_t batch_size,271uint64_t batch_addr, bool from_ring);272273#ifdef __cplusplus274}275#endif276277278#endif /* INTEL_DECODER_H */279280281