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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/intel/compiler/brw_cfg.cpp
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/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <[email protected]>
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*
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*/
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#include "brw_cfg.h"
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#include "brw_shader.h"
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/** @file brw_cfg.cpp
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*
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* Walks the shader instructions generated and creates a set of basic
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* blocks with successor/predecessor edges connecting them.
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*/
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using namespace brw;
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static bblock_t *
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pop_stack(exec_list *list)
41
{
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bblock_link *link = (bblock_link *)list->get_tail();
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bblock_t *block = link->block;
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link->link.remove();
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return block;
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}
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static exec_node *
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link(void *mem_ctx, bblock_t *block, enum bblock_link_kind kind)
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{
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bblock_link *l = new(mem_ctx) bblock_link(block, kind);
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return &l->link;
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}
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void
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push_stack(exec_list *list, void *mem_ctx, bblock_t *block)
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{
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/* The kind of the link is immaterial, but we need to provide one since
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* this is (ab)using the edge data structure in order to implement a stack.
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*/
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list->push_tail(link(mem_ctx, block, bblock_link_logical));
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}
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bblock_t::bblock_t(cfg_t *cfg) :
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cfg(cfg), start_ip(0), end_ip(0), end_ip_delta(0), num(0)
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{
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instructions.make_empty();
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parents.make_empty();
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children.make_empty();
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}
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void
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bblock_t::add_successor(void *mem_ctx, bblock_t *successor,
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enum bblock_link_kind kind)
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{
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successor->parents.push_tail(::link(mem_ctx, this, kind));
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children.push_tail(::link(mem_ctx, successor, kind));
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}
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bool
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bblock_t::is_predecessor_of(const bblock_t *block,
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enum bblock_link_kind kind) const
84
{
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foreach_list_typed_safe (bblock_link, parent, link, &block->parents) {
86
if (parent->block == this && parent->kind <= kind) {
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return true;
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}
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}
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return false;
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}
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bool
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bblock_t::is_successor_of(const bblock_t *block,
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enum bblock_link_kind kind) const
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{
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foreach_list_typed_safe (bblock_link, child, link, &block->children) {
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if (child->block == this && child->kind <= kind) {
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return true;
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}
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}
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return false;
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}
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static bool
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ends_block(const backend_instruction *inst)
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{
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enum opcode op = inst->opcode;
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return op == BRW_OPCODE_IF ||
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op == BRW_OPCODE_ELSE ||
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op == BRW_OPCODE_CONTINUE ||
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op == BRW_OPCODE_BREAK ||
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op == BRW_OPCODE_DO ||
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op == BRW_OPCODE_WHILE;
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}
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static bool
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starts_block(const backend_instruction *inst)
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{
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enum opcode op = inst->opcode;
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return op == BRW_OPCODE_DO ||
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op == BRW_OPCODE_ENDIF;
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}
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bool
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bblock_t::can_combine_with(const bblock_t *that) const
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{
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if ((const bblock_t *)this->link.next != that)
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return false;
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if (ends_block(this->end()) ||
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starts_block(that->start()))
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return false;
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return true;
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}
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void
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bblock_t::combine_with(bblock_t *that)
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{
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assert(this->can_combine_with(that));
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foreach_list_typed (bblock_link, link, link, &that->parents) {
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assert(link->block == this);
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}
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this->end_ip = that->end_ip;
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this->instructions.append_list(&that->instructions);
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this->cfg->remove_block(that);
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}
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void
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bblock_t::dump() const
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{
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const backend_shader *s = this->cfg->s;
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int ip = this->start_ip;
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foreach_inst_in_block(backend_instruction, inst, this) {
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fprintf(stderr, "%5d: ", ip);
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s->dump_instruction(inst);
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ip++;
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}
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}
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cfg_t::cfg_t(const backend_shader *s, exec_list *instructions) :
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s(s)
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{
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mem_ctx = ralloc_context(NULL);
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block_list.make_empty();
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blocks = NULL;
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num_blocks = 0;
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bblock_t *cur = NULL;
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int ip = 0;
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bblock_t *entry = new_block();
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bblock_t *cur_if = NULL; /**< BB ending with IF. */
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bblock_t *cur_else = NULL; /**< BB ending with ELSE. */
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bblock_t *cur_endif = NULL; /**< BB starting with ENDIF. */
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bblock_t *cur_do = NULL; /**< BB starting with DO. */
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bblock_t *cur_while = NULL; /**< BB immediately following WHILE. */
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exec_list if_stack, else_stack, do_stack, while_stack;
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bblock_t *next;
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set_next_block(&cur, entry, ip);
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foreach_in_list_safe(backend_instruction, inst, instructions) {
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/* set_next_block wants the post-incremented ip */
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ip++;
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inst->exec_node::remove();
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switch (inst->opcode) {
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case BRW_OPCODE_IF:
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cur->instructions.push_tail(inst);
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/* Push our information onto a stack so we can recover from
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* nested ifs.
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*/
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push_stack(&if_stack, mem_ctx, cur_if);
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push_stack(&else_stack, mem_ctx, cur_else);
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cur_if = cur;
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cur_else = NULL;
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cur_endif = NULL;
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/* Set up our immediately following block, full of "then"
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* instructions.
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*/
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next = new_block();
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cur_if->add_successor(mem_ctx, next, bblock_link_logical);
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set_next_block(&cur, next, ip);
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break;
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case BRW_OPCODE_ELSE:
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cur->instructions.push_tail(inst);
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cur_else = cur;
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next = new_block();
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assert(cur_if != NULL);
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cur_if->add_successor(mem_ctx, next, bblock_link_logical);
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cur_else->add_successor(mem_ctx, next, bblock_link_physical);
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set_next_block(&cur, next, ip);
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break;
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case BRW_OPCODE_ENDIF: {
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if (cur->instructions.is_empty()) {
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/* New block was just created; use it. */
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cur_endif = cur;
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} else {
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cur_endif = new_block();
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cur->add_successor(mem_ctx, cur_endif, bblock_link_logical);
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set_next_block(&cur, cur_endif, ip - 1);
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}
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cur->instructions.push_tail(inst);
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if (cur_else) {
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cur_else->add_successor(mem_ctx, cur_endif, bblock_link_logical);
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} else {
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assert(cur_if != NULL);
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cur_if->add_successor(mem_ctx, cur_endif, bblock_link_logical);
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}
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assert(cur_if->end()->opcode == BRW_OPCODE_IF);
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assert(!cur_else || cur_else->end()->opcode == BRW_OPCODE_ELSE);
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/* Pop the stack so we're in the previous if/else/endif */
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cur_if = pop_stack(&if_stack);
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cur_else = pop_stack(&else_stack);
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break;
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}
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case BRW_OPCODE_DO:
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/* Push our information onto a stack so we can recover from
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* nested loops.
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*/
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push_stack(&do_stack, mem_ctx, cur_do);
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push_stack(&while_stack, mem_ctx, cur_while);
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/* Set up the block just after the while. Don't know when exactly
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* it will start, yet.
271
*/
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cur_while = new_block();
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if (cur->instructions.is_empty()) {
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/* New block was just created; use it. */
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cur_do = cur;
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} else {
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cur_do = new_block();
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cur->add_successor(mem_ctx, cur_do, bblock_link_logical);
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set_next_block(&cur, cur_do, ip - 1);
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}
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cur->instructions.push_tail(inst);
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/* Represent divergent execution of the loop as a pair of alternative
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* edges coming out of the DO instruction: For any physical iteration
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* of the loop a given logical thread can either start off enabled
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* (which is represented as the "next" successor), or disabled (if it
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* has reached a non-uniform exit of the loop during a previous
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* iteration, which is represented as the "cur_while" successor).
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*
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* The disabled edge will be taken by the logical thread anytime we
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* arrive at the DO instruction through a back-edge coming from a
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* conditional exit of the loop where divergent control flow started.
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*
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* This guarantees that there is a control-flow path from any
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* divergence point of the loop into the convergence point
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* (immediately past the WHILE instruction) such that it overlaps the
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* whole IP region of divergent control flow (potentially the whole
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* loop) *and* doesn't imply the execution of any instructions part
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* of the loop (since the corresponding execution mask bit will be
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* disabled for a diverging thread).
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*
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* This way we make sure that any variables that are live throughout
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* the region of divergence for an inactive logical thread are also
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* considered to interfere with any other variables assigned by
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* active logical threads within the same physical region of the
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* program, since otherwise we would risk cross-channel data
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* corruption.
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*/
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next = new_block();
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cur->add_successor(mem_ctx, next, bblock_link_logical);
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cur->add_successor(mem_ctx, cur_while, bblock_link_physical);
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set_next_block(&cur, next, ip);
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break;
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case BRW_OPCODE_CONTINUE:
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cur->instructions.push_tail(inst);
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/* A conditional CONTINUE may start a region of divergent control
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* flow until the start of the next loop iteration (*not* until the
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* end of the loop which is why the successor is not the top-level
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* divergence point at cur_do). The live interval of any variable
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* extending through a CONTINUE edge is guaranteed to overlap the
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* whole region of divergent execution, because any variable live-out
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* at the CONTINUE instruction will also be live-in at the top of the
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* loop, and therefore also live-out at the bottom-most point of the
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* loop which is reachable from the top (since a control flow path
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* exists from a definition of the variable through this CONTINUE
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* instruction, the top of the loop, the (reachable) bottom of the
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* loop, the top of the loop again, into a use of the variable).
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*/
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assert(cur_do != NULL);
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cur->add_successor(mem_ctx, cur_do->next(), bblock_link_logical);
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338
next = new_block();
339
if (inst->predicate)
340
cur->add_successor(mem_ctx, next, bblock_link_logical);
341
else
342
cur->add_successor(mem_ctx, next, bblock_link_physical);
343
344
set_next_block(&cur, next, ip);
345
break;
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347
case BRW_OPCODE_BREAK:
348
cur->instructions.push_tail(inst);
349
350
/* A conditional BREAK instruction may start a region of divergent
351
* control flow until the end of the loop if the condition is
352
* non-uniform, in which case the loop will execute additional
353
* iterations with the present channel disabled. We model this as a
354
* control flow path from the divergence point to the convergence
355
* point that overlaps the whole IP range of the loop and skips over
356
* the execution of any other instructions part of the loop.
357
*
358
* See the DO case for additional explanation.
359
*/
360
assert(cur_do != NULL);
361
cur->add_successor(mem_ctx, cur_do, bblock_link_physical);
362
cur->add_successor(mem_ctx, cur_while, bblock_link_logical);
363
364
next = new_block();
365
if (inst->predicate)
366
cur->add_successor(mem_ctx, next, bblock_link_logical);
367
368
set_next_block(&cur, next, ip);
369
break;
370
371
case BRW_OPCODE_WHILE:
372
cur->instructions.push_tail(inst);
373
374
assert(cur_do != NULL && cur_while != NULL);
375
376
/* A conditional WHILE instruction may start a region of divergent
377
* control flow until the end of the loop, just like the BREAK
378
* instruction. See the BREAK case for more details. OTOH an
379
* unconditional WHILE instruction is non-divergent (just like an
380
* unconditional CONTINUE), and will necessarily lead to the
381
* execution of an additional iteration of the loop for all enabled
382
* channels, so we may skip over the divergence point at the top of
383
* the loop to keep the CFG as unambiguous as possible.
384
*/
385
if (inst->predicate) {
386
cur->add_successor(mem_ctx, cur_do, bblock_link_logical);
387
} else {
388
cur->add_successor(mem_ctx, cur_do->next(), bblock_link_logical);
389
}
390
391
set_next_block(&cur, cur_while, ip);
392
393
/* Pop the stack so we're in the previous loop */
394
cur_do = pop_stack(&do_stack);
395
cur_while = pop_stack(&while_stack);
396
break;
397
398
default:
399
cur->instructions.push_tail(inst);
400
break;
401
}
402
}
403
404
cur->end_ip = ip - 1;
405
406
make_block_array();
407
}
408
409
cfg_t::~cfg_t()
410
{
411
ralloc_free(mem_ctx);
412
}
413
414
void
415
cfg_t::remove_block(bblock_t *block)
416
{
417
foreach_list_typed_safe (bblock_link, predecessor, link, &block->parents) {
418
/* Remove block from all of its predecessors' successor lists. */
419
foreach_list_typed_safe (bblock_link, successor, link,
420
&predecessor->block->children) {
421
if (block == successor->block) {
422
successor->link.remove();
423
ralloc_free(successor);
424
}
425
}
426
427
/* Add removed-block's successors to its predecessors' successor lists. */
428
foreach_list_typed (bblock_link, successor, link, &block->children) {
429
if (!successor->block->is_successor_of(predecessor->block,
430
successor->kind)) {
431
predecessor->block->children.push_tail(link(mem_ctx,
432
successor->block,
433
successor->kind));
434
}
435
}
436
}
437
438
foreach_list_typed_safe (bblock_link, successor, link, &block->children) {
439
/* Remove block from all of its childrens' parents lists. */
440
foreach_list_typed_safe (bblock_link, predecessor, link,
441
&successor->block->parents) {
442
if (block == predecessor->block) {
443
predecessor->link.remove();
444
ralloc_free(predecessor);
445
}
446
}
447
448
/* Add removed-block's predecessors to its successors' predecessor lists. */
449
foreach_list_typed (bblock_link, predecessor, link, &block->parents) {
450
if (!predecessor->block->is_predecessor_of(successor->block,
451
predecessor->kind)) {
452
successor->block->parents.push_tail(link(mem_ctx,
453
predecessor->block,
454
predecessor->kind));
455
}
456
}
457
}
458
459
block->link.remove();
460
461
for (int b = block->num; b < this->num_blocks - 1; b++) {
462
this->blocks[b] = this->blocks[b + 1];
463
this->blocks[b]->num = b;
464
}
465
466
this->blocks[this->num_blocks - 1]->num = this->num_blocks - 2;
467
this->num_blocks--;
468
}
469
470
bblock_t *
471
cfg_t::new_block()
472
{
473
bblock_t *block = new(mem_ctx) bblock_t(this);
474
475
return block;
476
}
477
478
void
479
cfg_t::set_next_block(bblock_t **cur, bblock_t *block, int ip)
480
{
481
if (*cur) {
482
(*cur)->end_ip = ip - 1;
483
}
484
485
block->start_ip = ip;
486
block->num = num_blocks++;
487
block_list.push_tail(&block->link);
488
*cur = block;
489
}
490
491
void
492
cfg_t::make_block_array()
493
{
494
blocks = ralloc_array(mem_ctx, bblock_t *, num_blocks);
495
496
int i = 0;
497
foreach_block (block, this) {
498
blocks[i++] = block;
499
}
500
assert(i == num_blocks);
501
}
502
503
void
504
cfg_t::dump()
505
{
506
const idom_tree *idom = (s ? &s->idom_analysis.require() : NULL);
507
508
foreach_block (block, this) {
509
if (idom && idom->parent(block))
510
fprintf(stderr, "START B%d IDOM(B%d)", block->num,
511
idom->parent(block)->num);
512
else
513
fprintf(stderr, "START B%d IDOM(none)", block->num);
514
515
foreach_list_typed(bblock_link, link, link, &block->parents) {
516
fprintf(stderr, " <%cB%d",
517
link->kind == bblock_link_logical ? '-' : '~',
518
link->block->num);
519
}
520
fprintf(stderr, "\n");
521
if (s != NULL)
522
block->dump();
523
fprintf(stderr, "END B%d", block->num);
524
foreach_list_typed(bblock_link, link, link, &block->children) {
525
fprintf(stderr, " %c>B%d",
526
link->kind == bblock_link_logical ? '-' : '~',
527
link->block->num);
528
}
529
fprintf(stderr, "\n");
530
}
531
}
532
533
/* Calculates the immediate dominator of each block, according to "A Simple,
534
* Fast Dominance Algorithm" by Keith D. Cooper, Timothy J. Harvey, and Ken
535
* Kennedy.
536
*
537
* The authors claim that for control flow graphs of sizes normally encountered
538
* (less than 1000 nodes) that this algorithm is significantly faster than
539
* others like Lengauer-Tarjan.
540
*/
541
idom_tree::idom_tree(const backend_shader *s) :
542
num_parents(s->cfg->num_blocks),
543
parents(new bblock_t *[num_parents]())
544
{
545
bool changed;
546
547
parents[0] = s->cfg->blocks[0];
548
549
do {
550
changed = false;
551
552
foreach_block(block, s->cfg) {
553
if (block->num == 0)
554
continue;
555
556
bblock_t *new_idom = NULL;
557
foreach_list_typed(bblock_link, parent_link, link, &block->parents) {
558
if (parent(parent_link->block)) {
559
new_idom = (new_idom ? intersect(new_idom, parent_link->block) :
560
parent_link->block);
561
}
562
}
563
564
if (parent(block) != new_idom) {
565
parents[block->num] = new_idom;
566
changed = true;
567
}
568
}
569
} while (changed);
570
}
571
572
idom_tree::~idom_tree()
573
{
574
delete[] parents;
575
}
576
577
bblock_t *
578
idom_tree::intersect(bblock_t *b1, bblock_t *b2) const
579
{
580
/* Note, the comparisons here are the opposite of what the paper says
581
* because we index blocks from beginning -> end (i.e. reverse post-order)
582
* instead of post-order like they assume.
583
*/
584
while (b1->num != b2->num) {
585
while (b1->num > b2->num)
586
b1 = parent(b1);
587
while (b2->num > b1->num)
588
b2 = parent(b2);
589
}
590
assert(b1);
591
return b1;
592
}
593
594
void
595
idom_tree::dump() const
596
{
597
printf("digraph DominanceTree {\n");
598
for (unsigned i = 0; i < num_parents; i++)
599
printf("\t%d -> %d\n", parents[i]->num, i);
600
printf("}\n");
601
}
602
603
void
604
cfg_t::dump_cfg()
605
{
606
printf("digraph CFG {\n");
607
for (int b = 0; b < num_blocks; b++) {
608
bblock_t *block = this->blocks[b];
609
610
foreach_list_typed_safe (bblock_link, child, link, &block->children) {
611
printf("\t%d -> %d\n", b, child->block->num);
612
}
613
}
614
printf("}\n");
615
}
616
617