Path: blob/21.2-virgl/src/intel/compiler/brw_disasm.c
4550 views
/*1* Copyright © 2008 Keith Packard2*3* Permission to use, copy, modify, distribute, and sell this software and its4* documentation for any purpose is hereby granted without fee, provided that5* the above copyright notice appear in all copies and that both that copyright6* notice and this permission notice appear in supporting documentation, and7* that the name of the copyright holders not be used in advertising or8* publicity pertaining to distribution of the software without specific,9* written prior permission. The copyright holders make no representations10* about the suitability of this software for any purpose. It is provided "as11* is" without express or implied warranty.12*13* THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,14* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO15* EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR16* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,17* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER18* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE19* OF THIS SOFTWARE.20*/2122#include <stdio.h>23#include <string.h>24#include <stdarg.h>2526#include "brw_eu_defines.h"27#include "brw_inst.h"28#include "brw_shader.h"29#include "brw_reg.h"30#include "brw_inst.h"31#include "brw_eu.h"32#include "util/half_float.h"3334bool35brw_has_jip(const struct intel_device_info *devinfo, enum opcode opcode)36{37if (devinfo->ver < 6)38return false;3940return opcode == BRW_OPCODE_IF ||41opcode == BRW_OPCODE_ELSE ||42opcode == BRW_OPCODE_ENDIF ||43opcode == BRW_OPCODE_WHILE ||44opcode == BRW_OPCODE_BREAK ||45opcode == BRW_OPCODE_CONTINUE ||46opcode == BRW_OPCODE_HALT;47}4849bool50brw_has_uip(const struct intel_device_info *devinfo, enum opcode opcode)51{52if (devinfo->ver < 6)53return false;5455return (devinfo->ver >= 7 && opcode == BRW_OPCODE_IF) ||56(devinfo->ver >= 8 && opcode == BRW_OPCODE_ELSE) ||57opcode == BRW_OPCODE_BREAK ||58opcode == BRW_OPCODE_CONTINUE ||59opcode == BRW_OPCODE_HALT;60}6162static bool63has_branch_ctrl(const struct intel_device_info *devinfo, enum opcode opcode)64{65if (devinfo->ver < 8)66return false;6768return opcode == BRW_OPCODE_IF ||69opcode == BRW_OPCODE_ELSE;70/* opcode == BRW_OPCODE_GOTO; */71}7273static bool74is_logic_instruction(unsigned opcode)75{76return opcode == BRW_OPCODE_AND ||77opcode == BRW_OPCODE_NOT ||78opcode == BRW_OPCODE_OR ||79opcode == BRW_OPCODE_XOR;80}8182static bool83is_send(unsigned opcode)84{85return opcode == BRW_OPCODE_SEND ||86opcode == BRW_OPCODE_SENDC ||87opcode == BRW_OPCODE_SENDS ||88opcode == BRW_OPCODE_SENDSC;89}9091static bool92is_split_send(UNUSED const struct intel_device_info *devinfo, unsigned opcode)93{94if (devinfo->ver >= 12)95return is_send(opcode);96else97return opcode == BRW_OPCODE_SENDS ||98opcode == BRW_OPCODE_SENDSC;99}100101const char *const conditional_modifier[16] = {102[BRW_CONDITIONAL_NONE] = "",103[BRW_CONDITIONAL_Z] = ".z",104[BRW_CONDITIONAL_NZ] = ".nz",105[BRW_CONDITIONAL_G] = ".g",106[BRW_CONDITIONAL_GE] = ".ge",107[BRW_CONDITIONAL_L] = ".l",108[BRW_CONDITIONAL_LE] = ".le",109[BRW_CONDITIONAL_R] = ".r",110[BRW_CONDITIONAL_O] = ".o",111[BRW_CONDITIONAL_U] = ".u",112};113114static const char *const m_negate[2] = {115[0] = "",116[1] = "-",117};118119static const char *const _abs[2] = {120[0] = "",121[1] = "(abs)",122};123124static const char *const m_bitnot[2] = { "", "~" };125126static const char *const vert_stride[16] = {127[0] = "0",128[1] = "1",129[2] = "2",130[3] = "4",131[4] = "8",132[5] = "16",133[6] = "32",134[15] = "VxH",135};136137static const char *const width[8] = {138[0] = "1",139[1] = "2",140[2] = "4",141[3] = "8",142[4] = "16",143};144145static const char *const horiz_stride[4] = {146[0] = "0",147[1] = "1",148[2] = "2",149[3] = "4"150};151152static const char *const chan_sel[4] = {153[0] = "x",154[1] = "y",155[2] = "z",156[3] = "w",157};158159static const char *const debug_ctrl[2] = {160[0] = "",161[1] = ".breakpoint"162};163164static const char *const saturate[2] = {165[0] = "",166[1] = ".sat"167};168169static const char *const cmpt_ctrl[2] = {170[0] = "",171[1] = "compacted"172};173174static const char *const accwr[2] = {175[0] = "",176[1] = "AccWrEnable"177};178179static const char *const branch_ctrl[2] = {180[0] = "",181[1] = "BranchCtrl"182};183184static const char *const wectrl[2] = {185[0] = "",186[1] = "WE_all"187};188189static const char *const exec_size[8] = {190[0] = "1",191[1] = "2",192[2] = "4",193[3] = "8",194[4] = "16",195[5] = "32"196};197198static const char *const pred_inv[2] = {199[0] = "+",200[1] = "-"201};202203const char *const pred_ctrl_align16[16] = {204[1] = "",205[2] = ".x",206[3] = ".y",207[4] = ".z",208[5] = ".w",209[6] = ".any4h",210[7] = ".all4h",211};212213static const char *const pred_ctrl_align1[16] = {214[BRW_PREDICATE_NORMAL] = "",215[BRW_PREDICATE_ALIGN1_ANYV] = ".anyv",216[BRW_PREDICATE_ALIGN1_ALLV] = ".allv",217[BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h",218[BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h",219[BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h",220[BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h",221[BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h",222[BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h",223[BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h",224[BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h",225[BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h",226[BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h",227};228229static const char *const thread_ctrl[4] = {230[BRW_THREAD_NORMAL] = "",231[BRW_THREAD_ATOMIC] = "atomic",232[BRW_THREAD_SWITCH] = "switch",233};234235static const char *const compr_ctrl[4] = {236[0] = "",237[1] = "sechalf",238[2] = "compr",239[3] = "compr4",240};241242static const char *const dep_ctrl[4] = {243[0] = "",244[1] = "NoDDClr",245[2] = "NoDDChk",246[3] = "NoDDClr,NoDDChk",247};248249static const char *const mask_ctrl[4] = {250[0] = "",251[1] = "nomask",252};253254static const char *const access_mode[2] = {255[0] = "align1",256[1] = "align16",257};258259static const char *const reg_file[4] = {260[0] = "A",261[1] = "g",262[2] = "m",263[3] = "imm",264};265266static const char *const writemask[16] = {267[0x0] = ".",268[0x1] = ".x",269[0x2] = ".y",270[0x3] = ".xy",271[0x4] = ".z",272[0x5] = ".xz",273[0x6] = ".yz",274[0x7] = ".xyz",275[0x8] = ".w",276[0x9] = ".xw",277[0xa] = ".yw",278[0xb] = ".xyw",279[0xc] = ".zw",280[0xd] = ".xzw",281[0xe] = ".yzw",282[0xf] = "",283};284285static const char *const end_of_thread[2] = {286[0] = "",287[1] = "EOT"288};289290/* SFIDs on Gfx4-5 */291static const char *const gfx4_sfid[16] = {292[BRW_SFID_NULL] = "null",293[BRW_SFID_MATH] = "math",294[BRW_SFID_SAMPLER] = "sampler",295[BRW_SFID_MESSAGE_GATEWAY] = "gateway",296[BRW_SFID_DATAPORT_READ] = "read",297[BRW_SFID_DATAPORT_WRITE] = "write",298[BRW_SFID_URB] = "urb",299[BRW_SFID_THREAD_SPAWNER] = "thread_spawner",300[BRW_SFID_VME] = "vme",301};302303static const char *const gfx6_sfid[16] = {304[BRW_SFID_NULL] = "null",305[BRW_SFID_MATH] = "math",306[BRW_SFID_SAMPLER] = "sampler",307[BRW_SFID_MESSAGE_GATEWAY] = "gateway",308[BRW_SFID_URB] = "urb",309[BRW_SFID_THREAD_SPAWNER] = "thread_spawner",310[GFX6_SFID_DATAPORT_SAMPLER_CACHE] = "dp_sampler",311[GFX6_SFID_DATAPORT_RENDER_CACHE] = "render",312[GFX6_SFID_DATAPORT_CONSTANT_CACHE] = "const",313[GFX7_SFID_DATAPORT_DATA_CACHE] = "data",314[GFX7_SFID_PIXEL_INTERPOLATOR] = "pixel interp",315[HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1",316[HSW_SFID_CRE] = "cre",317[GEN_RT_SFID_RAY_TRACE_ACCELERATOR] = "rt accel",318[GFX12_SFID_SLM] = "slm",319[GFX12_SFID_TGM] = "tgm",320[GFX12_SFID_UGM] = "ugm",321};322323static const char *const gfx7_gateway_subfuncid[8] = {324[BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open",325[BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close",326[BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg",327[BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp",328[BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg",329[BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state",330[BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write",331};332333static const char *const gfx4_dp_read_port_msg_type[4] = {334[0b00] = "OWord Block Read",335[0b01] = "OWord Dual Block Read",336[0b10] = "Media Block Read",337[0b11] = "DWord Scattered Read",338};339340static const char *const g45_dp_read_port_msg_type[8] = {341[0b000] = "OWord Block Read",342[0b010] = "OWord Dual Block Read",343[0b100] = "Media Block Read",344[0b110] = "DWord Scattered Read",345[0b001] = "Render Target UNORM Read",346[0b011] = "AVC Loop Filter Read",347};348349static const char *const dp_write_port_msg_type[8] = {350[0b000] = "OWord block write",351[0b001] = "OWord dual block write",352[0b010] = "media block write",353[0b011] = "DWord scattered write",354[0b100] = "RT write",355[0b101] = "streamed VB write",356[0b110] = "RT UNORM write", /* G45+ */357[0b111] = "flush render cache",358};359360static const char *const dp_rc_msg_type_gfx6[16] = {361[BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read",362[GFX6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read",363[GFX6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read",364[GFX6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read",365[GFX6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] =366"OWORD unaligned block read",367[GFX6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read",368[GFX6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write",369[GFX6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write",370[GFX6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] =371"OWORD dual block write",372[GFX6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write",373[GFX6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] =374"DWORD scattered write",375[GFX6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write",376[GFX6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write",377[GFX6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write",378};379380static const char *const dp_rc_msg_type_gfx7[16] = {381[GFX7_DATAPORT_RC_MEDIA_BLOCK_READ] = "media block read",382[GFX7_DATAPORT_RC_TYPED_SURFACE_READ] = "typed surface read",383[GFX7_DATAPORT_RC_TYPED_ATOMIC_OP] = "typed atomic op",384[GFX7_DATAPORT_RC_MEMORY_FENCE] = "memory fence",385[GFX7_DATAPORT_RC_MEDIA_BLOCK_WRITE] = "media block write",386[GFX7_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write",387[GFX7_DATAPORT_RC_TYPED_SURFACE_WRITE] = "typed surface write"388};389390static const char *const dp_rc_msg_type_gfx9[16] = {391[GFX9_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write",392[GFX9_DATAPORT_RC_RENDER_TARGET_READ] = "RT read"393};394395static const char *const *396dp_rc_msg_type(const struct intel_device_info *devinfo)397{398return (devinfo->ver >= 9 ? dp_rc_msg_type_gfx9 :399devinfo->ver >= 7 ? dp_rc_msg_type_gfx7 :400devinfo->ver >= 6 ? dp_rc_msg_type_gfx6 :401dp_write_port_msg_type);402}403404static const char *const m_rt_write_subtype[] = {405[0b000] = "SIMD16",406[0b001] = "SIMD16/RepData",407[0b010] = "SIMD8/DualSrcLow",408[0b011] = "SIMD8/DualSrcHigh",409[0b100] = "SIMD8",410[0b101] = "SIMD8/ImageWrite", /* Gfx6+ */411[0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */412};413414static const char *const dp_dc0_msg_type_gfx7[16] = {415[GFX7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read",416[GFX7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] =417"DC unaligned OWORD block read",418[GFX7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read",419[GFX7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read",420[GFX7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read",421[GFX7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read",422[GFX7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic",423[GFX7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence",424[GFX7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write",425[GFX7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write",426[GFX7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write",427[GFX7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write",428[GFX7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",429};430431static const char *const dp_oword_block_rw[8] = {432[BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW] = "1-low",433[BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH] = "1-high",434[BRW_DATAPORT_OWORD_BLOCK_2_OWORDS] = "2",435[BRW_DATAPORT_OWORD_BLOCK_4_OWORDS] = "4",436[BRW_DATAPORT_OWORD_BLOCK_8_OWORDS] = "8",437};438439static const char *const dp_dc1_msg_type_hsw[32] = {440[HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",441[HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",442[HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =443"DC untyped 4x2 atomic op",444[HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read",445[HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read",446[HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic",447[HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op",448[HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",449[HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write",450[HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op",451[HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] =452"DC 4x2 atomic counter op",453[HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write",454[GFX9_DATAPORT_DC_PORT1_A64_SCATTERED_READ] = "DC A64 scattered read",455[GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ] = "DC A64 untyped surface read",456[GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP] = "DC A64 untyped atomic op",457[GFX9_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_READ] = "DC A64 oword block read",458[GFX9_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_WRITE] = "DC A64 oword block write",459[GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE] = "DC A64 untyped surface write",460[GFX8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE] = "DC A64 scattered write",461[GFX9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP] =462"DC untyped atomic float op",463[GFX9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP] =464"DC A64 untyped atomic float op",465[GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_INT_OP] =466"DC A64 untyped atomic half-integer op",467[GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_FLOAT_OP] =468"DC A64 untyped atomic half-float op",469};470471static const char *const aop[16] = {472[BRW_AOP_AND] = "and",473[BRW_AOP_OR] = "or",474[BRW_AOP_XOR] = "xor",475[BRW_AOP_MOV] = "mov",476[BRW_AOP_INC] = "inc",477[BRW_AOP_DEC] = "dec",478[BRW_AOP_ADD] = "add",479[BRW_AOP_SUB] = "sub",480[BRW_AOP_REVSUB] = "revsub",481[BRW_AOP_IMAX] = "imax",482[BRW_AOP_IMIN] = "imin",483[BRW_AOP_UMAX] = "umax",484[BRW_AOP_UMIN] = "umin",485[BRW_AOP_CMPWR] = "cmpwr",486[BRW_AOP_PREDEC] = "predec",487};488489static const char *const aop_float[4] = {490[BRW_AOP_FMAX] = "fmax",491[BRW_AOP_FMIN] = "fmin",492[BRW_AOP_FCMPWR] = "fcmpwr",493};494495static const char * const pixel_interpolator_msg_types[4] = {496[GFX7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset",497[GFX7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position",498[GFX7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid",499[GFX7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset",500};501502static const char *const math_function[16] = {503[BRW_MATH_FUNCTION_INV] = "inv",504[BRW_MATH_FUNCTION_LOG] = "log",505[BRW_MATH_FUNCTION_EXP] = "exp",506[BRW_MATH_FUNCTION_SQRT] = "sqrt",507[BRW_MATH_FUNCTION_RSQ] = "rsq",508[BRW_MATH_FUNCTION_SIN] = "sin",509[BRW_MATH_FUNCTION_COS] = "cos",510[BRW_MATH_FUNCTION_SINCOS] = "sincos",511[BRW_MATH_FUNCTION_FDIV] = "fdiv",512[BRW_MATH_FUNCTION_POW] = "pow",513[BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod",514[BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv",515[BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod",516[GFX8_MATH_FUNCTION_INVM] = "invm",517[GFX8_MATH_FUNCTION_RSQRTM] = "rsqrtm",518};519520static const char *const sync_function[16] = {521[TGL_SYNC_NOP] = "nop",522[TGL_SYNC_ALLRD] = "allrd",523[TGL_SYNC_ALLWR] = "allwr",524[TGL_SYNC_BAR] = "bar",525[TGL_SYNC_HOST] = "host",526};527528static const char *const math_saturate[2] = {529[0] = "",530[1] = "sat"531};532533static const char *const math_signed[2] = {534[0] = "",535[1] = "signed"536};537538static const char *const math_scalar[2] = {539[0] = "",540[1] = "scalar"541};542543static const char *const math_precision[2] = {544[0] = "",545[1] = "partial_precision"546};547548static const char *const gfx5_urb_opcode[] = {549[0] = "urb_write",550[1] = "ff_sync",551};552553static const char *const gfx7_urb_opcode[] = {554[BRW_URB_OPCODE_WRITE_HWORD] = "write HWord",555[BRW_URB_OPCODE_WRITE_OWORD] = "write OWord",556[BRW_URB_OPCODE_READ_HWORD] = "read HWord",557[BRW_URB_OPCODE_READ_OWORD] = "read OWord",558[GFX7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gfx7+ */559[GFX7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gfx7+ */560[GFX8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gfx8+ */561[GFX8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gfx8+ */562[GFX8_URB_OPCODE_SIMD8_READ] = "SIMD8 read", /* Gfx8+ */563/* [9-15] - reserved */564};565566static const char *const urb_swizzle[4] = {567[BRW_URB_SWIZZLE_NONE] = "",568[BRW_URB_SWIZZLE_INTERLEAVE] = "interleave",569[BRW_URB_SWIZZLE_TRANSPOSE] = "transpose",570};571572static const char *const urb_allocate[2] = {573[0] = "",574[1] = "allocate"575};576577static const char *const urb_used[2] = {578[0] = "",579[1] = "used"580};581582static const char *const urb_complete[2] = {583[0] = "",584[1] = "complete"585};586587static const char *const gfx5_sampler_msg_type[] = {588[GFX5_SAMPLER_MESSAGE_SAMPLE] = "sample",589[GFX5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b",590[GFX5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l",591[GFX5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c",592[GFX5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d",593[GFX5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c",594[GFX5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c",595[GFX5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld",596[GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4",597[GFX5_SAMPLER_MESSAGE_LOD] = "lod",598[GFX5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo",599[GFX6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO] = "sampleinfo",600[GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c",601[GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po",602[GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c",603[HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",604[GFX9_SAMPLER_MESSAGE_SAMPLE_LZ] = "sample_lz",605[GFX9_SAMPLER_MESSAGE_SAMPLE_C_LZ] = "sample_c_lz",606[GFX9_SAMPLER_MESSAGE_SAMPLE_LD_LZ] = "ld_lz",607[GFX9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W] = "ld2dms_w",608[GFX7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs",609[GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms",610[GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",611};612613static const char *const gfx5_sampler_simd_mode[4] = {614[BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2",615[BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8",616[BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16",617[BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",618};619620static const char *const sampler_target_format[4] = {621[0] = "F",622[2] = "UD",623[3] = "D"624};625626static const char *const lsc_operation[] = {627[LSC_OP_LOAD] = "load",628[LSC_OP_LOAD_CMASK] = "load_cmask",629[LSC_OP_STORE] = "store",630[LSC_OP_STORE_CMASK] = "store_cmask",631[LSC_OP_FENCE] = "fence",632[LSC_OP_ATOMIC_INC] = "atomic_inc",633[LSC_OP_ATOMIC_DEC] = "atomic_dec",634[LSC_OP_ATOMIC_LOAD] = "atomic_load",635[LSC_OP_ATOMIC_STORE] = "atomic_store",636[LSC_OP_ATOMIC_ADD] = "atomic_add",637[LSC_OP_ATOMIC_SUB] = "atomic_sub",638[LSC_OP_ATOMIC_MIN] = "atomic_min",639[LSC_OP_ATOMIC_MAX] = "atomic_max",640[LSC_OP_ATOMIC_UMIN] = "atomic_umin",641[LSC_OP_ATOMIC_UMAX] = "atomic_umax",642[LSC_OP_ATOMIC_CMPXCHG] = "atomic_cmpxchg",643[LSC_OP_ATOMIC_FADD] = "atomic_fadd",644[LSC_OP_ATOMIC_FSUB] = "atomic_fsub",645[LSC_OP_ATOMIC_FMIN] = "atomic_fmin",646[LSC_OP_ATOMIC_FMAX] = "atomic_fmax",647[LSC_OP_ATOMIC_FCMPXCHG] = "atomic_fcmpxchg",648[LSC_OP_ATOMIC_AND] = "atomic_and",649[LSC_OP_ATOMIC_OR] = "atomic_or",650[LSC_OP_ATOMIC_XOR] = "atomic_xor",651};652653static const char *const lsc_addr_surface_type[] = {654[LSC_ADDR_SURFTYPE_FLAT] = "flat",655[LSC_ADDR_SURFTYPE_BSS] = "bss",656[LSC_ADDR_SURFTYPE_SS] = "ss",657[LSC_ADDR_SURFTYPE_BTI] = "bti",658};659660static const char* const lsc_fence_scope[] = {661[LSC_FENCE_THREADGROUP] = "threadgroup",662[LSC_FENCE_LOCAL] = "local",663[LSC_FENCE_TILE] = "tile",664[LSC_FENCE_GPU] = "gpu",665[LSC_FENCE_ALL_GPU] = "all_gpu",666[LSC_FENCE_SYSTEM_RELEASE] = "system_release",667[LSC_FENCE_SYSTEM_ACQUIRE] = "system_acquire",668};669670static const char* const lsc_flush_type[] = {671[LSC_FLUSH_TYPE_NONE] = "none",672[LSC_FLUSH_TYPE_EVICT] = "evict",673[LSC_FLUSH_TYPE_INVALIDATE] = "invalidate",674[LSC_FLUSH_TYPE_DISCARD] = "discard",675[LSC_FLUSH_TYPE_CLEAN] = "clean",676[LSC_FLUSH_TYPE_L3ONLY] = "l3only",677};678679static const char* const lsc_addr_size[] = {680[LSC_ADDR_SIZE_A16] = "a16",681[LSC_ADDR_SIZE_A32] = "a32",682[LSC_ADDR_SIZE_A64] = "a64",683};684685static const char* const lsc_backup_fence_routing[] = {686[LSC_NORMAL_ROUTING] = "normal_routing",687[LSC_ROUTE_TO_LSC] = "route_to_lsc",688};689690static const char* const lsc_data_size[] = {691[LSC_DATA_SIZE_D8] = "d8",692[LSC_DATA_SIZE_D16] = "d16",693[LSC_DATA_SIZE_D32] = "d32",694[LSC_DATA_SIZE_D64] = "d64",695[LSC_DATA_SIZE_D8U32] = "d8u32",696[LSC_DATA_SIZE_D16U32] = "d16u32",697[LSC_DATA_SIZE_D16BF32] = "d16bf32",698};699700static const char* const lsc_vect_size_str[] = {701[LSC_VECT_SIZE_V1] = "V1",702[LSC_VECT_SIZE_V2] = "V2",703[LSC_VECT_SIZE_V3] = "V3",704[LSC_VECT_SIZE_V4] = "V4",705[LSC_VECT_SIZE_V8] = "V8",706[LSC_VECT_SIZE_V16] = "V16",707[LSC_VECT_SIZE_V32] = "V32",708[LSC_VECT_SIZE_V64] = "V64",709};710711static const char* const lsc_cmask_str[] = {712[LSC_CMASK_X] = "x",713[LSC_CMASK_Y] = "y",714[LSC_CMASK_XY] = "xy",715[LSC_CMASK_Z] = "z",716[LSC_CMASK_XZ] = "xz",717[LSC_CMASK_YZ] = "yz",718[LSC_CMASK_XYZ] = "xyz",719[LSC_CMASK_W] = "w",720[LSC_CMASK_XW] = "xw",721[LSC_CMASK_YW] = "yw",722[LSC_CMASK_XYW] = "xyw",723[LSC_CMASK_ZW] = "zw",724[LSC_CMASK_XZW] = "xzw",725[LSC_CMASK_YZW] = "yzw",726[LSC_CMASK_XYZW] = "xyzw",727};728729static const char* const lsc_cache_load[] = {730[LSC_CACHE_LOAD_L1STATE_L3MOCS] = "L1STATE_L3MOCS",731[LSC_CACHE_LOAD_L1UC_L3UC] = "L1UC_L3UC",732[LSC_CACHE_LOAD_L1UC_L3C] = "L1UC_L3C",733[LSC_CACHE_LOAD_L1C_L3UC] = "L1C_L3UC",734[LSC_CACHE_LOAD_L1C_L3C] = "L1C_L3C",735[LSC_CACHE_LOAD_L1S_L3UC] = "L1S_L3UC",736[LSC_CACHE_LOAD_L1S_L3C] = "L1S_L3C",737[LSC_CACHE_LOAD_L1IAR_L3C] = "L1IAR_L3C",738};739740static const char* const lsc_cache_store[] = {741[LSC_CACHE_STORE_L1STATE_L3MOCS] = "L1STATE_L3MOCS",742[LSC_CACHE_STORE_L1UC_L3UC] = "L1UC_L3UC",743[LSC_CACHE_STORE_L1UC_L3WB] = "L1UC_L3WB",744[LSC_CACHE_STORE_L1WT_L3UC] = "L1WT_L3UC",745[LSC_CACHE_STORE_L1WT_L3WB] = "L1WT_L3WB",746[LSC_CACHE_STORE_L1S_L3UC] = "L1S_L3UC",747[LSC_CACHE_STORE_L1S_L3WB] = "L1S_L3WB",748[LSC_CACHE_STORE_L1WB_L3WB] = "L1WB_L3WB",749};750751static int column;752753static int754string(FILE *file, const char *string)755{756fputs(string, file);757column += strlen(string);758return 0;759}760761static int762format(FILE *f, const char *format, ...) PRINTFLIKE(2, 3);763764static int765format(FILE *f, const char *format, ...)766{767char buf[1024];768va_list args;769va_start(args, format);770771vsnprintf(buf, sizeof(buf) - 1, format, args);772va_end(args);773string(f, buf);774return 0;775}776777static int778newline(FILE *f)779{780putc('\n', f);781column = 0;782return 0;783}784785static int786pad(FILE *f, int c)787{788do789string(f, " ");790while (column < c);791return 0;792}793794static int795control(FILE *file, const char *name, const char *const ctrl[],796unsigned id, int *space)797{798if (!ctrl[id]) {799fprintf(file, "*** invalid %s value %d ", name, id);800return 1;801}802if (ctrl[id][0]) {803if (space && *space)804string(file, " ");805string(file, ctrl[id]);806if (space)807*space = 1;808}809return 0;810}811812static int813print_opcode(FILE *file, const struct intel_device_info *devinfo,814enum opcode id)815{816const struct opcode_desc *desc = brw_opcode_desc(devinfo, id);817if (!desc) {818format(file, "*** invalid opcode value %d ", id);819return 1;820}821string(file, desc->name);822return 0;823}824825static int826reg(FILE *file, unsigned _reg_file, unsigned _reg_nr)827{828int err = 0;829830/* Clear the Compr4 instruction compression bit. */831if (_reg_file == BRW_MESSAGE_REGISTER_FILE)832_reg_nr &= ~BRW_MRF_COMPR4;833834if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) {835switch (_reg_nr & 0xf0) {836case BRW_ARF_NULL:837string(file, "null");838break;839case BRW_ARF_ADDRESS:840format(file, "a%d", _reg_nr & 0x0f);841break;842case BRW_ARF_ACCUMULATOR:843format(file, "acc%d", _reg_nr & 0x0f);844break;845case BRW_ARF_FLAG:846format(file, "f%d", _reg_nr & 0x0f);847break;848case BRW_ARF_MASK:849format(file, "mask%d", _reg_nr & 0x0f);850break;851case BRW_ARF_MASK_STACK:852format(file, "ms%d", _reg_nr & 0x0f);853break;854case BRW_ARF_MASK_STACK_DEPTH:855format(file, "msd%d", _reg_nr & 0x0f);856break;857case BRW_ARF_STATE:858format(file, "sr%d", _reg_nr & 0x0f);859break;860case BRW_ARF_CONTROL:861format(file, "cr%d", _reg_nr & 0x0f);862break;863case BRW_ARF_NOTIFICATION_COUNT:864format(file, "n%d", _reg_nr & 0x0f);865break;866case BRW_ARF_IP:867string(file, "ip");868return -1;869break;870case BRW_ARF_TDR:871format(file, "tdr0");872return -1;873case BRW_ARF_TIMESTAMP:874format(file, "tm%d", _reg_nr & 0x0f);875break;876default:877format(file, "ARF%d", _reg_nr);878break;879}880} else {881err |= control(file, "src reg file", reg_file, _reg_file, NULL);882format(file, "%d", _reg_nr);883}884return err;885}886887static int888dest(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)889{890enum brw_reg_type type = brw_inst_dst_type(devinfo, inst);891unsigned elem_size = brw_reg_type_to_size(type);892int err = 0;893894if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {895/* These are fixed for split sends */896type = BRW_REGISTER_TYPE_UD;897elem_size = 4;898if (devinfo->ver >= 12) {899err |= reg(file, brw_inst_send_dst_reg_file(devinfo, inst),900brw_inst_dst_da_reg_nr(devinfo, inst));901string(file, brw_reg_type_to_letters(type));902} else if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {903err |= reg(file, brw_inst_send_dst_reg_file(devinfo, inst),904brw_inst_dst_da_reg_nr(devinfo, inst));905unsigned subreg_nr = brw_inst_dst_da16_subreg_nr(devinfo, inst);906if (subreg_nr)907format(file, ".%u", subreg_nr);908string(file, brw_reg_type_to_letters(type));909} else {910string(file, "g[a0");911if (brw_inst_dst_ia_subreg_nr(devinfo, inst))912format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) /913elem_size);914if (brw_inst_send_dst_ia16_addr_imm(devinfo, inst))915format(file, " %d", brw_inst_send_dst_ia16_addr_imm(devinfo, inst));916string(file, "]<");917string(file, brw_reg_type_to_letters(type));918}919} else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {920if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {921err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),922brw_inst_dst_da_reg_nr(devinfo, inst));923if (err == -1)924return 0;925if (brw_inst_dst_da1_subreg_nr(devinfo, inst))926format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) /927elem_size);928string(file, "<");929err |= control(file, "horiz stride", horiz_stride,930brw_inst_dst_hstride(devinfo, inst), NULL);931string(file, ">");932string(file, brw_reg_type_to_letters(type));933} else {934string(file, "g[a0");935if (brw_inst_dst_ia_subreg_nr(devinfo, inst))936format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) /937elem_size);938if (brw_inst_dst_ia1_addr_imm(devinfo, inst))939format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst));940string(file, "]<");941err |= control(file, "horiz stride", horiz_stride,942brw_inst_dst_hstride(devinfo, inst), NULL);943string(file, ">");944string(file, brw_reg_type_to_letters(type));945}946} else {947if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {948err |= reg(file, brw_inst_dst_reg_file(devinfo, inst),949brw_inst_dst_da_reg_nr(devinfo, inst));950if (err == -1)951return 0;952if (brw_inst_dst_da16_subreg_nr(devinfo, inst))953format(file, ".%u", 16 / elem_size);954string(file, "<1>");955err |= control(file, "writemask", writemask,956brw_inst_da16_writemask(devinfo, inst), NULL);957string(file, brw_reg_type_to_letters(type));958} else {959err = 1;960string(file, "Indirect align16 address mode not supported");961}962}963964return 0;965}966967static int968dest_3src(FILE *file, const struct intel_device_info *devinfo,969const brw_inst *inst)970{971bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;972int err = 0;973uint32_t reg_file;974unsigned subreg_nr;975enum brw_reg_type type;976977if (devinfo->ver < 10 && is_align1)978return 0;979980if (devinfo->ver == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst))981reg_file = BRW_MESSAGE_REGISTER_FILE;982else if (devinfo->ver >= 12)983reg_file = brw_inst_3src_a1_dst_reg_file(devinfo, inst);984else if (is_align1 && brw_inst_3src_a1_dst_reg_file(devinfo, inst))985reg_file = BRW_ARCHITECTURE_REGISTER_FILE;986else987reg_file = BRW_GENERAL_REGISTER_FILE;988989err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst));990if (err == -1)991return 0;992993if (is_align1) {994type = brw_inst_3src_a1_dst_type(devinfo, inst);995subreg_nr = brw_inst_3src_a1_dst_subreg_nr(devinfo, inst);996} else {997type = brw_inst_3src_a16_dst_type(devinfo, inst);998subreg_nr = brw_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4;999}1000subreg_nr /= brw_reg_type_to_size(type);10011002if (subreg_nr)1003format(file, ".%u", subreg_nr);1004string(file, "<1>");10051006if (!is_align1) {1007err |= control(file, "writemask", writemask,1008brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL);1009}1010string(file, brw_reg_type_to_letters(type));10111012return 0;1013}10141015static int1016src_align1_region(FILE *file,1017unsigned _vert_stride, unsigned _width,1018unsigned _horiz_stride)1019{1020int err = 0;1021string(file, "<");1022err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);1023string(file, ",");1024err |= control(file, "width", width, _width, NULL);1025string(file, ",");1026err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);1027string(file, ">");1028return err;1029}10301031static int1032src_da1(FILE *file,1033const struct intel_device_info *devinfo,1034unsigned opcode,1035enum brw_reg_type type, unsigned _reg_file,1036unsigned _vert_stride, unsigned _width, unsigned _horiz_stride,1037unsigned reg_num, unsigned sub_reg_num, unsigned __abs,1038unsigned _negate)1039{1040int err = 0;10411042if (devinfo->ver >= 8 && is_logic_instruction(opcode))1043err |= control(file, "bitnot", m_bitnot, _negate, NULL);1044else1045err |= control(file, "negate", m_negate, _negate, NULL);10461047err |= control(file, "abs", _abs, __abs, NULL);10481049err |= reg(file, _reg_file, reg_num);1050if (err == -1)1051return 0;1052if (sub_reg_num) {1053unsigned elem_size = brw_reg_type_to_size(type);1054format(file, ".%d", sub_reg_num / elem_size); /* use formal style like spec */1055}1056src_align1_region(file, _vert_stride, _width, _horiz_stride);1057string(file, brw_reg_type_to_letters(type));1058return err;1059}10601061static int1062src_ia1(FILE *file,1063const struct intel_device_info *devinfo,1064unsigned opcode,1065enum brw_reg_type type,1066int _addr_imm,1067unsigned _addr_subreg_nr,1068unsigned _negate,1069unsigned __abs,1070unsigned _horiz_stride, unsigned _width, unsigned _vert_stride)1071{1072int err = 0;10731074if (devinfo->ver >= 8 && is_logic_instruction(opcode))1075err |= control(file, "bitnot", m_bitnot, _negate, NULL);1076else1077err |= control(file, "negate", m_negate, _negate, NULL);10781079err |= control(file, "abs", _abs, __abs, NULL);10801081string(file, "g[a0");1082if (_addr_subreg_nr)1083format(file, ".%d", _addr_subreg_nr);1084if (_addr_imm)1085format(file, " %d", _addr_imm);1086string(file, "]");1087src_align1_region(file, _vert_stride, _width, _horiz_stride);1088string(file, brw_reg_type_to_letters(type));1089return err;1090}10911092static int1093src_swizzle(FILE *file, unsigned swiz)1094{1095unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X);1096unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y);1097unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z);1098unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W);1099int err = 0;11001101if (x == y && x == z && x == w) {1102string(file, ".");1103err |= control(file, "channel select", chan_sel, x, NULL);1104} else if (swiz != BRW_SWIZZLE_XYZW) {1105string(file, ".");1106err |= control(file, "channel select", chan_sel, x, NULL);1107err |= control(file, "channel select", chan_sel, y, NULL);1108err |= control(file, "channel select", chan_sel, z, NULL);1109err |= control(file, "channel select", chan_sel, w, NULL);1110}1111return err;1112}11131114static int1115src_da16(FILE *file,1116const struct intel_device_info *devinfo,1117unsigned opcode,1118enum brw_reg_type type,1119unsigned _reg_file,1120unsigned _vert_stride,1121unsigned _reg_nr,1122unsigned _subreg_nr,1123unsigned __abs,1124unsigned _negate,1125unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w)1126{1127int err = 0;11281129if (devinfo->ver >= 8 && is_logic_instruction(opcode))1130err |= control(file, "bitnot", m_bitnot, _negate, NULL);1131else1132err |= control(file, "negate", m_negate, _negate, NULL);11331134err |= control(file, "abs", _abs, __abs, NULL);11351136err |= reg(file, _reg_file, _reg_nr);1137if (err == -1)1138return 0;1139if (_subreg_nr) {1140unsigned elem_size = brw_reg_type_to_size(type);11411142/* bit4 for subreg number byte addressing. Make this same meaning as1143in da1 case, so output looks consistent. */1144format(file, ".%d", 16 / elem_size);1145}1146string(file, "<");1147err |= control(file, "vert stride", vert_stride, _vert_stride, NULL);1148string(file, ">");1149err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w));1150string(file, brw_reg_type_to_letters(type));1151return err;1152}11531154static enum brw_vertical_stride1155vstride_from_align1_3src_vstride(const struct intel_device_info *devinfo,1156enum gfx10_align1_3src_vertical_stride vstride)1157{1158switch (vstride) {1159case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0;1160case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2:1161if (devinfo->ver >= 12)1162return BRW_VERTICAL_STRIDE_1;1163else1164return BRW_VERTICAL_STRIDE_2;1165case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4;1166case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8: return BRW_VERTICAL_STRIDE_8;1167default:1168unreachable("not reached");1169}1170}11711172static enum brw_horizontal_stride1173hstride_from_align1_3src_hstride(enum gfx10_align1_3src_src_horizontal_stride hstride)1174{1175switch (hstride) {1176case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_HORIZONTAL_STRIDE_0;1177case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_HORIZONTAL_STRIDE_1;1178case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_HORIZONTAL_STRIDE_2;1179case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_HORIZONTAL_STRIDE_4;1180default:1181unreachable("not reached");1182}1183}11841185static enum brw_vertical_stride1186vstride_from_align1_3src_hstride(enum gfx10_align1_3src_src_horizontal_stride hstride)1187{1188switch (hstride) {1189case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0;1190case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_VERTICAL_STRIDE_1;1191case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_VERTICAL_STRIDE_2;1192case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4;1193default:1194unreachable("not reached");1195}1196}11971198/* From "GFX10 Regioning Rules for Align1 Ternary Operations" in the1199* "Register Region Restrictions" documentation1200*/1201static enum brw_width1202implied_width(enum brw_vertical_stride _vert_stride,1203enum brw_horizontal_stride _horiz_stride)1204{1205/* "1. Width is 1 when Vertical and Horizontal Strides are both zero." */1206if (_vert_stride == BRW_VERTICAL_STRIDE_0 &&1207_horiz_stride == BRW_HORIZONTAL_STRIDE_0) {1208return BRW_WIDTH_1;12091210/* "2. Width is equal to vertical stride when Horizontal Stride is zero." */1211} else if (_horiz_stride == BRW_HORIZONTAL_STRIDE_0) {1212switch (_vert_stride) {1213case BRW_VERTICAL_STRIDE_2: return BRW_WIDTH_2;1214case BRW_VERTICAL_STRIDE_4: return BRW_WIDTH_4;1215case BRW_VERTICAL_STRIDE_8: return BRW_WIDTH_8;1216case BRW_VERTICAL_STRIDE_0:1217default:1218unreachable("not reached");1219}12201221} else {1222/* FINISHME: Implement these: */12231224/* "3. Width is equal to Vertical Stride/Horizontal Stride when both1225* Strides are non-zero.1226*1227* 4. Vertical Stride must not be zero if Horizontal Stride is non-zero.1228* This implies Vertical Stride is always greater than Horizontal1229* Stride."1230*1231* Given these statements and the knowledge that the stride and width1232* values are encoded in logarithmic form, we can perform the division1233* by just subtracting.1234*/1235return _vert_stride - _horiz_stride;1236}1237}12381239static int1240src0_3src(FILE *file, const struct intel_device_info *devinfo,1241const brw_inst *inst)1242{1243int err = 0;1244unsigned reg_nr, subreg_nr;1245enum brw_reg_file _file;1246enum brw_reg_type type;1247enum brw_vertical_stride _vert_stride;1248enum brw_width _width;1249enum brw_horizontal_stride _horiz_stride;1250bool is_scalar_region;1251bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;12521253if (devinfo->ver < 10 && is_align1)1254return 0;12551256if (is_align1) {1257if (devinfo->ver >= 12 && !brw_inst_3src_a1_src0_is_imm(devinfo, inst)) {1258_file = brw_inst_3src_a1_src0_reg_file(devinfo, inst);1259} else if (brw_inst_3src_a1_src0_reg_file(devinfo, inst) ==1260BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {1261_file = BRW_GENERAL_REGISTER_FILE;1262} else if (brw_inst_3src_a1_src0_type(devinfo, inst) ==1263BRW_REGISTER_TYPE_NF) {1264_file = BRW_ARCHITECTURE_REGISTER_FILE;1265} else {1266_file = BRW_IMMEDIATE_VALUE;1267uint16_t imm_val = brw_inst_3src_a1_src0_imm(devinfo, inst);1268enum brw_reg_type type = brw_inst_3src_a1_src0_type(devinfo, inst);12691270if (type == BRW_REGISTER_TYPE_W) {1271format(file, "%dW", imm_val);1272} else if (type == BRW_REGISTER_TYPE_UW) {1273format(file, "0x%04xUW", imm_val);1274} else if (type == BRW_REGISTER_TYPE_HF) {1275format(file, "0x%04xHF", imm_val);1276}1277return 0;1278}12791280reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);1281subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst);1282type = brw_inst_3src_a1_src0_type(devinfo, inst);1283_vert_stride = vstride_from_align1_3src_vstride(1284devinfo, brw_inst_3src_a1_src0_vstride(devinfo, inst));1285_horiz_stride = hstride_from_align1_3src_hstride(1286brw_inst_3src_a1_src0_hstride(devinfo, inst));1287_width = implied_width(_vert_stride, _horiz_stride);1288} else {1289_file = BRW_GENERAL_REGISTER_FILE;1290reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst);1291subreg_nr = brw_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4;1292type = brw_inst_3src_a16_src_type(devinfo, inst);12931294if (brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) {1295_vert_stride = BRW_VERTICAL_STRIDE_0;1296_width = BRW_WIDTH_1;1297_horiz_stride = BRW_HORIZONTAL_STRIDE_0;1298} else {1299_vert_stride = BRW_VERTICAL_STRIDE_4;1300_width = BRW_WIDTH_4;1301_horiz_stride = BRW_HORIZONTAL_STRIDE_1;1302}1303}1304is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&1305_width == BRW_WIDTH_1 &&1306_horiz_stride == BRW_HORIZONTAL_STRIDE_0;13071308subreg_nr /= brw_reg_type_to_size(type);13091310err |= control(file, "negate", m_negate,1311brw_inst_3src_src0_negate(devinfo, inst), NULL);1312err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL);13131314err |= reg(file, _file, reg_nr);1315if (err == -1)1316return 0;1317if (subreg_nr || is_scalar_region)1318format(file, ".%d", subreg_nr);1319src_align1_region(file, _vert_stride, _width, _horiz_stride);1320if (!is_scalar_region && !is_align1)1321err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst));1322string(file, brw_reg_type_to_letters(type));1323return err;1324}13251326static int1327src1_3src(FILE *file, const struct intel_device_info *devinfo,1328const brw_inst *inst)1329{1330int err = 0;1331unsigned reg_nr, subreg_nr;1332enum brw_reg_file _file;1333enum brw_reg_type type;1334enum brw_vertical_stride _vert_stride;1335enum brw_width _width;1336enum brw_horizontal_stride _horiz_stride;1337bool is_scalar_region;1338bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;13391340if (devinfo->ver < 10 && is_align1)1341return 0;13421343if (is_align1) {1344if (devinfo->ver >= 12) {1345_file = brw_inst_3src_a1_src1_reg_file(devinfo, inst);1346} else if (brw_inst_3src_a1_src1_reg_file(devinfo, inst) ==1347BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {1348_file = BRW_GENERAL_REGISTER_FILE;1349} else {1350_file = BRW_ARCHITECTURE_REGISTER_FILE;1351}13521353reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst);1354subreg_nr = brw_inst_3src_a1_src1_subreg_nr(devinfo, inst);1355type = brw_inst_3src_a1_src1_type(devinfo, inst);13561357_vert_stride = vstride_from_align1_3src_vstride(1358devinfo, brw_inst_3src_a1_src1_vstride(devinfo, inst));1359_horiz_stride = hstride_from_align1_3src_hstride(1360brw_inst_3src_a1_src1_hstride(devinfo, inst));1361_width = implied_width(_vert_stride, _horiz_stride);1362} else {1363_file = BRW_GENERAL_REGISTER_FILE;1364reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst);1365subreg_nr = brw_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4;1366type = brw_inst_3src_a16_src_type(devinfo, inst);13671368if (brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) {1369_vert_stride = BRW_VERTICAL_STRIDE_0;1370_width = BRW_WIDTH_1;1371_horiz_stride = BRW_HORIZONTAL_STRIDE_0;1372} else {1373_vert_stride = BRW_VERTICAL_STRIDE_4;1374_width = BRW_WIDTH_4;1375_horiz_stride = BRW_HORIZONTAL_STRIDE_1;1376}1377}1378is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&1379_width == BRW_WIDTH_1 &&1380_horiz_stride == BRW_HORIZONTAL_STRIDE_0;13811382subreg_nr /= brw_reg_type_to_size(type);13831384err |= control(file, "negate", m_negate,1385brw_inst_3src_src1_negate(devinfo, inst), NULL);1386err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL);13871388err |= reg(file, _file, reg_nr);1389if (err == -1)1390return 0;1391if (subreg_nr || is_scalar_region)1392format(file, ".%d", subreg_nr);1393src_align1_region(file, _vert_stride, _width, _horiz_stride);1394if (!is_scalar_region && !is_align1)1395err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst));1396string(file, brw_reg_type_to_letters(type));1397return err;1398}13991400static int1401src2_3src(FILE *file, const struct intel_device_info *devinfo,1402const brw_inst *inst)1403{1404int err = 0;1405unsigned reg_nr, subreg_nr;1406enum brw_reg_file _file;1407enum brw_reg_type type;1408enum brw_vertical_stride _vert_stride;1409enum brw_width _width;1410enum brw_horizontal_stride _horiz_stride;1411bool is_scalar_region;1412bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;14131414if (devinfo->ver < 10 && is_align1)1415return 0;14161417if (is_align1) {1418if (devinfo->ver >= 12 && !brw_inst_3src_a1_src2_is_imm(devinfo, inst)) {1419_file = brw_inst_3src_a1_src2_reg_file(devinfo, inst);1420} else if (brw_inst_3src_a1_src2_reg_file(devinfo, inst) ==1421BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) {1422_file = BRW_GENERAL_REGISTER_FILE;1423} else {1424_file = BRW_IMMEDIATE_VALUE;1425uint16_t imm_val = brw_inst_3src_a1_src2_imm(devinfo, inst);1426enum brw_reg_type type = brw_inst_3src_a1_src2_type(devinfo, inst);14271428if (type == BRW_REGISTER_TYPE_W) {1429format(file, "%dW", imm_val);1430} else if (type == BRW_REGISTER_TYPE_UW) {1431format(file, "0x%04xUW", imm_val);1432} else if (type == BRW_REGISTER_TYPE_HF) {1433format(file, "0x%04xHF", imm_val);1434}1435return 0;1436}14371438reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);1439subreg_nr = brw_inst_3src_a1_src2_subreg_nr(devinfo, inst);1440type = brw_inst_3src_a1_src2_type(devinfo, inst);1441/* FINISHME: No vertical stride on src2. Is using the hstride in place1442* correct? Doesn't seem like it, since there's hstride=1 but1443* no vstride=1.1444*/1445_vert_stride = vstride_from_align1_3src_hstride(1446brw_inst_3src_a1_src2_hstride(devinfo, inst));1447_horiz_stride = hstride_from_align1_3src_hstride(1448brw_inst_3src_a1_src2_hstride(devinfo, inst));1449_width = implied_width(_vert_stride, _horiz_stride);1450} else {1451_file = BRW_GENERAL_REGISTER_FILE;1452reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst);1453subreg_nr = brw_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4;1454type = brw_inst_3src_a16_src_type(devinfo, inst);14551456if (brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) {1457_vert_stride = BRW_VERTICAL_STRIDE_0;1458_width = BRW_WIDTH_1;1459_horiz_stride = BRW_HORIZONTAL_STRIDE_0;1460} else {1461_vert_stride = BRW_VERTICAL_STRIDE_4;1462_width = BRW_WIDTH_4;1463_horiz_stride = BRW_HORIZONTAL_STRIDE_1;1464}1465}1466is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 &&1467_width == BRW_WIDTH_1 &&1468_horiz_stride == BRW_HORIZONTAL_STRIDE_0;14691470subreg_nr /= brw_reg_type_to_size(type);14711472err |= control(file, "negate", m_negate,1473brw_inst_3src_src2_negate(devinfo, inst), NULL);1474err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL);14751476err |= reg(file, _file, reg_nr);1477if (err == -1)1478return 0;1479if (subreg_nr || is_scalar_region)1480format(file, ".%d", subreg_nr);1481src_align1_region(file, _vert_stride, _width, _horiz_stride);1482if (!is_scalar_region && !is_align1)1483err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst));1484string(file, brw_reg_type_to_letters(type));1485return err;1486}14871488static int1489imm(FILE *file, const struct intel_device_info *devinfo, enum brw_reg_type type,1490const brw_inst *inst)1491{1492switch (type) {1493case BRW_REGISTER_TYPE_UQ:1494format(file, "0x%016"PRIx64"UQ", brw_inst_imm_uq(devinfo, inst));1495break;1496case BRW_REGISTER_TYPE_Q:1497format(file, "0x%016"PRIx64"Q", brw_inst_imm_uq(devinfo, inst));1498break;1499case BRW_REGISTER_TYPE_UD:1500format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));1501break;1502case BRW_REGISTER_TYPE_D:1503format(file, "%dD", brw_inst_imm_d(devinfo, inst));1504break;1505case BRW_REGISTER_TYPE_UW:1506format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));1507break;1508case BRW_REGISTER_TYPE_W:1509format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));1510break;1511case BRW_REGISTER_TYPE_UV:1512format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));1513break;1514case BRW_REGISTER_TYPE_VF:1515format(file, "0x%"PRIx64"VF", brw_inst_bits(inst, 127, 96));1516pad(file, 48);1517format(file, "/* [%-gF, %-gF, %-gF, %-gF]VF */",1518brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),1519brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),1520brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),1521brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));1522break;1523case BRW_REGISTER_TYPE_V:1524format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));1525break;1526case BRW_REGISTER_TYPE_F:1527/* The DIM instruction's src0 uses an F type but contains a1528* 64-bit immediate1529*/1530if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_DIM) {1531format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 64));1532pad(file, 48);1533format(file, "/* %-gF */", brw_inst_imm_df(devinfo, inst));1534} else {1535format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 96));1536pad(file, 48);1537format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst));1538}1539break;1540case BRW_REGISTER_TYPE_DF:1541format(file, "0x%016"PRIx64"DF", brw_inst_bits(inst, 127, 64));1542pad(file, 48);1543format(file, "/* %-gDF */", brw_inst_imm_df(devinfo, inst));1544break;1545case BRW_REGISTER_TYPE_HF:1546string(file, "Half Float IMM");1547break;1548case BRW_REGISTER_TYPE_NF:1549case BRW_REGISTER_TYPE_UB:1550case BRW_REGISTER_TYPE_B:1551format(file, "*** invalid immediate type %d ", type);1552}1553return 0;1554}15551556static int1557src_sends_da(FILE *file,1558const struct intel_device_info *devinfo,1559enum brw_reg_type type,1560enum brw_reg_file _reg_file,1561unsigned _reg_nr,1562unsigned _reg_subnr)1563{1564int err = 0;15651566err |= reg(file, _reg_file, _reg_nr);1567if (err == -1)1568return 0;1569if (_reg_subnr)1570format(file, ".1");1571string(file, brw_reg_type_to_letters(type));15721573return err;1574}15751576static int1577src_sends_ia(FILE *file,1578const struct intel_device_info *devinfo,1579enum brw_reg_type type,1580int _addr_imm,1581unsigned _addr_subreg_nr)1582{1583string(file, "g[a0");1584if (_addr_subreg_nr)1585format(file, ".1");1586if (_addr_imm)1587format(file, " %d", _addr_imm);1588string(file, "]");1589string(file, brw_reg_type_to_letters(type));15901591return 0;1592}15931594static int1595src_send_desc_ia(FILE *file,1596const struct intel_device_info *devinfo,1597unsigned _addr_subreg_nr)1598{1599string(file, "a0");1600if (_addr_subreg_nr)1601format(file, ".%d", _addr_subreg_nr);1602format(file, "<0>UD");16031604return 0;1605}16061607static int1608src0(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)1609{1610if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {1611if (devinfo->ver >= 12) {1612return src_sends_da(file,1613devinfo,1614BRW_REGISTER_TYPE_UD,1615brw_inst_send_src0_reg_file(devinfo, inst),1616brw_inst_src0_da_reg_nr(devinfo, inst),16170);1618} else if (brw_inst_send_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {1619return src_sends_da(file,1620devinfo,1621BRW_REGISTER_TYPE_UD,1622BRW_GENERAL_REGISTER_FILE,1623brw_inst_src0_da_reg_nr(devinfo, inst),1624brw_inst_src0_da16_subreg_nr(devinfo, inst));1625} else {1626return src_sends_ia(file,1627devinfo,1628BRW_REGISTER_TYPE_UD,1629brw_inst_send_src0_ia16_addr_imm(devinfo, inst),1630brw_inst_src0_ia_subreg_nr(devinfo, inst));1631}1632} else if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {1633return imm(file, devinfo, brw_inst_src0_type(devinfo, inst), inst);1634} else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {1635if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {1636return src_da1(file,1637devinfo,1638brw_inst_opcode(devinfo, inst),1639brw_inst_src0_type(devinfo, inst),1640brw_inst_src0_reg_file(devinfo, inst),1641brw_inst_src0_vstride(devinfo, inst),1642brw_inst_src0_width(devinfo, inst),1643brw_inst_src0_hstride(devinfo, inst),1644brw_inst_src0_da_reg_nr(devinfo, inst),1645brw_inst_src0_da1_subreg_nr(devinfo, inst),1646brw_inst_src0_abs(devinfo, inst),1647brw_inst_src0_negate(devinfo, inst));1648} else {1649return src_ia1(file,1650devinfo,1651brw_inst_opcode(devinfo, inst),1652brw_inst_src0_type(devinfo, inst),1653brw_inst_src0_ia1_addr_imm(devinfo, inst),1654brw_inst_src0_ia_subreg_nr(devinfo, inst),1655brw_inst_src0_negate(devinfo, inst),1656brw_inst_src0_abs(devinfo, inst),1657brw_inst_src0_hstride(devinfo, inst),1658brw_inst_src0_width(devinfo, inst),1659brw_inst_src0_vstride(devinfo, inst));1660}1661} else {1662if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {1663return src_da16(file,1664devinfo,1665brw_inst_opcode(devinfo, inst),1666brw_inst_src0_type(devinfo, inst),1667brw_inst_src0_reg_file(devinfo, inst),1668brw_inst_src0_vstride(devinfo, inst),1669brw_inst_src0_da_reg_nr(devinfo, inst),1670brw_inst_src0_da16_subreg_nr(devinfo, inst),1671brw_inst_src0_abs(devinfo, inst),1672brw_inst_src0_negate(devinfo, inst),1673brw_inst_src0_da16_swiz_x(devinfo, inst),1674brw_inst_src0_da16_swiz_y(devinfo, inst),1675brw_inst_src0_da16_swiz_z(devinfo, inst),1676brw_inst_src0_da16_swiz_w(devinfo, inst));1677} else {1678string(file, "Indirect align16 address mode not supported");1679return 1;1680}1681}1682}16831684static int1685src1(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)1686{1687if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) {1688return src_sends_da(file,1689devinfo,1690BRW_REGISTER_TYPE_UD,1691brw_inst_send_src1_reg_file(devinfo, inst),1692brw_inst_send_src1_reg_nr(devinfo, inst),16930 /* subreg_nr */);1694} else if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {1695return imm(file, devinfo, brw_inst_src1_type(devinfo, inst), inst);1696} else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {1697if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {1698return src_da1(file,1699devinfo,1700brw_inst_opcode(devinfo, inst),1701brw_inst_src1_type(devinfo, inst),1702brw_inst_src1_reg_file(devinfo, inst),1703brw_inst_src1_vstride(devinfo, inst),1704brw_inst_src1_width(devinfo, inst),1705brw_inst_src1_hstride(devinfo, inst),1706brw_inst_src1_da_reg_nr(devinfo, inst),1707brw_inst_src1_da1_subreg_nr(devinfo, inst),1708brw_inst_src1_abs(devinfo, inst),1709brw_inst_src1_negate(devinfo, inst));1710} else {1711return src_ia1(file,1712devinfo,1713brw_inst_opcode(devinfo, inst),1714brw_inst_src1_type(devinfo, inst),1715brw_inst_src1_ia1_addr_imm(devinfo, inst),1716brw_inst_src1_ia_subreg_nr(devinfo, inst),1717brw_inst_src1_negate(devinfo, inst),1718brw_inst_src1_abs(devinfo, inst),1719brw_inst_src1_hstride(devinfo, inst),1720brw_inst_src1_width(devinfo, inst),1721brw_inst_src1_vstride(devinfo, inst));1722}1723} else {1724if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) {1725return src_da16(file,1726devinfo,1727brw_inst_opcode(devinfo, inst),1728brw_inst_src1_type(devinfo, inst),1729brw_inst_src1_reg_file(devinfo, inst),1730brw_inst_src1_vstride(devinfo, inst),1731brw_inst_src1_da_reg_nr(devinfo, inst),1732brw_inst_src1_da16_subreg_nr(devinfo, inst),1733brw_inst_src1_abs(devinfo, inst),1734brw_inst_src1_negate(devinfo, inst),1735brw_inst_src1_da16_swiz_x(devinfo, inst),1736brw_inst_src1_da16_swiz_y(devinfo, inst),1737brw_inst_src1_da16_swiz_z(devinfo, inst),1738brw_inst_src1_da16_swiz_w(devinfo, inst));1739} else {1740string(file, "Indirect align16 address mode not supported");1741return 1;1742}1743}1744}17451746static int1747qtr_ctrl(FILE *file, const struct intel_device_info *devinfo,1748const brw_inst *inst)1749{1750int qtr_ctl = brw_inst_qtr_control(devinfo, inst);1751int exec_size = 1 << brw_inst_exec_size(devinfo, inst);1752const unsigned nib_ctl = devinfo->ver < 7 ? 0 :1753brw_inst_nib_control(devinfo, inst);17541755if (exec_size < 8 || nib_ctl) {1756format(file, " %dN", qtr_ctl * 2 + nib_ctl + 1);1757} else if (exec_size == 8) {1758switch (qtr_ctl) {1759case 0:1760string(file, " 1Q");1761break;1762case 1:1763string(file, " 2Q");1764break;1765case 2:1766string(file, " 3Q");1767break;1768case 3:1769string(file, " 4Q");1770break;1771}1772} else if (exec_size == 16) {1773if (qtr_ctl < 2)1774string(file, " 1H");1775else1776string(file, " 2H");1777}1778return 0;1779}17801781static int1782swsb(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst)1783{1784const enum opcode opcode = brw_inst_opcode(devinfo, inst);1785const uint8_t x = brw_inst_swsb(devinfo, inst);1786const struct tgl_swsb swsb = tgl_swsb_decode(devinfo, opcode, x);1787if (swsb.regdist)1788format(file, " %s@%d",1789(swsb.pipe == TGL_PIPE_FLOAT ? "F" :1790swsb.pipe == TGL_PIPE_INT ? "I" :1791swsb.pipe == TGL_PIPE_LONG ? "L" :1792swsb.pipe == TGL_PIPE_ALL ? "A" : "" ),1793swsb.regdist);1794if (swsb.mode)1795format(file, " $%d%s", swsb.sbid,1796(swsb.mode & TGL_SBID_SET ? "" :1797swsb.mode & TGL_SBID_DST ? ".dst" : ".src"));1798return 0;1799}18001801#ifdef DEBUG1802static __attribute__((__unused__)) int1803brw_disassemble_imm(const struct intel_device_info *devinfo,1804uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0)1805{1806brw_inst inst;1807inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0);1808inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2);1809return brw_disassemble_inst(stderr, devinfo, &inst, false, 0, NULL);1810}1811#endif18121813static void1814write_label(FILE *file, const struct intel_device_info *devinfo,1815const struct brw_label *root_label,1816int offset, int jump)1817{1818if (root_label != NULL) {1819int to_bytes_scale = sizeof(brw_inst) / brw_jump_scale(devinfo);1820const struct brw_label *label =1821brw_find_label(root_label, offset + jump * to_bytes_scale);1822if (label != NULL) {1823format(file, " LABEL%d", label->number);1824}1825}1826}18271828static void1829lsc_disassemble_ex_desc(const struct intel_device_info *devinfo,1830uint32_t imm_desc,1831uint32_t imm_ex_desc,1832FILE *file)1833{1834const unsigned addr_type = lsc_msg_desc_addr_type(devinfo, imm_desc);1835switch (addr_type) {1836case LSC_ADDR_SURFTYPE_FLAT:1837format(file, "base_offset %u ",1838lsc_flat_ex_desc_base_offset(devinfo, imm_ex_desc));1839break;1840case LSC_ADDR_SURFTYPE_BSS:1841case LSC_ADDR_SURFTYPE_SS:1842format(file, "surface_state_index %u ",1843lsc_bss_ex_desc_index(devinfo, imm_ex_desc));1844break;1845case LSC_ADDR_SURFTYPE_BTI:1846format(file, "BTI %u ",1847lsc_bti_ex_desc_index(devinfo, imm_ex_desc));1848format(file, "base_offset %u ",1849lsc_bti_ex_desc_base_offset(devinfo, imm_ex_desc));1850break;1851default:1852format(file, "unsupported address surface type %d", addr_type);1853break;1854}1855}18561857static inline bool1858brw_sfid_is_lsc(unsigned sfid)1859{1860switch (sfid) {1861case GFX12_SFID_UGM:1862case GFX12_SFID_SLM:1863case GFX12_SFID_TGM:1864return true;1865default:1866break;1867}18681869return false;1870}18711872int1873brw_disassemble_inst(FILE *file, const struct intel_device_info *devinfo,1874const brw_inst *inst, bool is_compacted,1875int offset, const struct brw_label *root_label)1876{1877int err = 0;1878int space = 0;18791880const enum opcode opcode = brw_inst_opcode(devinfo, inst);1881const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);18821883if (brw_inst_pred_control(devinfo, inst)) {1884string(file, "(");1885err |= control(file, "predicate inverse", pred_inv,1886brw_inst_pred_inv(devinfo, inst), NULL);1887format(file, "f%"PRIu64".%"PRIu64,1888devinfo->ver >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0,1889brw_inst_flag_subreg_nr(devinfo, inst));1890if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {1891err |= control(file, "predicate control align1", pred_ctrl_align1,1892brw_inst_pred_control(devinfo, inst), NULL);1893} else {1894err |= control(file, "predicate control align16", pred_ctrl_align16,1895brw_inst_pred_control(devinfo, inst), NULL);1896}1897string(file, ") ");1898}18991900err |= print_opcode(file, devinfo, opcode);19011902if (!is_send(opcode))1903err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst),1904NULL);19051906err |= control(file, "debug control", debug_ctrl,1907brw_inst_debug_control(devinfo, inst), NULL);19081909if (opcode == BRW_OPCODE_MATH) {1910string(file, " ");1911err |= control(file, "function", math_function,1912brw_inst_math_function(devinfo, inst), NULL);19131914} else if (opcode == BRW_OPCODE_SYNC) {1915string(file, " ");1916err |= control(file, "function", sync_function,1917brw_inst_cond_modifier(devinfo, inst), NULL);19181919} else if (!is_send(opcode)) {1920err |= control(file, "conditional modifier", conditional_modifier,1921brw_inst_cond_modifier(devinfo, inst), NULL);19221923/* If we're using the conditional modifier, print which flags reg is1924* used for it. Note that on gfx6+, the embedded-condition SEL and1925* control flow doesn't update flags.1926*/1927if (brw_inst_cond_modifier(devinfo, inst) &&1928(devinfo->ver < 6 || (opcode != BRW_OPCODE_SEL &&1929opcode != BRW_OPCODE_CSEL &&1930opcode != BRW_OPCODE_IF &&1931opcode != BRW_OPCODE_WHILE))) {1932format(file, ".f%"PRIu64".%"PRIu64,1933devinfo->ver >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0,1934brw_inst_flag_subreg_nr(devinfo, inst));1935}1936}19371938if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {1939string(file, "(");1940err |= control(file, "execution size", exec_size,1941brw_inst_exec_size(devinfo, inst), NULL);1942string(file, ")");1943}19441945if (opcode == BRW_OPCODE_SEND && devinfo->ver < 6)1946format(file, " %"PRIu64, brw_inst_base_mrf(devinfo, inst));19471948if (brw_has_uip(devinfo, opcode)) {1949/* Instructions that have UIP also have JIP. */1950pad(file, 16);1951string(file, "JIP: ");1952write_label(file, devinfo, root_label, offset, brw_inst_jip(devinfo, inst));19531954pad(file, 38);1955string(file, "UIP: ");1956write_label(file, devinfo, root_label, offset, brw_inst_uip(devinfo, inst));1957} else if (brw_has_jip(devinfo, opcode)) {1958int jip;1959if (devinfo->ver >= 7) {1960jip = brw_inst_jip(devinfo, inst);1961} else {1962jip = brw_inst_gfx6_jump_count(devinfo, inst);1963}19641965pad(file, 16);1966string(file, "JIP: ");1967write_label(file, devinfo, root_label, offset, jip);1968} else if (devinfo->ver < 6 && (opcode == BRW_OPCODE_BREAK ||1969opcode == BRW_OPCODE_CONTINUE ||1970opcode == BRW_OPCODE_ELSE)) {1971pad(file, 16);1972format(file, "Jump: %d", brw_inst_gfx4_jump_count(devinfo, inst));1973pad(file, 32);1974format(file, "Pop: %"PRIu64, brw_inst_gfx4_pop_count(devinfo, inst));1975} else if (devinfo->ver < 6 && (opcode == BRW_OPCODE_IF ||1976opcode == BRW_OPCODE_IFF ||1977opcode == BRW_OPCODE_HALT ||1978opcode == BRW_OPCODE_WHILE)) {1979pad(file, 16);1980format(file, "Jump: %d", brw_inst_gfx4_jump_count(devinfo, inst));1981} else if (devinfo->ver < 6 && opcode == BRW_OPCODE_ENDIF) {1982pad(file, 16);1983format(file, "Pop: %"PRIu64, brw_inst_gfx4_pop_count(devinfo, inst));1984} else if (opcode == BRW_OPCODE_JMPI) {1985pad(file, 16);1986err |= src1(file, devinfo, inst);1987} else if (desc && desc->nsrc == 3) {1988pad(file, 16);1989err |= dest_3src(file, devinfo, inst);19901991pad(file, 32);1992err |= src0_3src(file, devinfo, inst);19931994pad(file, 48);1995err |= src1_3src(file, devinfo, inst);19961997pad(file, 64);1998err |= src2_3src(file, devinfo, inst);1999} else if (desc) {2000if (desc->ndst > 0) {2001pad(file, 16);2002err |= dest(file, devinfo, inst);2003}20042005if (desc->nsrc > 0) {2006pad(file, 32);2007err |= src0(file, devinfo, inst);2008}20092010if (desc->nsrc > 1) {2011pad(file, 48);2012err |= src1(file, devinfo, inst);2013}2014}20152016if (is_send(opcode)) {2017enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);20182019bool has_imm_desc = false, has_imm_ex_desc = false;2020uint32_t imm_desc = 0, imm_ex_desc = 0;2021if (is_split_send(devinfo, opcode)) {2022pad(file, 64);2023if (brw_inst_send_sel_reg32_desc(devinfo, inst)) {2024/* show the indirect descriptor source */2025err |= src_send_desc_ia(file, devinfo, 0);2026} else {2027has_imm_desc = true;2028imm_desc = brw_inst_send_desc(devinfo, inst);2029fprintf(file, "0x%08"PRIx32, imm_desc);2030}20312032pad(file, 80);2033if (brw_inst_send_sel_reg32_ex_desc(devinfo, inst)) {2034/* show the indirect descriptor source */2035err |= src_send_desc_ia(file, devinfo,2036brw_inst_send_ex_desc_ia_subreg_nr(devinfo, inst));2037} else {2038has_imm_ex_desc = true;2039imm_ex_desc = brw_inst_sends_ex_desc(devinfo, inst);2040fprintf(file, "0x%08"PRIx32, imm_ex_desc);2041}2042} else {2043if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {2044/* show the indirect descriptor source */2045pad(file, 48);2046err |= src1(file, devinfo, inst);2047pad(file, 64);2048} else {2049has_imm_desc = true;2050imm_desc = brw_inst_send_desc(devinfo, inst);2051pad(file, 48);2052}20532054/* Print message descriptor as immediate source */2055fprintf(file, "0x%08"PRIx64, inst->data[1] >> 32);2056}20572058newline(file);2059pad(file, 16);2060space = 0;20612062fprintf(file, " ");2063err |= control(file, "SFID", devinfo->ver >= 6 ? gfx6_sfid : gfx4_sfid,2064sfid, &space);2065string(file, " MsgDesc:");20662067if (!has_imm_desc) {2068format(file, " indirect");2069} else {2070bool unsupported = false;2071switch (sfid) {2072case BRW_SFID_MATH:2073err |= control(file, "math function", math_function,2074brw_inst_math_msg_function(devinfo, inst), &space);2075err |= control(file, "math saturate", math_saturate,2076brw_inst_math_msg_saturate(devinfo, inst), &space);2077err |= control(file, "math signed", math_signed,2078brw_inst_math_msg_signed_int(devinfo, inst), &space);2079err |= control(file, "math scalar", math_scalar,2080brw_inst_math_msg_data_type(devinfo, inst), &space);2081err |= control(file, "math precision", math_precision,2082brw_inst_math_msg_precision(devinfo, inst), &space);2083break;2084case BRW_SFID_SAMPLER:2085if (devinfo->ver >= 5) {2086err |= control(file, "sampler message", gfx5_sampler_msg_type,2087brw_sampler_desc_msg_type(devinfo, imm_desc),2088&space);2089err |= control(file, "sampler simd mode", gfx5_sampler_simd_mode,2090brw_sampler_desc_simd_mode(devinfo, imm_desc),2091&space);2092format(file, " Surface = %u Sampler = %u",2093brw_sampler_desc_binding_table_index(devinfo, imm_desc),2094brw_sampler_desc_sampler(devinfo, imm_desc));2095} else {2096format(file, " (bti %u, sampler %u, msg_type %u, ",2097brw_sampler_desc_binding_table_index(devinfo, imm_desc),2098brw_sampler_desc_sampler(devinfo, imm_desc),2099brw_sampler_desc_msg_type(devinfo, imm_desc));2100if (!devinfo->is_g4x) {2101err |= control(file, "sampler target format",2102sampler_target_format,2103brw_sampler_desc_return_format(devinfo, imm_desc),2104NULL);2105}2106string(file, ")");2107}2108break;2109case GFX6_SFID_DATAPORT_SAMPLER_CACHE:2110case GFX6_SFID_DATAPORT_CONSTANT_CACHE:2111/* aka BRW_SFID_DATAPORT_READ on Gfx4-5 */2112if (devinfo->ver >= 6) {2113format(file, " (bti %u, msg_ctrl %u, msg_type %u, write_commit %u)",2114brw_dp_desc_binding_table_index(devinfo, imm_desc),2115brw_dp_desc_msg_control(devinfo, imm_desc),2116brw_dp_desc_msg_type(devinfo, imm_desc),2117devinfo->ver >= 7 ? 0u :2118brw_dp_write_desc_write_commit(devinfo, imm_desc));2119} else {2120bool is_965 = devinfo->ver == 4 && !devinfo->is_g4x;2121err |= control(file, "DP read message type",2122is_965 ? gfx4_dp_read_port_msg_type :2123g45_dp_read_port_msg_type,2124brw_dp_read_desc_msg_type(devinfo, imm_desc),2125&space);21262127format(file, " MsgCtrl = 0x%u",2128brw_dp_read_desc_msg_control(devinfo, imm_desc));21292130format(file, " Surface = %u",2131brw_dp_desc_binding_table_index(devinfo, imm_desc));2132}2133break;21342135case GFX6_SFID_DATAPORT_RENDER_CACHE: {2136/* aka BRW_SFID_DATAPORT_WRITE on Gfx4-5 */2137unsigned msg_type = brw_fb_write_desc_msg_type(devinfo, imm_desc);21382139err |= control(file, "DP rc message type",2140dp_rc_msg_type(devinfo), msg_type, &space);21412142bool is_rt_write = msg_type ==2143(devinfo->ver >= 6 ? GFX6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE2144: BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE);21452146if (is_rt_write) {2147err |= control(file, "RT message type", m_rt_write_subtype,2148brw_inst_rt_message_type(devinfo, inst), &space);2149if (devinfo->ver >= 6 && brw_inst_rt_slot_group(devinfo, inst))2150string(file, " Hi");2151if (brw_fb_write_desc_last_render_target(devinfo, imm_desc))2152string(file, " LastRT");2153if (devinfo->ver >= 10 &&2154brw_fb_write_desc_coarse_write(devinfo, imm_desc))2155string(file, " CoarseWrite");2156if (devinfo->ver < 7 &&2157brw_fb_write_desc_write_commit(devinfo, imm_desc))2158string(file, " WriteCommit");2159} else {2160format(file, " MsgCtrl = 0x%u",2161brw_fb_write_desc_msg_control(devinfo, imm_desc));2162}21632164format(file, " Surface = %u",2165brw_fb_desc_binding_table_index(devinfo, imm_desc));2166break;2167}21682169case BRW_SFID_URB: {2170unsigned opcode = brw_inst_urb_opcode(devinfo, inst);21712172format(file, " offset %"PRIu64, brw_inst_urb_global_offset(devinfo, inst));21732174space = 1;21752176err |= control(file, "urb opcode",2177devinfo->ver >= 7 ? gfx7_urb_opcode2178: gfx5_urb_opcode,2179opcode, &space);21802181if (devinfo->ver >= 7 &&2182brw_inst_urb_per_slot_offset(devinfo, inst)) {2183string(file, " per-slot");2184}21852186if (opcode == GFX8_URB_OPCODE_SIMD8_WRITE ||2187opcode == GFX8_URB_OPCODE_SIMD8_READ) {2188if (brw_inst_urb_channel_mask_present(devinfo, inst))2189string(file, " masked");2190} else {2191err |= control(file, "urb swizzle", urb_swizzle,2192brw_inst_urb_swizzle_control(devinfo, inst),2193&space);2194}21952196if (devinfo->ver < 7) {2197err |= control(file, "urb allocate", urb_allocate,2198brw_inst_urb_allocate(devinfo, inst), &space);2199err |= control(file, "urb used", urb_used,2200brw_inst_urb_used(devinfo, inst), &space);2201}2202if (devinfo->ver < 8) {2203err |= control(file, "urb complete", urb_complete,2204brw_inst_urb_complete(devinfo, inst), &space);2205}2206break;2207}2208case BRW_SFID_THREAD_SPAWNER:2209break;22102211case BRW_SFID_MESSAGE_GATEWAY:2212format(file, " (%s)",2213gfx7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]);2214break;22152216case GFX12_SFID_SLM:2217case GFX12_SFID_TGM:2218case GFX12_SFID_UGM: {2219assert(devinfo->has_lsc);2220format(file, " (");2221const enum lsc_opcode op = lsc_msg_desc_opcode(devinfo, imm_desc);2222err |= control(file, "operation", lsc_operation,2223op, &space);2224format(file, ",");2225err |= control(file, "addr_size", lsc_addr_size,2226lsc_msg_desc_addr_size(devinfo, imm_desc),2227&space);22282229if (op == LSC_OP_FENCE) {2230format(file, ",");2231err |= control(file, "scope", lsc_fence_scope,2232lsc_fence_msg_desc_scope(devinfo, imm_desc),2233&space);2234format(file, ",");2235err |= control(file, "flush_type", lsc_flush_type,2236lsc_fence_msg_desc_flush_type(devinfo, imm_desc),2237&space);2238format(file, ",");2239err |= control(file, "backup_mode_fence_routing",2240lsc_backup_fence_routing,2241lsc_fence_msg_desc_backup_routing(devinfo, imm_desc),2242&space);2243} else {2244format(file, ",");2245err |= control(file, "data_size", lsc_data_size,2246lsc_msg_desc_data_size(devinfo, imm_desc),2247&space);2248format(file, ",");2249if (lsc_opcode_has_cmask(op)) {2250err |= control(file, "component_mask",2251lsc_cmask_str,2252lsc_msg_desc_cmask(devinfo, imm_desc),2253&space);2254} else {2255err |= control(file, "vector_size",2256lsc_vect_size_str,2257lsc_msg_desc_vect_size(devinfo, imm_desc),2258&space);2259if (lsc_msg_desc_transpose(devinfo, imm_desc))2260format(file, ", transpose");2261}2262switch(op) {2263case LSC_OP_LOAD_CMASK:2264case LSC_OP_LOAD:2265format(file, ",");2266err |= control(file, "cache_load",2267lsc_cache_load,2268lsc_msg_desc_cache_ctrl(devinfo, imm_desc),2269&space);2270break;2271default:2272format(file, ",");2273err |= control(file, "cache_store",2274lsc_cache_store,2275lsc_msg_desc_cache_ctrl(devinfo, imm_desc),2276&space);2277break;2278}2279}2280format(file, " dst_len = %u,", lsc_msg_desc_dest_len(devinfo, imm_desc));2281format(file, " src0_len = %u,", lsc_msg_desc_src0_len(devinfo, imm_desc));2282format(file, " src1_len = %d", brw_message_ex_desc_ex_mlen(devinfo, imm_ex_desc));2283err |= control(file, "address_type", lsc_addr_surface_type,2284lsc_msg_desc_addr_type(devinfo, imm_desc), &space);2285format(file, " )");2286break;2287}22882289case GFX7_SFID_DATAPORT_DATA_CACHE:2290if (devinfo->ver >= 7) {2291format(file, " (");2292space = 0;22932294err |= control(file, "DP DC0 message type",2295dp_dc0_msg_type_gfx7,2296brw_dp_desc_msg_type(devinfo, imm_desc), &space);22972298format(file, ", bti %u, ",2299brw_dp_desc_binding_table_index(devinfo, imm_desc));23002301switch (brw_inst_dp_msg_type(devinfo, inst)) {2302case GFX7_DATAPORT_DC_UNTYPED_ATOMIC_OP:2303control(file, "atomic op", aop,2304brw_dp_desc_msg_control(devinfo, imm_desc) & 0xf,2305&space);2306break;2307case GFX7_DATAPORT_DC_OWORD_BLOCK_READ:2308case GFX7_DATAPORT_DC_OWORD_BLOCK_WRITE: {2309unsigned msg_ctrl = brw_dp_desc_msg_control(devinfo, imm_desc);2310assert(dp_oword_block_rw[msg_ctrl & 7]);2311format(file, "owords = %s, aligned = %d",2312dp_oword_block_rw[msg_ctrl & 7], (msg_ctrl >> 3) & 3);2313break;2314}2315default:2316format(file, "%u",2317brw_dp_desc_msg_control(devinfo, imm_desc));2318}2319format(file, ")");2320} else {2321unsupported = true;2322}2323break;23242325case HSW_SFID_DATAPORT_DATA_CACHE_1: {2326if (devinfo->ver >= 7) {2327format(file, " (");2328space = 0;23292330unsigned msg_ctrl = brw_dp_desc_msg_control(devinfo, imm_desc);23312332err |= control(file, "DP DC1 message type",2333dp_dc1_msg_type_hsw,2334brw_dp_desc_msg_type(devinfo, imm_desc), &space);23352336format(file, ", Surface = %u, ",2337brw_dp_desc_binding_table_index(devinfo, imm_desc));23382339switch (brw_inst_dp_msg_type(devinfo, inst)) {2340case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP:2341case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP:2342case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP:2343format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);2344FALLTHROUGH;2345case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2:2346case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2:2347case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2:2348case GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP:2349case GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_INT_OP:2350control(file, "atomic op", aop, msg_ctrl & 0xf, &space);2351break;2352case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ:2353case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE:2354case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ:2355case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE:2356case GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE:2357case GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ: {2358static const char *simd_modes[] = { "4x2", "16", "8" };2359format(file, "SIMD%s, Mask = 0x%x",2360simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf);2361break;2362}2363case GFX9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP:2364case GFX9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP:2365case GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_FLOAT_OP:2366format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16);2367control(file, "atomic float op", aop_float, msg_ctrl & 0xf,2368&space);2369break;2370case GFX9_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_WRITE:2371case GFX9_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_READ:2372assert(dp_oword_block_rw[msg_ctrl & 7]);2373format(file, "owords = %s, aligned = %d",2374dp_oword_block_rw[msg_ctrl & 7], (msg_ctrl >> 3) & 3);2375break;2376default:2377format(file, "0x%x", msg_ctrl);2378}2379format(file, ")");2380} else {2381unsupported = true;2382}2383break;2384}23852386case GFX7_SFID_PIXEL_INTERPOLATOR:2387if (devinfo->ver >= 7) {2388format(file, " (%s, %s, 0x%02"PRIx64")",2389brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp",2390pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)],2391brw_inst_pi_message_data(devinfo, inst));2392} else {2393unsupported = true;2394}2395break;23962397case GEN_RT_SFID_RAY_TRACE_ACCELERATOR:2398if (devinfo->has_ray_tracing) {2399format(file, " SIMD%d,",2400brw_rt_trace_ray_desc_exec_size(devinfo, imm_desc));2401} else {2402unsupported = true;2403}2404break;24052406default:2407unsupported = true;2408break;2409}24102411if (unsupported)2412format(file, "unsupported shared function ID %d", sfid);24132414if (space)2415string(file, " ");2416}2417if (brw_sfid_is_lsc(sfid)) {2418lsc_disassemble_ex_desc(devinfo, imm_desc, imm_ex_desc, file);2419} else {2420if (has_imm_desc)2421format(file, "mlen %u", brw_message_desc_mlen(devinfo, imm_desc));2422if (has_imm_ex_desc) {2423format(file, " ex_mlen %u",2424brw_message_ex_desc_ex_mlen(devinfo, imm_ex_desc));2425}2426if (has_imm_desc)2427format(file, " rlen %u", brw_message_desc_rlen(devinfo, imm_desc));2428}2429}2430pad(file, 64);2431if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) {2432string(file, "{");2433space = 1;2434err |= control(file, "access mode", access_mode,2435brw_inst_access_mode(devinfo, inst), &space);2436if (devinfo->ver >= 6) {2437err |= control(file, "write enable control", wectrl,2438brw_inst_mask_control(devinfo, inst), &space);2439} else {2440err |= control(file, "mask control", mask_ctrl,2441brw_inst_mask_control(devinfo, inst), &space);2442}24432444if (devinfo->ver < 12) {2445err |= control(file, "dependency control", dep_ctrl,2446((brw_inst_no_dd_check(devinfo, inst) << 1) |2447brw_inst_no_dd_clear(devinfo, inst)), &space);2448}24492450if (devinfo->ver >= 6)2451err |= qtr_ctrl(file, devinfo, inst);2452else {2453if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED &&2454desc && desc->ndst > 0 &&2455brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE &&2456brw_inst_dst_da_reg_nr(devinfo, inst) & BRW_MRF_COMPR4) {2457format(file, " compr4");2458} else {2459err |= control(file, "compression control", compr_ctrl,2460brw_inst_qtr_control(devinfo, inst), &space);2461}2462}24632464if (devinfo->ver >= 12)2465err |= swsb(file, devinfo, inst);24662467err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);2468err |= control(file, "thread control", thread_ctrl,2469(devinfo->ver >= 12 ? brw_inst_atomic_control(devinfo, inst) :2470brw_inst_thread_control(devinfo, inst)),2471&space);2472if (has_branch_ctrl(devinfo, opcode)) {2473err |= control(file, "branch ctrl", branch_ctrl,2474brw_inst_branch_control(devinfo, inst), &space);2475} else if (devinfo->ver >= 6) {2476err |= control(file, "acc write control", accwr,2477brw_inst_acc_wr_control(devinfo, inst), &space);2478}2479if (is_send(opcode))2480err |= control(file, "end of thread", end_of_thread,2481brw_inst_eot(devinfo, inst), &space);2482if (space)2483string(file, " ");2484string(file, "}");2485}2486string(file, ";");2487newline(file);2488return err;2489}249024912492