Path: blob/21.2-virgl/src/intel/compiler/brw_fs_cse.cpp
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/*1* Copyright © 2012 Intel Corporation2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice (including the next11* paragraph) shall be included in all copies or substantial portions of the12* Software.13*14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER18* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING19* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS20* IN THE SOFTWARE.21*/2223#include "brw_fs.h"24#include "brw_cfg.h"2526/** @file brw_fs_cse.cpp27*28* Support for local common subexpression elimination.29*30* See Muchnick's Advanced Compiler Design and Implementation, section31* 13.1 (p378).32*/3334using namespace brw;3536namespace {37struct aeb_entry : public exec_node {38/** The instruction that generates the expression value. */39fs_inst *generator;4041/** The temporary where the value is stored. */42fs_reg tmp;43};44}4546static bool47is_expression(const fs_visitor *v, const fs_inst *const inst)48{49switch (inst->opcode) {50case BRW_OPCODE_MOV:51case BRW_OPCODE_SEL:52case BRW_OPCODE_NOT:53case BRW_OPCODE_AND:54case BRW_OPCODE_OR:55case BRW_OPCODE_XOR:56case BRW_OPCODE_SHR:57case BRW_OPCODE_SHL:58case BRW_OPCODE_ASR:59case BRW_OPCODE_CMP:60case BRW_OPCODE_CMPN:61case BRW_OPCODE_ADD:62case BRW_OPCODE_MUL:63case SHADER_OPCODE_MULH:64case BRW_OPCODE_FRC:65case BRW_OPCODE_RNDU:66case BRW_OPCODE_RNDD:67case BRW_OPCODE_RNDE:68case BRW_OPCODE_RNDZ:69case BRW_OPCODE_LINE:70case BRW_OPCODE_PLN:71case BRW_OPCODE_MAD:72case BRW_OPCODE_LRP:73case FS_OPCODE_FB_READ_LOGICAL:74case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:75case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL:76case FS_OPCODE_LINTERP:77case SHADER_OPCODE_FIND_LIVE_CHANNEL:78case FS_OPCODE_LOAD_LIVE_CHANNELS:79case SHADER_OPCODE_BROADCAST:80case SHADER_OPCODE_MOV_INDIRECT:81case SHADER_OPCODE_TEX_LOGICAL:82case SHADER_OPCODE_TXD_LOGICAL:83case SHADER_OPCODE_TXF_LOGICAL:84case SHADER_OPCODE_TXL_LOGICAL:85case SHADER_OPCODE_TXS_LOGICAL:86case FS_OPCODE_TXB_LOGICAL:87case SHADER_OPCODE_TXF_CMS_LOGICAL:88case SHADER_OPCODE_TXF_CMS_W_LOGICAL:89case SHADER_OPCODE_TXF_UMS_LOGICAL:90case SHADER_OPCODE_TXF_MCS_LOGICAL:91case SHADER_OPCODE_LOD_LOGICAL:92case SHADER_OPCODE_TG4_LOGICAL:93case SHADER_OPCODE_TG4_OFFSET_LOGICAL:94case FS_OPCODE_PACK:95return true;96case SHADER_OPCODE_RCP:97case SHADER_OPCODE_RSQ:98case SHADER_OPCODE_SQRT:99case SHADER_OPCODE_EXP2:100case SHADER_OPCODE_LOG2:101case SHADER_OPCODE_POW:102case SHADER_OPCODE_INT_QUOTIENT:103case SHADER_OPCODE_INT_REMAINDER:104case SHADER_OPCODE_SIN:105case SHADER_OPCODE_COS:106return inst->mlen < 2;107case SHADER_OPCODE_LOAD_PAYLOAD:108return !is_coalescing_payload(v->alloc, inst);109default:110return inst->is_send_from_grf() && !inst->has_side_effects() &&111!inst->is_volatile();112}113}114115static bool116operands_match(const fs_inst *a, const fs_inst *b, bool *negate)117{118fs_reg *xs = a->src;119fs_reg *ys = b->src;120121if (a->opcode == BRW_OPCODE_MAD) {122return xs[0].equals(ys[0]) &&123((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||124(xs[2].equals(ys[1]) && xs[1].equals(ys[2])));125} else if (a->opcode == BRW_OPCODE_MUL && a->dst.type == BRW_REGISTER_TYPE_F) {126bool xs0_negate = xs[0].negate;127bool xs1_negate = xs[1].file == IMM ? xs[1].f < 0.0f128: xs[1].negate;129bool ys0_negate = ys[0].negate;130bool ys1_negate = ys[1].file == IMM ? ys[1].f < 0.0f131: ys[1].negate;132float xs1_imm = xs[1].f;133float ys1_imm = ys[1].f;134135xs[0].negate = false;136xs[1].negate = false;137ys[0].negate = false;138ys[1].negate = false;139xs[1].f = fabsf(xs[1].f);140ys[1].f = fabsf(ys[1].f);141142bool ret = (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||143(xs[1].equals(ys[0]) && xs[0].equals(ys[1]));144145xs[0].negate = xs0_negate;146xs[1].negate = xs[1].file == IMM ? false : xs1_negate;147ys[0].negate = ys0_negate;148ys[1].negate = ys[1].file == IMM ? false : ys1_negate;149xs[1].f = xs1_imm;150ys[1].f = ys1_imm;151152*negate = (xs0_negate != xs1_negate) != (ys0_negate != ys1_negate);153if (*negate && (a->saturate || b->saturate))154return false;155return ret;156} else if (!a->is_commutative()) {157bool match = true;158for (int i = 0; i < a->sources; i++) {159if (!xs[i].equals(ys[i])) {160match = false;161break;162}163}164return match;165} else {166return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||167(xs[1].equals(ys[0]) && xs[0].equals(ys[1]));168}169}170171static bool172instructions_match(fs_inst *a, fs_inst *b, bool *negate)173{174return a->opcode == b->opcode &&175a->force_writemask_all == b->force_writemask_all &&176a->exec_size == b->exec_size &&177a->group == b->group &&178a->saturate == b->saturate &&179a->predicate == b->predicate &&180a->predicate_inverse == b->predicate_inverse &&181a->conditional_mod == b->conditional_mod &&182a->flag_subreg == b->flag_subreg &&183a->dst.type == b->dst.type &&184a->offset == b->offset &&185a->mlen == b->mlen &&186a->ex_mlen == b->ex_mlen &&187a->sfid == b->sfid &&188a->desc == b->desc &&189a->size_written == b->size_written &&190a->base_mrf == b->base_mrf &&191a->check_tdr == b->check_tdr &&192a->send_has_side_effects == b->send_has_side_effects &&193a->eot == b->eot &&194a->header_size == b->header_size &&195a->shadow_compare == b->shadow_compare &&196a->pi_noperspective == b->pi_noperspective &&197a->target == b->target &&198a->sources == b->sources &&199operands_match(a, b, negate);200}201202static void203create_copy_instr(const fs_builder &bld, fs_inst *inst, fs_reg src, bool negate)204{205unsigned written = regs_written(inst);206unsigned dst_width =207DIV_ROUND_UP(inst->dst.component_size(inst->exec_size), REG_SIZE);208fs_inst *copy;209210if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD) {211assert(src.file == VGRF);212fs_reg *payload = ralloc_array(bld.shader->mem_ctx, fs_reg,213inst->sources);214for (int i = 0; i < inst->header_size; i++) {215payload[i] = src;216src.offset += REG_SIZE;217}218for (int i = inst->header_size; i < inst->sources; i++) {219src.type = inst->src[i].type;220payload[i] = src;221src = offset(src, bld, 1);222}223copy = bld.LOAD_PAYLOAD(inst->dst, payload, inst->sources,224inst->header_size);225} else if (written != dst_width) {226assert(src.file == VGRF);227assert(written % dst_width == 0);228const int sources = written / dst_width;229fs_reg *payload = ralloc_array(bld.shader->mem_ctx, fs_reg, sources);230for (int i = 0; i < sources; i++) {231payload[i] = src;232src = offset(src, bld, 1);233}234copy = bld.LOAD_PAYLOAD(inst->dst, payload, sources, 0);235} else {236copy = bld.MOV(inst->dst, src);237copy->group = inst->group;238copy->force_writemask_all = inst->force_writemask_all;239copy->src[0].negate = negate;240}241assert(regs_written(copy) == written);242}243244bool245fs_visitor::opt_cse_local(const fs_live_variables &live, bblock_t *block, int &ip)246{247bool progress = false;248exec_list aeb;249250void *cse_ctx = ralloc_context(NULL);251252foreach_inst_in_block(fs_inst, inst, block) {253/* Skip some cases. */254if (is_expression(this, inst) && !inst->is_partial_write() &&255((inst->dst.file != ARF && inst->dst.file != FIXED_GRF) ||256inst->dst.is_null()))257{258bool found = false;259bool negate = false;260261foreach_in_list_use_after(aeb_entry, entry, &aeb) {262/* Match current instruction's expression against those in AEB. */263if (!(entry->generator->dst.is_null() && !inst->dst.is_null()) &&264instructions_match(inst, entry->generator, &negate)) {265found = true;266progress = true;267break;268}269}270271if (!found) {272if (inst->opcode != BRW_OPCODE_MOV ||273(inst->opcode == BRW_OPCODE_MOV &&274inst->src[0].file == IMM &&275inst->src[0].type == BRW_REGISTER_TYPE_VF)) {276/* Our first sighting of this expression. Create an entry. */277aeb_entry *entry = ralloc(cse_ctx, aeb_entry);278entry->tmp = reg_undef;279entry->generator = inst;280aeb.push_tail(entry);281}282} else {283/* This is at least our second sighting of this expression.284* If we don't have a temporary already, make one.285*/286bool no_existing_temp = entry->tmp.file == BAD_FILE;287if (no_existing_temp && !entry->generator->dst.is_null()) {288const fs_builder ibld = fs_builder(this, block, entry->generator)289.at(block, entry->generator->next);290int written = regs_written(entry->generator);291292entry->tmp = fs_reg(VGRF, alloc.allocate(written),293entry->generator->dst.type);294295create_copy_instr(ibld, entry->generator, entry->tmp, false);296297entry->generator->dst = entry->tmp;298}299300/* dest <- temp */301if (!inst->dst.is_null()) {302assert(inst->size_written == entry->generator->size_written);303assert(inst->dst.type == entry->tmp.type);304const fs_builder ibld(this, block, inst);305306create_copy_instr(ibld, inst, entry->tmp, negate);307}308309/* Set our iterator so that next time through the loop inst->next310* will get the instruction in the basic block after the one we've311* removed.312*/313fs_inst *prev = (fs_inst *)inst->prev;314315inst->remove(block);316inst = prev;317}318}319320/* Discard jumps aren't represented in the CFG unfortunately, so we need321* to make sure that they behave as a CSE barrier, since we lack global322* dataflow information. This is particularly likely to cause problems323* with instructions dependent on the current execution mask like324* SHADER_OPCODE_FIND_LIVE_CHANNEL.325*/326if (inst->opcode == BRW_OPCODE_HALT ||327inst->opcode == SHADER_OPCODE_HALT_TARGET)328aeb.make_empty();329330foreach_in_list_safe(aeb_entry, entry, &aeb) {331/* Kill all AEB entries that write a different value to or read from332* the flag register if we just wrote it.333*/334if (inst->flags_written(devinfo)) {335bool negate; /* dummy */336if (entry->generator->flags_read(devinfo) ||337(entry->generator->flags_written(devinfo) &&338!instructions_match(inst, entry->generator, &negate))) {339entry->remove();340ralloc_free(entry);341continue;342}343}344345for (int i = 0; i < entry->generator->sources; i++) {346fs_reg *src_reg = &entry->generator->src[i];347348/* Kill all AEB entries that use the destination we just349* overwrote.350*/351if (regions_overlap(inst->dst, inst->size_written,352entry->generator->src[i],353entry->generator->size_read(i))) {354entry->remove();355ralloc_free(entry);356break;357}358359/* Kill any AEB entries using registers that don't get reused any360* more -- a sure sign they'll fail operands_match().361*/362if (src_reg->file == VGRF && live.vgrf_end[src_reg->nr] < ip) {363entry->remove();364ralloc_free(entry);365break;366}367}368}369370ip++;371}372373ralloc_free(cse_ctx);374375return progress;376}377378bool379fs_visitor::opt_cse()380{381const fs_live_variables &live = live_analysis.require();382bool progress = false;383int ip = 0;384385foreach_block (block, cfg) {386progress = opt_cse_local(live, block, ip) || progress;387}388389if (progress)390invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);391392return progress;393}394395396