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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/intel/compiler/brw_fs_cse.cpp
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/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "brw_fs.h"
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#include "brw_cfg.h"
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/** @file brw_fs_cse.cpp
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*
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* Support for local common subexpression elimination.
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*
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* See Muchnick's Advanced Compiler Design and Implementation, section
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* 13.1 (p378).
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*/
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using namespace brw;
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namespace {
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struct aeb_entry : public exec_node {
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/** The instruction that generates the expression value. */
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fs_inst *generator;
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/** The temporary where the value is stored. */
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fs_reg tmp;
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};
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}
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static bool
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is_expression(const fs_visitor *v, const fs_inst *const inst)
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{
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switch (inst->opcode) {
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case BRW_OPCODE_MOV:
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case BRW_OPCODE_SEL:
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case BRW_OPCODE_NOT:
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case BRW_OPCODE_AND:
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case BRW_OPCODE_OR:
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case BRW_OPCODE_XOR:
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case BRW_OPCODE_SHR:
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case BRW_OPCODE_SHL:
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case BRW_OPCODE_ASR:
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case BRW_OPCODE_CMP:
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case BRW_OPCODE_CMPN:
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case BRW_OPCODE_ADD:
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case BRW_OPCODE_MUL:
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case SHADER_OPCODE_MULH:
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case BRW_OPCODE_FRC:
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case BRW_OPCODE_RNDU:
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case BRW_OPCODE_RNDD:
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case BRW_OPCODE_RNDE:
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case BRW_OPCODE_RNDZ:
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case BRW_OPCODE_LINE:
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case BRW_OPCODE_PLN:
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case BRW_OPCODE_MAD:
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case BRW_OPCODE_LRP:
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case FS_OPCODE_FB_READ_LOGICAL:
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case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
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case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL:
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case FS_OPCODE_LINTERP:
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case SHADER_OPCODE_FIND_LIVE_CHANNEL:
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case FS_OPCODE_LOAD_LIVE_CHANNELS:
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case SHADER_OPCODE_BROADCAST:
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case SHADER_OPCODE_MOV_INDIRECT:
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case SHADER_OPCODE_TEX_LOGICAL:
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case SHADER_OPCODE_TXD_LOGICAL:
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case SHADER_OPCODE_TXF_LOGICAL:
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case SHADER_OPCODE_TXL_LOGICAL:
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case SHADER_OPCODE_TXS_LOGICAL:
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case FS_OPCODE_TXB_LOGICAL:
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case SHADER_OPCODE_TXF_CMS_LOGICAL:
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case SHADER_OPCODE_TXF_CMS_W_LOGICAL:
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case SHADER_OPCODE_TXF_UMS_LOGICAL:
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case SHADER_OPCODE_TXF_MCS_LOGICAL:
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case SHADER_OPCODE_LOD_LOGICAL:
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case SHADER_OPCODE_TG4_LOGICAL:
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case SHADER_OPCODE_TG4_OFFSET_LOGICAL:
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case FS_OPCODE_PACK:
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return true;
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case SHADER_OPCODE_RCP:
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case SHADER_OPCODE_RSQ:
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case SHADER_OPCODE_SQRT:
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case SHADER_OPCODE_EXP2:
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case SHADER_OPCODE_LOG2:
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case SHADER_OPCODE_POW:
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case SHADER_OPCODE_INT_QUOTIENT:
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case SHADER_OPCODE_INT_REMAINDER:
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case SHADER_OPCODE_SIN:
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case SHADER_OPCODE_COS:
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return inst->mlen < 2;
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case SHADER_OPCODE_LOAD_PAYLOAD:
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return !is_coalescing_payload(v->alloc, inst);
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default:
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return inst->is_send_from_grf() && !inst->has_side_effects() &&
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!inst->is_volatile();
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}
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}
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static bool
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operands_match(const fs_inst *a, const fs_inst *b, bool *negate)
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{
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fs_reg *xs = a->src;
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fs_reg *ys = b->src;
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if (a->opcode == BRW_OPCODE_MAD) {
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return xs[0].equals(ys[0]) &&
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((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
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(xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
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} else if (a->opcode == BRW_OPCODE_MUL && a->dst.type == BRW_REGISTER_TYPE_F) {
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bool xs0_negate = xs[0].negate;
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bool xs1_negate = xs[1].file == IMM ? xs[1].f < 0.0f
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: xs[1].negate;
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bool ys0_negate = ys[0].negate;
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bool ys1_negate = ys[1].file == IMM ? ys[1].f < 0.0f
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: ys[1].negate;
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float xs1_imm = xs[1].f;
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float ys1_imm = ys[1].f;
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xs[0].negate = false;
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xs[1].negate = false;
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ys[0].negate = false;
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ys[1].negate = false;
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xs[1].f = fabsf(xs[1].f);
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ys[1].f = fabsf(ys[1].f);
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bool ret = (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
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(xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
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xs[0].negate = xs0_negate;
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xs[1].negate = xs[1].file == IMM ? false : xs1_negate;
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ys[0].negate = ys0_negate;
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ys[1].negate = ys[1].file == IMM ? false : ys1_negate;
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xs[1].f = xs1_imm;
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ys[1].f = ys1_imm;
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*negate = (xs0_negate != xs1_negate) != (ys0_negate != ys1_negate);
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if (*negate && (a->saturate || b->saturate))
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return false;
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return ret;
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} else if (!a->is_commutative()) {
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bool match = true;
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for (int i = 0; i < a->sources; i++) {
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if (!xs[i].equals(ys[i])) {
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match = false;
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break;
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}
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}
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return match;
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} else {
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return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
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(xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
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}
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}
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static bool
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instructions_match(fs_inst *a, fs_inst *b, bool *negate)
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{
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return a->opcode == b->opcode &&
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a->force_writemask_all == b->force_writemask_all &&
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a->exec_size == b->exec_size &&
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a->group == b->group &&
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a->saturate == b->saturate &&
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a->predicate == b->predicate &&
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a->predicate_inverse == b->predicate_inverse &&
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a->conditional_mod == b->conditional_mod &&
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a->flag_subreg == b->flag_subreg &&
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a->dst.type == b->dst.type &&
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a->offset == b->offset &&
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a->mlen == b->mlen &&
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a->ex_mlen == b->ex_mlen &&
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a->sfid == b->sfid &&
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a->desc == b->desc &&
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a->size_written == b->size_written &&
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a->base_mrf == b->base_mrf &&
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a->check_tdr == b->check_tdr &&
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a->send_has_side_effects == b->send_has_side_effects &&
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a->eot == b->eot &&
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a->header_size == b->header_size &&
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a->shadow_compare == b->shadow_compare &&
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a->pi_noperspective == b->pi_noperspective &&
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a->target == b->target &&
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a->sources == b->sources &&
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operands_match(a, b, negate);
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}
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static void
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create_copy_instr(const fs_builder &bld, fs_inst *inst, fs_reg src, bool negate)
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{
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unsigned written = regs_written(inst);
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unsigned dst_width =
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DIV_ROUND_UP(inst->dst.component_size(inst->exec_size), REG_SIZE);
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fs_inst *copy;
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if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD) {
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assert(src.file == VGRF);
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fs_reg *payload = ralloc_array(bld.shader->mem_ctx, fs_reg,
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inst->sources);
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for (int i = 0; i < inst->header_size; i++) {
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payload[i] = src;
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src.offset += REG_SIZE;
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}
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for (int i = inst->header_size; i < inst->sources; i++) {
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src.type = inst->src[i].type;
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payload[i] = src;
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src = offset(src, bld, 1);
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}
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copy = bld.LOAD_PAYLOAD(inst->dst, payload, inst->sources,
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inst->header_size);
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} else if (written != dst_width) {
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assert(src.file == VGRF);
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assert(written % dst_width == 0);
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const int sources = written / dst_width;
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fs_reg *payload = ralloc_array(bld.shader->mem_ctx, fs_reg, sources);
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for (int i = 0; i < sources; i++) {
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payload[i] = src;
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src = offset(src, bld, 1);
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}
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copy = bld.LOAD_PAYLOAD(inst->dst, payload, sources, 0);
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} else {
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copy = bld.MOV(inst->dst, src);
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copy->group = inst->group;
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copy->force_writemask_all = inst->force_writemask_all;
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copy->src[0].negate = negate;
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}
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assert(regs_written(copy) == written);
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}
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bool
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fs_visitor::opt_cse_local(const fs_live_variables &live, bblock_t *block, int &ip)
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{
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bool progress = false;
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exec_list aeb;
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void *cse_ctx = ralloc_context(NULL);
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foreach_inst_in_block(fs_inst, inst, block) {
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/* Skip some cases. */
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if (is_expression(this, inst) && !inst->is_partial_write() &&
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((inst->dst.file != ARF && inst->dst.file != FIXED_GRF) ||
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inst->dst.is_null()))
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{
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bool found = false;
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bool negate = false;
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foreach_in_list_use_after(aeb_entry, entry, &aeb) {
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/* Match current instruction's expression against those in AEB. */
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if (!(entry->generator->dst.is_null() && !inst->dst.is_null()) &&
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instructions_match(inst, entry->generator, &negate)) {
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found = true;
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progress = true;
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break;
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}
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}
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if (!found) {
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if (inst->opcode != BRW_OPCODE_MOV ||
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(inst->opcode == BRW_OPCODE_MOV &&
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inst->src[0].file == IMM &&
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inst->src[0].type == BRW_REGISTER_TYPE_VF)) {
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/* Our first sighting of this expression. Create an entry. */
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aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
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entry->tmp = reg_undef;
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entry->generator = inst;
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aeb.push_tail(entry);
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}
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} else {
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/* This is at least our second sighting of this expression.
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* If we don't have a temporary already, make one.
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*/
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bool no_existing_temp = entry->tmp.file == BAD_FILE;
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if (no_existing_temp && !entry->generator->dst.is_null()) {
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const fs_builder ibld = fs_builder(this, block, entry->generator)
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.at(block, entry->generator->next);
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int written = regs_written(entry->generator);
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entry->tmp = fs_reg(VGRF, alloc.allocate(written),
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entry->generator->dst.type);
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create_copy_instr(ibld, entry->generator, entry->tmp, false);
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entry->generator->dst = entry->tmp;
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}
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/* dest <- temp */
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if (!inst->dst.is_null()) {
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assert(inst->size_written == entry->generator->size_written);
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assert(inst->dst.type == entry->tmp.type);
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const fs_builder ibld(this, block, inst);
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create_copy_instr(ibld, inst, entry->tmp, negate);
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}
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/* Set our iterator so that next time through the loop inst->next
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* will get the instruction in the basic block after the one we've
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* removed.
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*/
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fs_inst *prev = (fs_inst *)inst->prev;
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inst->remove(block);
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inst = prev;
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}
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}
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/* Discard jumps aren't represented in the CFG unfortunately, so we need
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* to make sure that they behave as a CSE barrier, since we lack global
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* dataflow information. This is particularly likely to cause problems
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* with instructions dependent on the current execution mask like
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* SHADER_OPCODE_FIND_LIVE_CHANNEL.
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*/
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if (inst->opcode == BRW_OPCODE_HALT ||
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inst->opcode == SHADER_OPCODE_HALT_TARGET)
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aeb.make_empty();
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foreach_in_list_safe(aeb_entry, entry, &aeb) {
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/* Kill all AEB entries that write a different value to or read from
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* the flag register if we just wrote it.
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*/
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if (inst->flags_written(devinfo)) {
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bool negate; /* dummy */
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if (entry->generator->flags_read(devinfo) ||
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(entry->generator->flags_written(devinfo) &&
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!instructions_match(inst, entry->generator, &negate))) {
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entry->remove();
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ralloc_free(entry);
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continue;
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}
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}
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for (int i = 0; i < entry->generator->sources; i++) {
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fs_reg *src_reg = &entry->generator->src[i];
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/* Kill all AEB entries that use the destination we just
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* overwrote.
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*/
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if (regions_overlap(inst->dst, inst->size_written,
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entry->generator->src[i],
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entry->generator->size_read(i))) {
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entry->remove();
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ralloc_free(entry);
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break;
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}
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/* Kill any AEB entries using registers that don't get reused any
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* more -- a sure sign they'll fail operands_match().
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*/
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if (src_reg->file == VGRF && live.vgrf_end[src_reg->nr] < ip) {
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entry->remove();
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ralloc_free(entry);
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break;
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}
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}
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}
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ip++;
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}
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ralloc_free(cse_ctx);
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return progress;
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}
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bool
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fs_visitor::opt_cse()
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{
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const fs_live_variables &live = live_analysis.require();
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bool progress = false;
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int ip = 0;
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foreach_block (block, cfg) {
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progress = opt_cse_local(live, block, ip) || progress;
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}
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if (progress)
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invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
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return progress;
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}
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