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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/intel/compiler/brw_fs_dead_code_eliminate.cpp
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/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "brw_fs.h"
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#include "brw_fs_live_variables.h"
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#include "brw_cfg.h"
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/** @file brw_fs_dead_code_eliminate.cpp
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*
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* Dataflow-aware dead code elimination.
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*
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* Walks the instruction list from the bottom, removing instructions that
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* have results that both aren't used in later blocks and haven't been read
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* yet in the tail end of this block.
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*/
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using namespace brw;
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/**
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* Is it safe to eliminate the instruction?
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*/
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static bool
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can_eliminate(const intel_device_info *devinfo, const fs_inst *inst,
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BITSET_WORD *flag_live)
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{
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return !inst->is_control_flow() &&
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!inst->has_side_effects() &&
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!(flag_live[0] & inst->flags_written(devinfo)) &&
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!inst->writes_accumulator;
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}
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/**
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* Is it safe to omit the write, making the destination ARF null?
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*/
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static bool
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can_omit_write(const fs_inst *inst)
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{
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switch (inst->opcode) {
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case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL:
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case SHADER_OPCODE_UNTYPED_ATOMIC_FLOAT_LOGICAL:
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case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL:
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return true;
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default:
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/* We can eliminate the destination write for ordinary instructions,
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* but not most SENDs.
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*/
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if (inst->opcode < 128 && inst->mlen == 0)
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return true;
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/* It might not be safe for other virtual opcodes. */
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return false;
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}
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}
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bool
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fs_visitor::dead_code_eliminate()
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{
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bool progress = false;
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const fs_live_variables &live_vars = live_analysis.require();
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int num_vars = live_vars.num_vars;
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BITSET_WORD *live = rzalloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars));
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BITSET_WORD *flag_live = rzalloc_array(NULL, BITSET_WORD, 1);
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foreach_block_reverse_safe(block, cfg) {
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memcpy(live, live_vars.block_data[block->num].liveout,
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sizeof(BITSET_WORD) * BITSET_WORDS(num_vars));
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memcpy(flag_live, live_vars.block_data[block->num].flag_liveout,
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sizeof(BITSET_WORD));
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foreach_inst_in_block_reverse_safe(fs_inst, inst, block) {
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if (inst->dst.file == VGRF) {
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const unsigned var = live_vars.var_from_reg(inst->dst);
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bool result_live = false;
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for (unsigned i = 0; i < regs_written(inst); i++)
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result_live |= BITSET_TEST(live, var + i);
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if (!result_live &&
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(can_omit_write(inst) || can_eliminate(devinfo, inst, flag_live))) {
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inst->dst = fs_reg(spread(retype(brw_null_reg(), inst->dst.type),
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inst->dst.stride));
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progress = true;
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}
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}
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if (inst->dst.is_null() && can_eliminate(devinfo, inst, flag_live)) {
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inst->opcode = BRW_OPCODE_NOP;
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progress = true;
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}
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if (inst->dst.file == VGRF) {
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if (!inst->is_partial_write()) {
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const unsigned var = live_vars.var_from_reg(inst->dst);
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for (unsigned i = 0; i < regs_written(inst); i++) {
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BITSET_CLEAR(live, var + i);
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}
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}
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}
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if (!inst->predicate && inst->exec_size >= 8)
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flag_live[0] &= ~inst->flags_written(devinfo);
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if (inst->opcode == BRW_OPCODE_NOP) {
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inst->remove(block, true);
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continue;
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}
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for (int i = 0; i < inst->sources; i++) {
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if (inst->src[i].file == VGRF) {
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int var = live_vars.var_from_reg(inst->src[i]);
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for (unsigned j = 0; j < regs_read(inst, i); j++) {
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BITSET_SET(live, var + j);
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}
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}
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}
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flag_live[0] |= inst->flags_read(devinfo);
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}
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}
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cfg->adjust_block_ips();
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ralloc_free(live);
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ralloc_free(flag_live);
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if (progress)
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invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
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return progress;
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}
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