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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/mesa
Path: blob/21.2-virgl/src/panfrost/bifrost/bi_lower_swizzle.c
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/*
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* Copyright (C) 2020 Collabora Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "compiler.h"
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#include "bi_builder.h"
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/* Not all 8-bit and 16-bit instructions support all swizzles on all sources.
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* These passes, intended to run after NIR->BIR but before scheduling/RA, lower
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* away swizzles that cannot be represented. In the future, we should try to
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* recombine swizzles where we can as an optimization.
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*/
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static void
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bi_lower_swizzle_16(bi_context *ctx, bi_instr *ins, unsigned src)
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{
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/* TODO: Use the opcode table and be a lot more methodical about this... */
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switch (ins->op) {
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/* Some instructions used with 16-bit data never have swizzles */
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case BI_OPCODE_CSEL_V2F16:
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case BI_OPCODE_CSEL_V2I16:
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case BI_OPCODE_CSEL_V2S16:
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case BI_OPCODE_CSEL_V2U16:
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/* Despite ostensibly being 32-bit instructions, CLPER does not
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* inherently interpret the data, so it can be used for v2f16
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* derivatives, which might require swizzle lowering */
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case BI_OPCODE_CLPER_V6_I32:
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case BI_OPCODE_CLPER_V7_I32:
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break;
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case BI_OPCODE_IADD_V2S16:
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case BI_OPCODE_IADD_V2U16:
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case BI_OPCODE_ISUB_V2S16:
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case BI_OPCODE_ISUB_V2U16:
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if (src == 0 && ins->src[src].swizzle != BI_SWIZZLE_H10)
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break;
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else
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return;
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case BI_OPCODE_LSHIFT_AND_V2I16:
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case BI_OPCODE_LSHIFT_OR_V2I16:
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case BI_OPCODE_LSHIFT_XOR_V2I16:
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case BI_OPCODE_RSHIFT_AND_V2I16:
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case BI_OPCODE_RSHIFT_OR_V2I16:
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case BI_OPCODE_RSHIFT_XOR_V2I16:
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if (src == 2)
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return;
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else
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break;
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default:
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return;
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}
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/* Identity is ok (TODO: what about replicate only?) */
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if (ins->src[src].swizzle == BI_SWIZZLE_H01)
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return;
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/* If the instruction is scalar we can ignore the other component */
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if (ins->dest[0].swizzle == BI_SWIZZLE_H00 &&
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ins->src[src].swizzle == BI_SWIZZLE_H00)
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{
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ins->src[src].swizzle = BI_SWIZZLE_H01;
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return;
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}
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/* Lower it away */
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bi_builder b = bi_init_builder(ctx, bi_before_instr(ins));
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ins->src[src] = bi_replace_index(ins->src[src],
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bi_swz_v2i16(&b, ins->src[src]));
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ins->src[src].swizzle = BI_SWIZZLE_H01;
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}
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void
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bi_lower_swizzle(bi_context *ctx)
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{
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bi_foreach_instr_global_safe(ctx, ins) {
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bi_foreach_src(ins, s) {
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if (!bi_is_null(ins->src[s]))
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bi_lower_swizzle_16(ctx, ins, s);
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}
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}
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}
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