Path: blob/21.2-virgl/src/panfrost/lib/pan_texture.c
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/*1* Copyright (C) 2008 VMware, Inc.2* Copyright (C) 2014 Broadcom3* Copyright (C) 2018-2019 Alyssa Rosenzweig4* Copyright (C) 2019-2020 Collabora, Ltd.5*6* Permission is hereby granted, free of charge, to any person obtaining a7* copy of this software and associated documentation files (the "Software"),8* to deal in the Software without restriction, including without limitation9* the rights to use, copy, modify, merge, publish, distribute, sublicense,10* and/or sell copies of the Software, and to permit persons to whom the11* Software is furnished to do so, subject to the following conditions:12*13* The above copyright notice and this permission notice (including the next14* paragraph) shall be included in all copies or substantial portions of the15* Software.16*17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR18* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,19* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL20* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER21* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,22* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE23* SOFTWARE.24*25*/2627#include "util/macros.h"28#include "util/u_math.h"29#include "pan_texture.h"30#include "panfrost-quirks.h"3132/* Generates a texture descriptor. Ideally, descriptors are immutable after the33* texture is created, so we can keep these hanging around in GPU memory in a34* dedicated BO and not have to worry. In practice there are some minor gotchas35* with this (the driver sometimes will change the format of a texture on the36* fly for compression) but it's fast enough to just regenerate the descriptor37* in those cases, rather than monkeypatching at drawtime. A texture descriptor38* consists of a 32-byte header followed by pointers.39*/4041/* List of supported modifiers, in descending order of preference. AFBC is42* faster than u-interleaved tiling which is faster than linear. Within AFBC,43* enabling the YUV-like transform is typically a win where possible. */4445uint64_t pan_best_modifiers[PAN_MODIFIER_COUNT] = {46DRM_FORMAT_MOD_ARM_AFBC(47AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |48AFBC_FORMAT_MOD_SPARSE |49AFBC_FORMAT_MOD_YTR),5051DRM_FORMAT_MOD_ARM_AFBC(52AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |53AFBC_FORMAT_MOD_SPARSE),5455DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED,56DRM_FORMAT_MOD_LINEAR57};5859/* Check if we need to set a custom stride by computing the "expected"60* stride and comparing it to what the user actually wants. Only applies61* to linear textures, since tiled/compressed textures have strict62* alignment requirements for their strides as it is */6364static bool65panfrost_needs_explicit_stride(const struct panfrost_device *dev,66const struct pan_image_view *iview)67{68/* Stride is explicit on Bifrost */69if (pan_is_bifrost(dev))70return true;7172if (iview->image->layout.modifier != DRM_FORMAT_MOD_LINEAR)73return false;7475unsigned bytes_per_block = util_format_get_blocksize(iview->format);76unsigned block_w = util_format_get_blockwidth(iview->format);7778for (unsigned l = iview->first_level; l <= iview->last_level; ++l) {79unsigned actual = iview->image->layout.slices[l].line_stride;80unsigned expected =81DIV_ROUND_UP(u_minify(iview->image->layout.width, l), block_w) *82bytes_per_block;8384if (actual != expected)85return true;86}8788return false;89}9091/* A Scalable Texture Compression (ASTC) corresponds to just a few texture type92* in the hardware, but in fact can be parametrized to have various widths and93* heights for the so-called "stretch factor". It turns out these parameters94* are stuffed in the bottom bits of the payload pointers. This functions95* computes these magic stuffing constants based on the ASTC format in use. The96* constant in a given dimension is 3-bits, and two are stored side-by-side for97* each active dimension.98*/99100static unsigned101panfrost_astc_stretch(unsigned dim)102{103assert(dim >= 4 && dim <= 12);104return MIN2(dim, 11) - 4;105}106107/* Texture addresses are tagged with information about compressed formats.108* AFBC uses a bit for whether the colorspace transform is enabled (RGB and109* RGBA only).110* For ASTC, this is a "stretch factor" encoding the block size. */111112static unsigned113panfrost_compression_tag(const struct panfrost_device *dev,114const struct util_format_description *desc,115enum mali_texture_dimension dim,116uint64_t modifier)117{118if (drm_is_afbc(modifier)) {119unsigned flags = (modifier & AFBC_FORMAT_MOD_YTR) ?120MALI_AFBC_SURFACE_FLAG_YTR : 0;121122if (!pan_is_bifrost(dev))123return flags;124125/* Prefetch enable */126flags |= MALI_AFBC_SURFACE_FLAG_PREFETCH;127128/* Wide blocks (> 16x16) */129if (panfrost_block_dim(modifier, true, 0) > 16)130flags |= MALI_AFBC_SURFACE_FLAG_WIDE_BLOCK;131132/* Used to make sure AFBC headers don't point outside the AFBC133* body. HW is using the AFBC surface stride to do this check,134* which doesn't work for 3D textures because the surface135* stride does not cover the body. Only supported on v7+.136*/137if (dev->arch >= 7 && dim != MALI_TEXTURE_DIMENSION_3D)138flags |= MALI_AFBC_SURFACE_FLAG_CHECK_PAYLOAD_RANGE;139140return flags;141} else if (desc->layout == UTIL_FORMAT_LAYOUT_ASTC) {142return (panfrost_astc_stretch(desc->block.height) << 3) |143panfrost_astc_stretch(desc->block.width);144} else {145return 0;146}147}148149150/* Cubemaps have 6 faces as "layers" in between each actual layer. We151* need to fix this up. TODO: logic wrong in the asserted out cases ...152* can they happen, perhaps from cubemap arrays? */153154static void155panfrost_adjust_cube_dimensions(156unsigned *first_face, unsigned *last_face,157unsigned *first_layer, unsigned *last_layer)158{159*first_face = *first_layer % 6;160*last_face = *last_layer % 6;161*first_layer /= 6;162*last_layer /= 6;163164assert((*first_layer == *last_layer) || (*first_face == 0 && *last_face == 5));165}166167/* Following the texture descriptor is a number of pointers. How many? */168169static unsigned170panfrost_texture_num_elements(171unsigned first_level, unsigned last_level,172unsigned first_layer, unsigned last_layer,173unsigned nr_samples,174bool is_cube, bool manual_stride)175{176unsigned first_face = 0, last_face = 0;177178if (is_cube) {179panfrost_adjust_cube_dimensions(&first_face, &last_face,180&first_layer, &last_layer);181}182183unsigned levels = 1 + last_level - first_level;184unsigned layers = 1 + last_layer - first_layer;185unsigned faces = 1 + last_face - first_face;186unsigned num_elements = levels * layers * faces * MAX2(nr_samples, 1);187188if (manual_stride)189num_elements *= 2;190191return num_elements;192}193194/* Conservative estimate of the size of the texture payload a priori.195* Average case, size equal to the actual size. Worst case, off by 2x (if196* a manual stride is not needed on a linear texture). Returned value197* must be greater than or equal to the actual size, so it's safe to use198* as an allocation amount */199200unsigned201panfrost_estimate_texture_payload_size(const struct panfrost_device *dev,202const struct pan_image_view *iview)203{204/* Assume worst case */205unsigned manual_stride = pan_is_bifrost(dev) ||206(iview->image->layout.modifier == DRM_FORMAT_MOD_LINEAR);207208unsigned elements =209panfrost_texture_num_elements(iview->first_level, iview->last_level,210iview->first_layer, iview->last_layer,211iview->image->layout.nr_samples,212iview->dim == MALI_TEXTURE_DIMENSION_CUBE,213manual_stride);214215return sizeof(mali_ptr) * elements;216}217218/* If not explicitly, line stride is calculated for block-based formats as219* (ceil(width / block_width) * block_size). As a special case, this is left220* zero if there is only a single block vertically. So, we have a helper to221* extract the dimensions of a block-based format and use that to calculate the222* line stride as such.223*/224225unsigned226panfrost_block_dim(uint64_t modifier, bool width, unsigned plane)227{228if (!drm_is_afbc(modifier)) {229assert(modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED);230return 16;231}232233switch (modifier & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK) {234case AFBC_FORMAT_MOD_BLOCK_SIZE_16x16:235return 16;236case AFBC_FORMAT_MOD_BLOCK_SIZE_32x8:237return width ? 32 : 8;238case AFBC_FORMAT_MOD_BLOCK_SIZE_64x4:239return width ? 64 : 4;240case AFBC_FORMAT_MOD_BLOCK_SIZE_32x8_64x4:241return plane ? (width ? 64 : 4) : (width ? 32 : 8);242default:243unreachable("Invalid AFBC block size");244}245}246247static void248panfrost_get_surface_strides(const struct panfrost_device *dev,249const struct pan_image_layout *layout,250unsigned l,251int32_t *row_stride, int32_t *surf_stride)252{253const struct pan_image_slice_layout *slice = &layout->slices[l];254255if (drm_is_afbc(layout->modifier)) {256/* Pre v7 don't have a row stride field. This field is257* repurposed as a Y offset which we don't use */258*row_stride = dev->arch < 7 ? 0 : slice->afbc.row_stride;259*surf_stride = slice->afbc.surface_stride;260} else {261*row_stride = slice->row_stride;262*surf_stride = slice->surface_stride;263}264}265266static mali_ptr267panfrost_get_surface_pointer(const struct pan_image_layout *layout,268enum mali_texture_dimension dim,269mali_ptr base,270unsigned l, unsigned w, unsigned f, unsigned s)271{272unsigned face_mult = dim == MALI_TEXTURE_DIMENSION_CUBE ? 6 : 1;273unsigned offset;274275if (layout->dim == MALI_TEXTURE_DIMENSION_3D) {276assert(!f && !s);277offset = layout->slices[l].offset +278(w * panfrost_get_layer_stride(layout, l));279} else {280offset = panfrost_texture_offset(layout, l, (w * face_mult) + f, s);281}282283return base + offset;284}285286struct panfrost_surface_iter {287unsigned layer, last_layer;288unsigned level, first_level, last_level;289unsigned face, first_face, last_face;290unsigned sample, first_sample, last_sample;291};292293static void294panfrost_surface_iter_begin(struct panfrost_surface_iter *iter,295unsigned first_layer, unsigned last_layer,296unsigned first_level, unsigned last_level,297unsigned first_face, unsigned last_face,298unsigned nr_samples)299{300iter->layer = first_layer;301iter->last_layer = last_layer;302iter->level = iter->first_level = first_level;303iter->last_level = last_level;304iter->face = iter->first_face = first_face;305iter->last_face = last_face;306iter->sample = iter->first_sample = 0;307iter->last_sample = nr_samples - 1;308}309310static bool311panfrost_surface_iter_end(const struct panfrost_surface_iter *iter)312{313return iter->layer > iter->last_layer;314}315316static void317panfrost_surface_iter_next(const struct panfrost_device *dev,318struct panfrost_surface_iter *iter)319{320#define INC_TEST(field) \321do { \322if (iter->field++ < iter->last_ ## field) \323return; \324iter->field = iter->first_ ## field; \325} while (0)326327/* Ordering is different on v7: inner loop is iterating on levels */328if (dev->arch >= 7)329INC_TEST(level);330331INC_TEST(sample);332INC_TEST(face);333334if (dev->arch < 7)335INC_TEST(level);336337iter->layer++;338339#undef INC_TEST340}341342static void343panfrost_emit_texture_payload(const struct panfrost_device *dev,344const struct pan_image_view *iview,345enum pipe_format format,346bool manual_stride,347void *payload)348{349const struct pan_image_layout *layout = &iview->image->layout;350const struct util_format_description *desc =351util_format_description(format);352353mali_ptr base = iview->image->data.bo->ptr.gpu + iview->image->data.offset;354355if (iview->buf.size) {356assert (iview->dim == MALI_TEXTURE_DIMENSION_1D);357base += iview->buf.offset;358}359360/* panfrost_compression_tag() wants the dimension of the resource, not the361* one of the image view (those might differ).362*/363base |= panfrost_compression_tag(dev, desc, layout->dim, layout->modifier);364365/* Inject the addresses in, interleaving array indices, mip levels,366* cube faces, and strides in that order */367368unsigned first_layer = iview->first_layer, last_layer = iview->last_layer;369unsigned nr_samples = layout->nr_samples;370unsigned first_face = 0, last_face = 0;371372if (iview->dim == MALI_TEXTURE_DIMENSION_CUBE) {373panfrost_adjust_cube_dimensions(&first_face, &last_face,374&first_layer, &last_layer);375}376377struct panfrost_surface_iter iter;378379for (panfrost_surface_iter_begin(&iter, first_layer, last_layer,380iview->first_level, iview->last_level,381first_face, last_face, nr_samples);382!panfrost_surface_iter_end(&iter);383panfrost_surface_iter_next(dev, &iter)) {384mali_ptr pointer =385panfrost_get_surface_pointer(layout, iview->dim, base,386iter.level, iter.layer,387iter.face, iter.sample);388389if (!manual_stride) {390pan_pack(payload, SURFACE, cfg) {391cfg.pointer = pointer;392}393payload += MALI_SURFACE_LENGTH;394} else {395pan_pack(payload, SURFACE_WITH_STRIDE, cfg) {396cfg.pointer = pointer;397panfrost_get_surface_strides(dev, layout, iter.level,398&cfg.row_stride,399&cfg.surface_stride);400}401payload += MALI_SURFACE_WITH_STRIDE_LENGTH;402}403}404}405406void407panfrost_new_texture(const struct panfrost_device *dev,408const struct pan_image_view *iview,409void *out, const struct panfrost_ptr *payload)410{411const struct pan_image_layout *layout = &iview->image->layout;412enum pipe_format format = iview->format;413unsigned swizzle;414415if (dev->arch == 7 && util_format_is_depth_or_stencil(format)) {416/* v7 doesn't have an _RRRR component order, combine the417* user swizzle with a .XXXX swizzle to emulate that.418*/419static const unsigned char replicate_x[4] = {420PIPE_SWIZZLE_X, PIPE_SWIZZLE_X,421PIPE_SWIZZLE_X, PIPE_SWIZZLE_X,422};423unsigned char patched_swizzle[4];424425util_format_compose_swizzles(replicate_x,426iview->swizzle,427patched_swizzle);428swizzle = panfrost_translate_swizzle_4(patched_swizzle);429} else {430swizzle = panfrost_translate_swizzle_4(iview->swizzle);431}432433bool manual_stride =434panfrost_needs_explicit_stride(dev, iview);435436panfrost_emit_texture_payload(dev, iview, format,437manual_stride,438payload->cpu);439440unsigned array_size = iview->last_layer - iview->first_layer + 1;441442if (iview->dim == MALI_TEXTURE_DIMENSION_CUBE) {443assert(iview->first_layer % 6 == 0);444assert(iview->last_layer % 6 == 5);445array_size /= 6;446}447448unsigned width;449450if (iview->buf.size) {451assert(iview->dim == MALI_TEXTURE_DIMENSION_1D);452assert(!iview->first_level && !iview->last_level);453assert(!iview->first_layer && !iview->last_layer);454assert(layout->nr_samples == 1);455assert(layout->height == 1 && layout->depth == 1);456assert(iview->buf.offset + iview->buf.size <= layout->width);457width = iview->buf.size;458} else {459width = u_minify(layout->width, iview->first_level);460}461462if (pan_is_bifrost(dev)) {463pan_pack(out, BIFROST_TEXTURE, cfg) {464cfg.dimension = iview->dim;465cfg.format = dev->formats[format].hw;466cfg.width = width;467cfg.height = u_minify(layout->height, iview->first_level);468if (iview->dim == MALI_TEXTURE_DIMENSION_3D)469cfg.depth = u_minify(layout->depth, iview->first_level);470else471cfg.sample_count = layout->nr_samples;472cfg.swizzle = swizzle;473cfg.texel_ordering =474panfrost_modifier_to_layout(layout->modifier);475cfg.levels = iview->last_level - iview->first_level + 1;476cfg.array_size = array_size;477cfg.surfaces = payload->gpu;478479/* We specify API-level LOD clamps in the sampler descriptor480* and use these clamps simply for bounds checking */481cfg.minimum_lod = FIXED_16(0, false);482cfg.maximum_lod = FIXED_16(cfg.levels - 1, false);483}484} else {485pan_pack(out, MIDGARD_TEXTURE, cfg) {486cfg.width = width;487cfg.height = u_minify(layout->height, iview->first_level);488if (iview->dim == MALI_TEXTURE_DIMENSION_3D)489cfg.depth = u_minify(layout->depth, iview->first_level);490else491cfg.sample_count = layout->nr_samples;492cfg.array_size = array_size;493cfg.format = panfrost_pipe_format_v6[format].hw;494cfg.dimension = iview->dim;495cfg.texel_ordering =496panfrost_modifier_to_layout(layout->modifier);497cfg.manual_stride = manual_stride;498cfg.levels = iview->last_level - iview->first_level + 1;499cfg.swizzle = swizzle;500};501}502}503504/* Computes sizes for checksumming, which is 8 bytes per 16x16 tile.505* Checksumming is believed to be a CRC variant (CRC64 based on the size?).506* This feature is also known as "transaction elimination". */507508#define CHECKSUM_TILE_WIDTH 16509#define CHECKSUM_TILE_HEIGHT 16510#define CHECKSUM_BYTES_PER_TILE 8511512unsigned513panfrost_compute_checksum_size(514struct pan_image_slice_layout *slice,515unsigned width,516unsigned height)517{518unsigned tile_count_x = DIV_ROUND_UP(width, CHECKSUM_TILE_WIDTH);519unsigned tile_count_y = DIV_ROUND_UP(height, CHECKSUM_TILE_HEIGHT);520521slice->crc.stride = tile_count_x * CHECKSUM_BYTES_PER_TILE;522523return slice->crc.stride * tile_count_y;524}525526unsigned527panfrost_get_layer_stride(const struct pan_image_layout *layout,528unsigned level)529{530if (layout->dim != MALI_TEXTURE_DIMENSION_3D)531return layout->array_stride;532else if (drm_is_afbc(layout->modifier))533return layout->slices[level].afbc.surface_stride;534else535return layout->slices[level].surface_stride;536}537538/* Computes the offset into a texture at a particular level/face. Add to539* the base address of a texture to get the address to that level/face */540541unsigned542panfrost_texture_offset(const struct pan_image_layout *layout,543unsigned level, unsigned array_idx,544unsigned surface_idx)545{546return layout->slices[level].offset +547(array_idx * layout->array_stride) +548(surface_idx * layout->slices[level].surface_stride);549}550551bool552pan_image_layout_init(const struct panfrost_device *dev,553struct pan_image_layout *layout,554uint64_t modifier,555enum pipe_format format,556enum mali_texture_dimension dim,557unsigned width, unsigned height, unsigned depth,558unsigned array_size, unsigned nr_samples,559unsigned nr_slices, enum pan_image_crc_mode crc_mode,560const struct pan_image_explicit_layout *explicit_layout)561{562/* Explicit stride only work with non-mipmap, non-array; single-sample563* 2D image, and in-band CRC can't be used.564*/565if (explicit_layout &&566(depth > 1 || nr_samples > 1 || array_size > 1 ||567dim != MALI_TEXTURE_DIMENSION_2D || nr_slices > 1 ||568crc_mode == PAN_IMAGE_CRC_INBAND))569return false;570571/* Mandate 64 byte alignement */572if (explicit_layout && (explicit_layout->offset & 63))573return false;574575layout->crc_mode = crc_mode;576layout->modifier = modifier;577layout->format = format;578layout->dim = dim;579layout->width = width;580layout->height = height;581layout->depth = depth;582layout->array_size = array_size;583layout->nr_samples = nr_samples;584layout->nr_slices = nr_slices;585586unsigned bytes_per_pixel = util_format_get_blocksize(format);587588/* MSAA is implemented as a 3D texture with z corresponding to the589* sample #, horrifyingly enough */590591assert(depth == 1 || nr_samples == 1);592593bool afbc = drm_is_afbc(layout->modifier);594bool tiled = layout->modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED;595bool linear = layout->modifier == DRM_FORMAT_MOD_LINEAR;596bool should_align = tiled || afbc;597bool is_3d = layout->dim == MALI_TEXTURE_DIMENSION_3D;598599unsigned oob_crc_offset = 0;600unsigned offset = explicit_layout ? explicit_layout->offset : 0;601unsigned tile_h = 1, tile_w = 1, tile_shift = 0;602603if (tiled || afbc) {604tile_w = panfrost_block_dim(layout->modifier, true, 0);605tile_h = panfrost_block_dim(layout->modifier, false, 0);606if (util_format_is_compressed(format))607tile_shift = 2;608}609610for (unsigned l = 0; l < nr_slices; ++l) {611struct pan_image_slice_layout *slice = &layout->slices[l];612613unsigned effective_width = width;614unsigned effective_height = height;615unsigned effective_depth = depth;616617if (should_align) {618effective_width = ALIGN_POT(effective_width, tile_w) >> tile_shift;619effective_height = ALIGN_POT(effective_height, tile_h);620621/* We don't need to align depth */622}623624/* Align levels to cache-line as a performance improvement for625* linear/tiled and as a requirement for AFBC */626627offset = ALIGN_POT(offset, 64);628629slice->offset = offset;630631/* Compute the would-be stride */632unsigned stride = bytes_per_pixel * effective_width;633634if (explicit_layout) {635/* Make sure the explicit stride is valid */636if (explicit_layout->line_stride < stride)637return false;638639stride = explicit_layout->line_stride;640} else if (linear) {641/* Keep lines alignment on 64 byte for performance */642stride = ALIGN_POT(stride, 64);643}644645slice->line_stride = stride;646slice->row_stride = stride * (tile_h >> tile_shift);647648unsigned slice_one_size = slice->line_stride * effective_height;649650/* Compute AFBC sizes if necessary */651if (afbc) {652slice->afbc.header_size =653panfrost_afbc_header_size(width, height);654655/* Stride between two rows of AFBC headers */656slice->afbc.row_stride =657(effective_width / tile_w) *658AFBC_HEADER_BYTES_PER_TILE;659660/* AFBC body size */661slice->afbc.body_size = slice_one_size;662663/* 3D AFBC resources have all headers placed at the664* beginning instead of having them split per depth665* level666*/667if (is_3d) {668slice->afbc.surface_stride =669slice->afbc.header_size;670slice->afbc.header_size *= effective_depth;671slice->afbc.body_size *= effective_depth;672offset += slice->afbc.header_size;673} else {674slice_one_size += slice->afbc.header_size;675slice->afbc.surface_stride = slice_one_size;676}677}678679unsigned slice_full_size =680slice_one_size * effective_depth * nr_samples;681682slice->surface_stride = slice_one_size;683684/* Compute AFBC sizes if necessary */685686offset += slice_full_size;687slice->size = slice_full_size;688689/* Add a checksum region if necessary */690if (crc_mode != PAN_IMAGE_CRC_NONE) {691slice->crc.size =692panfrost_compute_checksum_size(slice, width, height);693694if (crc_mode == PAN_IMAGE_CRC_INBAND) {695slice->crc.offset = offset;696offset += slice->crc.size;697slice->size += slice->crc.size;698} else {699slice->crc.offset = oob_crc_offset;700oob_crc_offset += slice->crc.size;701}702}703704width = u_minify(width, 1);705height = u_minify(height, 1);706depth = u_minify(depth, 1);707}708709/* Arrays and cubemaps have the entire miptree duplicated */710layout->array_stride = ALIGN_POT(offset, 64);711if (explicit_layout)712layout->data_size = offset;713else714layout->data_size = ALIGN_POT(layout->array_stride * array_size, 4096);715layout->crc_size = oob_crc_offset;716717return true;718}719720void721pan_iview_get_surface(const struct pan_image_view *iview,722unsigned level, unsigned layer, unsigned sample,723struct pan_surface *surf)724{725level += iview->first_level;726assert(level < iview->image->layout.nr_slices);727728layer += iview->first_layer;729730bool is_3d = iview->image->layout.dim == MALI_TEXTURE_DIMENSION_3D;731const struct pan_image_slice_layout *slice = &iview->image->layout.slices[level];732mali_ptr base = iview->image->data.bo->ptr.gpu + iview->image->data.offset;733734if (drm_is_afbc(iview->image->layout.modifier)) {735assert(!sample);736737if (is_3d) {738ASSERTED unsigned depth = u_minify(iview->image->layout.depth, level);739assert(layer < depth);740surf->afbc.header = base + slice->offset +741(layer * slice->afbc.surface_stride);742surf->afbc.body = base + slice->offset +743slice->afbc.header_size +744(slice->surface_stride * layer);745} else {746assert(layer < iview->image->layout.array_size);747surf->afbc.header = base +748panfrost_texture_offset(&iview->image->layout,749level, layer, 0);750surf->afbc.body = surf->afbc.header + slice->afbc.header_size;751}752} else {753unsigned array_idx = is_3d ? 0 : layer;754unsigned surface_idx = is_3d ? layer : sample;755756surf->data = base +757panfrost_texture_offset(&iview->image->layout, level,758array_idx, surface_idx);759}760}761762763