Path: blob/master/src/hotspot/cpu/arm/c1_LinearScan_arm.hpp
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/*1* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.2* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.3*4* This code is free software; you can redistribute it and/or modify it5* under the terms of the GNU General Public License version 2 only, as6* published by the Free Software Foundation.7*8* This code is distributed in the hope that it will be useful, but WITHOUT9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License11* version 2 for more details (a copy is included in the LICENSE file that12* accompanied this code).13*14* You should have received a copy of the GNU General Public License version15* 2 along with this work; if not, write to the Free Software Foundation,16* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.17*18* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA19* or visit www.oracle.com if you need additional information or have any20* questions.21*22*/2324#ifndef CPU_ARM_C1_LINEARSCAN_ARM_HPP25#define CPU_ARM_C1_LINEARSCAN_ARM_HPP2627inline bool LinearScan::is_processed_reg_num(int reg_num) {28return reg_num < pd_nof_cpu_regs_processed_in_linearscan ||29reg_num >= pd_nof_cpu_regs_frame_map;30}3132inline int LinearScan::num_physical_regs(BasicType type) {33if (type == T_LONG || type == T_DOUBLE) return 2;34return 1;35}363738inline bool LinearScan::requires_adjacent_regs(BasicType type) {39return type == T_DOUBLE || type == T_LONG;40}4142inline bool LinearScan::is_caller_save(int assigned_reg) {43assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers");44return true;45}464748inline void LinearScan::pd_add_temps(LIR_Op* op) {49// No extra temporals on ARM50}515253// Implementation of LinearScanWalker5455inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) {56#ifndef __SOFTFP__57if (cur->type() == T_FLOAT || cur->type() == T_DOUBLE) {58_first_reg = pd_first_fpu_reg;59_last_reg = pd_first_fpu_reg + pd_nof_fpu_regs_reg_alloc - 1;60return true;61}62#endif // !__SOFTFP__6364// Use allocatable CPU registers otherwise65_first_reg = pd_first_cpu_reg;66_last_reg = pd_first_cpu_reg + FrameMap::adjust_reg_range(pd_nof_cpu_regs_reg_alloc) - 1;67return true;68}6970#endif // CPU_ARM_C1_LINEARSCAN_ARM_HPP717273