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GitHub Repository: PojavLauncherTeam/mobile
Path: blob/master/src/hotspot/cpu/arm/interp_masm_arm.hpp
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/*
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* Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#ifndef CPU_ARM_INTERP_MASM_ARM_HPP
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#define CPU_ARM_INTERP_MASM_ARM_HPP
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#include "asm/macroAssembler.hpp"
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#include "interpreter/invocationCounter.hpp"
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#include "oops/method.hpp"
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#include "runtime/frame.hpp"
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#include "prims/jvmtiExport.hpp"
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// This file specializes the assember with interpreter-specific macros
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class InterpreterMacroAssembler: public MacroAssembler {
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public:
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// allow JvmtiExport checks to be extended
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bool can_force_early_return() { return JvmtiExport::can_force_early_return(); }
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bool can_post_interpreter_events() { return JvmtiExport::can_post_interpreter_events(); }
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bool can_pop_frame() { return JvmtiExport::can_pop_frame(); }
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bool can_post_breakpoint() { return JvmtiExport::can_post_breakpoint(); }
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bool can_post_field_access() { return JvmtiExport::can_post_field_access(); }
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bool can_post_field_modification() { return JvmtiExport::can_post_field_modification(); }
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// flags controlled by JVMTI settings
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bool rewrite_frequent_pairs() { return RewriteFrequentPairs; }
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protected:
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// Template interpreter specific version of call_VM_helper
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virtual void call_VM_helper(Register oop_result, address entry_point, int number_of_arguments, bool check_exceptions);
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// base routine for all dispatches
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typedef enum { DispatchDefault, DispatchNormal } DispatchTableMode;
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void dispatch_base(TosState state, DispatchTableMode table_mode, bool verifyoop = true, bool generate_poll = false);
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public:
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InterpreterMacroAssembler(CodeBuffer* code);
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virtual void check_and_handle_popframe();
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virtual void check_and_handle_earlyret();
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// Interpreter-specific registers
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inline void check_stack_top() {}
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inline void check_stack_top_on_expansion() {}
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inline void check_extended_sp(Register tmp) {}
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inline void check_no_cached_stack_top(Register tmp) {}
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void save_bcp() { str(Rbcp, Address(FP, frame::interpreter_frame_bcp_offset * wordSize)); }
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void restore_bcp() { ldr(Rbcp, Address(FP, frame::interpreter_frame_bcp_offset * wordSize)); }
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void restore_locals() { ldr(Rlocals, Address(FP, frame::interpreter_frame_locals_offset * wordSize)); }
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void restore_method() { ldr(Rmethod, Address(FP, frame::interpreter_frame_method_offset * wordSize)); }
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void restore_dispatch();
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// Helpers for runtime call arguments/results
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void get_const(Register reg) { ldr(reg, Address(Rmethod, Method::const_offset())); }
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void get_constant_pool(Register reg) { get_const(reg); ldr(reg, Address(reg, ConstMethod::constants_offset())); }
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void get_constant_pool_cache(Register reg) { get_constant_pool(reg); ldr(reg, Address(reg, ConstantPool::cache_offset_in_bytes())); }
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void get_cpool_and_tags(Register cpool, Register tags) { get_constant_pool(cpool); ldr(tags, Address(cpool, ConstantPool::tags_offset_in_bytes())); }
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// Sets reg. Blows Rtemp.
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void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset);
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// Sets index. Blows reg_tmp.
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void get_index_at_bcp(Register index, int bcp_offset, Register reg_tmp, size_t index_size = sizeof(u2));
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// Sets cache, index.
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void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2));
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void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2));
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// Sets cache. Blows reg_tmp.
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void get_cache_entry_pointer_at_bcp(Register cache, Register reg_tmp, int bcp_offset, size_t index_size = sizeof(u2));
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// Load object from cpool->resolved_references(*bcp+1)
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void load_resolved_reference_at_index(Register result, Register tmp);
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// load cpool->resolved_klass_at(index); Rtemp is corrupted upon return
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void load_resolved_klass_at_offset(Register Rcpool, Register Rindex, Register Rklass);
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void pop_ptr(Register r);
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void pop_i(Register r = R0_tos);
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void pop_l(Register lo = R0_tos_lo, Register hi = R1_tos_hi);
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void pop_f(FloatRegister fd);
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void pop_d(FloatRegister fd);
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void push_ptr(Register r);
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void push_i(Register r = R0_tos);
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void push_l(Register lo = R0_tos_lo, Register hi = R1_tos_hi);
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void push_f();
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void push_d();
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// Transition vtos -> state. Blows R0, R1. Sets TOS cached value.
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void pop(TosState state);
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// Transition state -> vtos. Blows Rtemp.
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void push(TosState state);
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// The following methods are overridden to allow overloaded calls to
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// MacroAssembler::push/pop(Register)
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// MacroAssembler::push/pop(RegisterSet)
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// InterpreterMacroAssembler::push/pop(TosState)
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void push(Register rd, AsmCondition cond = al) { MacroAssembler::push(rd, cond); }
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void pop(Register rd, AsmCondition cond = al) { MacroAssembler::pop(rd, cond); }
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void push(RegisterSet reg_set, AsmCondition cond = al) { MacroAssembler::push(reg_set, cond); }
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void pop(RegisterSet reg_set, AsmCondition cond = al) { MacroAssembler::pop(reg_set, cond); }
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// Converts return value in R0/R1 (interpreter calling conventions) to TOS cached value.
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void convert_retval_to_tos(TosState state);
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// Converts TOS cached value to return value in R0/R1 (according to interpreter calling conventions).
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void convert_tos_to_retval(TosState state);
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// JVMTI ForceEarlyReturn support
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void load_earlyret_value(TosState state);
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void jump_to_entry(address entry);
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// Blows Rtemp.
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void empty_expression_stack() {
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ldr(Rstack_top, Address(FP, frame::interpreter_frame_monitor_block_top_offset * wordSize));
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check_stack_top();
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// NULL last_sp until next java call
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str(zero_register(Rtemp), Address(FP, frame::interpreter_frame_last_sp_offset * wordSize));
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}
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// Helpers for swap and dup
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void load_ptr(int n, Register val);
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void store_ptr(int n, Register val);
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// Generate a subtype check: branch to not_subtype if sub_klass is
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// not a subtype of super_klass.
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// Profiling code for the subtype check failure (profile_typecheck_failed)
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// should be explicitly generated by the caller in the not_subtype case.
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// Blows Rtemp, tmp1, tmp2.
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void gen_subtype_check(Register Rsub_klass, Register Rsuper_klass,
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Label &not_subtype, Register tmp1, Register tmp2);
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// Dispatching
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void dispatch_prolog(TosState state, int step = 0);
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void dispatch_epilog(TosState state, int step = 0);
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void dispatch_only(TosState state, bool generate_poll = false); // dispatch by R3_bytecode
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void dispatch_only_normal(TosState state); // dispatch normal table by R3_bytecode
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void dispatch_only_noverify(TosState state);
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void dispatch_next(TosState state, int step = 0, bool generate_poll = false); // load R3_bytecode from [Rbcp + step] and dispatch by R3_bytecode
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// jump to an invoked target
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void prepare_to_jump_from_interpreted();
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void jump_from_interpreted(Register method);
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void narrow(Register result);
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// Returning from interpreted functions
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//
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// Removes the current activation (incl. unlocking of monitors)
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// and sets up the return address. This code is also used for
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// exception unwindwing. In that case, we do not want to throw
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// IllegalMonitorStateExceptions, since that might get us into an
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// infinite rethrow exception loop.
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// Additionally this code is used for popFrame and earlyReturn.
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// In popFrame case we want to skip throwing an exception,
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// installing an exception, and notifying jvmdi.
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// In earlyReturn case we only want to skip throwing an exception
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// and installing an exception.
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void remove_activation(TosState state, Register ret_addr,
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bool throw_monitor_exception = true,
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bool install_monitor_exception = true,
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bool notify_jvmdi = true);
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// At certain points in the method invocation the monitor of
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// synchronized methods hasn't been entered yet.
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// To correctly handle exceptions at these points, we set the thread local
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// variable _do_not_unlock_if_synchronized to true. The remove_activation will
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// check this flag.
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void set_do_not_unlock_if_synchronized(bool flag, Register tmp);
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// Debugging
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void interp_verify_oop(Register reg, TosState state, const char* file, int line); // only if +VerifyOops && state == atos
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void verify_FPU(int stack_depth, TosState state = ftos) {
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// No VFP state verification is required for ARM
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}
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// Object locking
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void lock_object (Register lock_reg);
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void unlock_object(Register lock_reg);
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// Interpreter profiling operations
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void set_method_data_pointer_for_bcp(); // Blows R0-R3/R0-R18, Rtemp, LR
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void test_method_data_pointer(Register mdp, Label& zero_continue);
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void verify_method_data_pointer();
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void set_mdp_data_at(Register mdp_in, int offset, Register value);
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// Increments mdp data. Sets bumped_count register to adjusted counter.
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void increment_mdp_data_at(Address data, Register bumped_count, bool decrement = false);
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// Increments mdp data. Sets bumped_count register to adjusted counter.
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void increment_mdp_data_at(Register mdp_in, int offset, Register bumped_count, bool decrement = false);
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void increment_mask_and_jump(Address counter_addr,
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int increment, Address mask_addr,
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Register scratch, Register scratch2,
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AsmCondition cond, Label* where);
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void set_mdp_flag_at(Register mdp_in, int flag_constant);
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void test_mdp_data_at(Register mdp_in, int offset, Register value,
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Register test_value_out,
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Label& not_equal_continue);
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void record_klass_in_profile(Register receiver, Register mdp,
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Register reg_tmp, bool is_virtual_call);
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void record_klass_in_profile_helper(Register receiver, Register mdp,
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Register reg_tmp,
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int start_row, Label& done, bool is_virtual_call);
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void update_mdp_by_offset(Register mdp_in, int offset_of_offset, Register reg_tmp);
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void update_mdp_by_offset(Register mdp_in, Register reg_offset, Register reg_tmp);
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void update_mdp_by_constant(Register mdp_in, int constant);
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void update_mdp_for_ret(Register return_bci); // Blows R0-R3/R0-R18, Rtemp, LR
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void profile_taken_branch(Register mdp, Register bumped_count); // Sets mdp, bumped_count registers, blows Rtemp.
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void profile_not_taken_branch(Register mdp); // Sets mdp, blows Rtemp.
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void profile_call(Register mdp); // Sets mdp, blows Rtemp.
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void profile_final_call(Register mdp); // Sets mdp, blows Rtemp.
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void profile_virtual_call(Register mdp, Register receiver, // Sets mdp, blows Rtemp.
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bool receiver_can_be_null = false);
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void profile_ret(Register mdp, Register return_bci); // Sets mdp, blows R0-R3/R0-R18, Rtemp, LR
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void profile_null_seen(Register mdp); // Sets mdp.
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void profile_typecheck(Register mdp, Register klass); // Sets mdp, blows Rtemp.
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void profile_typecheck_failed(Register mdp); // Sets mdp, blows Rtemp.
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void profile_switch_default(Register mdp); // Sets mdp, blows Rtemp.
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// Sets mdp. Blows reg_tmp1, reg_tmp2. Index could be the same as reg_tmp2.
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void profile_switch_case(Register mdp, Register index, Register reg_tmp1, Register reg_tmp2);
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void byteswap_u32(Register r, Register rtmp1, Register rtmp2);
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void inc_global_counter(address address_of_counter, int offset_in_bytes, Register tmp1, Register tmp2, bool avoid_overflow);
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typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode;
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// support for jvmti
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void notify_method_entry();
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void notify_method_exit(TosState state, NotifyMethodExitMode mode,
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bool native = false, Register result_lo = noreg, Register result_hi = noreg, FloatRegister result_fp = fnoreg);
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void trace_state(const char* msg) PRODUCT_RETURN;
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void get_method_counters(Register method,
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Register Rcounters,
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Label& skip,
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bool saveRegs = false,
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Register reg1 = noreg,
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Register reg2 = noreg,
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Register reg3 = noreg);
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};
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#endif // CPU_ARM_INTERP_MASM_ARM_HPP
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