Path: blob/master/src/hotspot/cpu/zero/icache_zero.hpp
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/*1* Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved.2* Copyright 2007, 2009 Red Hat, Inc.3* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.4*5* This code is free software; you can redistribute it and/or modify it6* under the terms of the GNU General Public License version 2 only, as7* published by the Free Software Foundation.8*9* This code is distributed in the hope that it will be useful, but WITHOUT10* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or11* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License12* version 2 for more details (a copy is included in the LICENSE file that13* accompanied this code).14*15* You should have received a copy of the GNU General Public License version16* 2 along with this work; if not, write to the Free Software Foundation,17* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.18*19* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA20* or visit www.oracle.com if you need additional information or have any21* questions.22*23*/2425#ifndef CPU_ZERO_ICACHE_ZERO_HPP26#define CPU_ZERO_ICACHE_ZERO_HPP2728// Interface for updating the instruction cache. Whenever the VM29// modifies code, part of the processor instruction cache potentially30// has to be flushed. This implementation is empty: Zero never deals31// with code.3233class ICache : public AbstractICache {34public:35static void initialize() {}36static void invalidate_word(address addr) {}37static void invalidate_range(address start, int nbytes) {}38};3940#endif // CPU_ZERO_ICACHE_ZERO_HPP414243