Path: blob/master/src/hotspot/os_cpu/bsd_x86/atomic_bsd_x86.hpp
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/*1* Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.2* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.3*4* This code is free software; you can redistribute it and/or modify it5* under the terms of the GNU General Public License version 2 only, as6* published by the Free Software Foundation.7*8* This code is distributed in the hope that it will be useful, but WITHOUT9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License11* version 2 for more details (a copy is included in the LICENSE file that12* accompanied this code).13*14* You should have received a copy of the GNU General Public License version15* 2 along with this work; if not, write to the Free Software Foundation,16* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.17*18* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA19* or visit www.oracle.com if you need additional information or have any20* questions.21*22*/2324#ifndef OS_CPU_BSD_X86_ATOMIC_BSD_X86_HPP25#define OS_CPU_BSD_X86_ATOMIC_BSD_X86_HPP2627// Implementation of class atomic2829template<size_t byte_size>30struct Atomic::PlatformAdd {31template<typename D, typename I>32D fetch_and_add(D volatile* dest, I add_value, atomic_memory_order /* order */) const;3334template<typename D, typename I>35D add_and_fetch(D volatile* dest, I add_value, atomic_memory_order order) const {36return fetch_and_add(dest, add_value, order) + add_value;37}38};3940template<>41template<typename D, typename I>42inline D Atomic::PlatformAdd<4>::fetch_and_add(D volatile* dest, I add_value,43atomic_memory_order /* order */) const {44STATIC_ASSERT(4 == sizeof(I));45STATIC_ASSERT(4 == sizeof(D));46D old_value;47__asm__ volatile ( "lock xaddl %0,(%2)"48: "=r" (old_value)49: "0" (add_value), "r" (dest)50: "cc", "memory");51return old_value;52}5354template<>55template<typename T>56inline T Atomic::PlatformXchg<4>::operator()(T volatile* dest,57T exchange_value,58atomic_memory_order /* order */) const {59STATIC_ASSERT(4 == sizeof(T));60__asm__ volatile ( "xchgl (%2),%0"61: "=r" (exchange_value)62: "0" (exchange_value), "r" (dest)63: "memory");64return exchange_value;65}6667template<>68template<typename T>69inline T Atomic::PlatformCmpxchg<1>::operator()(T volatile* dest,70T compare_value,71T exchange_value,72atomic_memory_order /* order */) const {73STATIC_ASSERT(1 == sizeof(T));74__asm__ volatile ( "lock cmpxchgb %1,(%3)"75: "=a" (exchange_value)76: "q" (exchange_value), "a" (compare_value), "r" (dest)77: "cc", "memory");78return exchange_value;79}8081template<>82template<typename T>83inline T Atomic::PlatformCmpxchg<4>::operator()(T volatile* dest,84T compare_value,85T exchange_value,86atomic_memory_order /* order */) const {87STATIC_ASSERT(4 == sizeof(T));88__asm__ volatile ( "lock cmpxchgl %1,(%3)"89: "=a" (exchange_value)90: "r" (exchange_value), "a" (compare_value), "r" (dest)91: "cc", "memory");92return exchange_value;93}9495#ifdef AMD6496template<>97template<typename D, typename I>98inline D Atomic::PlatformAdd<8>::fetch_and_add(D volatile* dest, I add_value,99atomic_memory_order /* order */) const {100STATIC_ASSERT(8 == sizeof(I));101STATIC_ASSERT(8 == sizeof(D));102D old_value;103__asm__ __volatile__ ( "lock xaddq %0,(%2)"104: "=r" (old_value)105: "0" (add_value), "r" (dest)106: "cc", "memory");107return old_value;108}109110template<>111template<typename T>112inline T Atomic::PlatformXchg<8>::operator()(T volatile* dest,113T exchange_value,114atomic_memory_order /* order */) const {115STATIC_ASSERT(8 == sizeof(T));116__asm__ __volatile__ ("xchgq (%2),%0"117: "=r" (exchange_value)118: "0" (exchange_value), "r" (dest)119: "memory");120return exchange_value;121}122123template<>124template<typename T>125inline T Atomic::PlatformCmpxchg<8>::operator()(T volatile* dest,126T compare_value,127T exchange_value,128atomic_memory_order /* order */) const {129STATIC_ASSERT(8 == sizeof(T));130__asm__ __volatile__ ( "lock cmpxchgq %1,(%3)"131: "=a" (exchange_value)132: "r" (exchange_value), "a" (compare_value), "r" (dest)133: "cc", "memory");134return exchange_value;135}136137#else // !AMD64138139extern "C" {140// defined in bsd_x86.s141int64_t _Atomic_cmpxchg_long(int64_t, volatile int64_t*, int64_t);142void _Atomic_move_long(const volatile int64_t* src, volatile int64_t* dst);143}144145template<>146template<typename T>147inline T Atomic::PlatformCmpxchg<8>::operator()(T volatile* dest,148T compare_value,149T exchange_value,150atomic_memory_order /* order */) const {151STATIC_ASSERT(8 == sizeof(T));152return cmpxchg_using_helper<int64_t>(_Atomic_cmpxchg_long, dest, compare_value, exchange_value);153}154155template<>156template<typename T>157inline T Atomic::PlatformLoad<8>::operator()(T const volatile* src) const {158STATIC_ASSERT(8 == sizeof(T));159volatile int64_t dest;160_Atomic_move_long(reinterpret_cast<const volatile int64_t*>(src), reinterpret_cast<volatile int64_t*>(&dest));161return PrimitiveConversions::cast<T>(dest);162}163164template<>165template<typename T>166inline void Atomic::PlatformStore<8>::operator()(T volatile* dest,167T store_value) const {168STATIC_ASSERT(8 == sizeof(T));169_Atomic_move_long(reinterpret_cast<const volatile int64_t*>(&store_value), reinterpret_cast<volatile int64_t*>(dest));170}171172#endif // AMD64173174template<>175struct Atomic::PlatformOrderedStore<1, RELEASE_X_FENCE>176{177template <typename T>178void operator()(volatile T* p, T v) const {179__asm__ volatile ( "xchgb (%2),%0"180: "=q" (v)181: "0" (v), "r" (p)182: "memory");183}184};185186template<>187struct Atomic::PlatformOrderedStore<2, RELEASE_X_FENCE>188{189template <typename T>190void operator()(volatile T* p, T v) const {191__asm__ volatile ( "xchgw (%2),%0"192: "=r" (v)193: "0" (v), "r" (p)194: "memory");195}196};197198template<>199struct Atomic::PlatformOrderedStore<4, RELEASE_X_FENCE>200{201template <typename T>202void operator()(volatile T* p, T v) const {203__asm__ volatile ( "xchgl (%2),%0"204: "=r" (v)205: "0" (v), "r" (p)206: "memory");207}208};209210#ifdef AMD64211template<>212struct Atomic::PlatformOrderedStore<8, RELEASE_X_FENCE>213{214template <typename T>215void operator()(volatile T* p, T v) const {216__asm__ volatile ( "xchgq (%2), %0"217: "=r" (v)218: "0" (v), "r" (p)219: "memory");220}221};222#endif // AMD64223224#endif // OS_CPU_BSD_X86_ATOMIC_BSD_X86_HPP225226227