Path: blob/master/src/hotspot/share/c1/c1_LIR.hpp
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/*1* Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved.2* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.3*4* This code is free software; you can redistribute it and/or modify it5* under the terms of the GNU General Public License version 2 only, as6* published by the Free Software Foundation.7*8* This code is distributed in the hope that it will be useful, but WITHOUT9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License11* version 2 for more details (a copy is included in the LICENSE file that12* accompanied this code).13*14* You should have received a copy of the GNU General Public License version15* 2 along with this work; if not, write to the Free Software Foundation,16* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.17*18* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA19* or visit www.oracle.com if you need additional information or have any20* questions.21*22*/2324#ifndef SHARE_C1_C1_LIR_HPP25#define SHARE_C1_C1_LIR_HPP2627#include "c1/c1_Defs.hpp"28#include "c1/c1_ValueType.hpp"29#include "oops/method.hpp"30#include "utilities/globalDefinitions.hpp"3132class BlockBegin;33class BlockList;34class LIR_Assembler;35class CodeEmitInfo;36class CodeStub;37class CodeStubList;38class C1SafepointPollStub;39class ArrayCopyStub;40class LIR_Op;41class ciType;42class ValueType;43class LIR_OpVisitState;44class FpuStackSim;4546//---------------------------------------------------------------------47// LIR Operands48// LIR_OprDesc49// LIR_OprPtr50// LIR_Const51// LIR_Address52//---------------------------------------------------------------------53class LIR_OprDesc;54class LIR_OprPtr;55class LIR_Const;56class LIR_Address;57class LIR_OprVisitor;585960typedef LIR_OprDesc* LIR_Opr;61typedef int RegNr;6263typedef GrowableArray<LIR_Opr> LIR_OprList;64typedef GrowableArray<LIR_Op*> LIR_OpArray;65typedef GrowableArray<LIR_Op*> LIR_OpList;6667// define LIR_OprPtr early so LIR_OprDesc can refer to it68class LIR_OprPtr: public CompilationResourceObj {69public:70bool is_oop_pointer() const { return (type() == T_OBJECT); }71bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }7273virtual LIR_Const* as_constant() { return NULL; }74virtual LIR_Address* as_address() { return NULL; }75virtual BasicType type() const = 0;76virtual void print_value_on(outputStream* out) const = 0;77};78798081// LIR constants82class LIR_Const: public LIR_OprPtr {83private:84JavaValue _value;8586void type_check(BasicType t) const { assert(type() == t, "type check"); }87void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }88void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }8990public:91LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }92LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }93LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }94LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }95LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }96LIR_Const(void* p) {97#ifdef _LP6498assert(sizeof(jlong) >= sizeof(p), "too small");;99_value.set_type(T_LONG); _value.set_jlong((jlong)p);100#else101assert(sizeof(jint) >= sizeof(p), "too small");;102_value.set_type(T_INT); _value.set_jint((jint)p);103#endif104}105LIR_Const(Metadata* m) {106_value.set_type(T_METADATA);107#ifdef _LP64108_value.set_jlong((jlong)m);109#else110_value.set_jint((jint)m);111#endif // _LP64112}113114virtual BasicType type() const { return _value.get_type(); }115virtual LIR_Const* as_constant() { return this; }116117jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }118jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }119jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }120jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }121jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }122jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }123jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }124125#ifdef _LP64126address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }127Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }128#else129address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }130Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }131#endif132133134jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }135jint as_jint_lo_bits() const {136if (type() == T_DOUBLE) {137return low(jlong_cast(_value.get_jdouble()));138} else {139return as_jint_lo();140}141}142jint as_jint_hi_bits() const {143if (type() == T_DOUBLE) {144return high(jlong_cast(_value.get_jdouble()));145} else {146return as_jint_hi();147}148}149jlong as_jlong_bits() const {150if (type() == T_DOUBLE) {151return jlong_cast(_value.get_jdouble());152} else {153return as_jlong();154}155}156157virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;158159160bool is_zero_float() {161jfloat f = as_jfloat();162jfloat ok = 0.0f;163return jint_cast(f) == jint_cast(ok);164}165166bool is_one_float() {167jfloat f = as_jfloat();168return !g_isnan(f) && g_isfinite(f) && f == 1.0;169}170171bool is_zero_double() {172jdouble d = as_jdouble();173jdouble ok = 0.0;174return jlong_cast(d) == jlong_cast(ok);175}176177bool is_one_double() {178jdouble d = as_jdouble();179return !g_isnan(d) && g_isfinite(d) && d == 1.0;180}181};182183184//---------------------LIR Operand descriptor------------------------------------185//186// The class LIR_OprDesc represents a LIR instruction operand;187// it can be a register (ALU/FPU), stack location or a constant;188// Constants and addresses are represented as resource area allocated189// structures (see above).190// Registers and stack locations are inlined into the this pointer191// (see value function).192193class LIR_OprDesc: public CompilationResourceObj {194public:195// value structure:196// data opr-type opr-kind197// +--------------+-------+-------+198// [max...........|7 6 5 4|3 2 1 0]199// ^200// is_pointer bit201//202// lowest bit cleared, means it is a structure pointer203// we need 4 bits to represent types204205private:206friend class LIR_OprFact;207208// Conversion209intptr_t value() const { return (intptr_t) this; }210211bool check_value_mask(intptr_t mask, intptr_t masked_value) const {212return (value() & mask) == masked_value;213}214215enum OprKind {216pointer_value = 0217, stack_value = 1218, cpu_register = 3219, fpu_register = 5220, illegal_value = 7221};222223enum OprBits {224pointer_bits = 1225, kind_bits = 3226, type_bits = 4227, size_bits = 2228, destroys_bits = 1229, virtual_bits = 1230, is_xmm_bits = 1231, last_use_bits = 1232, is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation233, non_data_bits = pointer_bits + kind_bits + type_bits + size_bits + destroys_bits + virtual_bits234+ is_xmm_bits + last_use_bits + is_fpu_stack_offset_bits235, data_bits = BitsPerInt - non_data_bits236, reg_bits = data_bits / 2 // for two registers in one value encoding237};238239enum OprShift {240kind_shift = 0241, type_shift = kind_shift + kind_bits242, size_shift = type_shift + type_bits243, destroys_shift = size_shift + size_bits244, last_use_shift = destroys_shift + destroys_bits245, is_fpu_stack_offset_shift = last_use_shift + last_use_bits246, virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits247, is_xmm_shift = virtual_shift + virtual_bits248, data_shift = is_xmm_shift + is_xmm_bits249, reg1_shift = data_shift250, reg2_shift = data_shift + reg_bits251252};253254enum OprSize {255single_size = 0 << size_shift256, double_size = 1 << size_shift257};258259enum OprMask {260kind_mask = right_n_bits(kind_bits)261, type_mask = right_n_bits(type_bits) << type_shift262, size_mask = right_n_bits(size_bits) << size_shift263, last_use_mask = right_n_bits(last_use_bits) << last_use_shift264, is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift265, virtual_mask = right_n_bits(virtual_bits) << virtual_shift266, is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift267, pointer_mask = right_n_bits(pointer_bits)268, lower_reg_mask = right_n_bits(reg_bits)269, no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))270};271272uintptr_t data() const { return value() >> data_shift; }273int lo_reg_half() const { return data() & lower_reg_mask; }274int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }275OprKind kind_field() const { return (OprKind)(value() & kind_mask); }276OprSize size_field() const { return (OprSize)(value() & size_mask); }277278static char type_char(BasicType t);279280public:281enum {282vreg_base = ConcreteRegisterImpl::number_of_registers,283vreg_max = (1 << data_bits) - 1284};285286static inline LIR_Opr illegalOpr();287288enum OprType {289unknown_type = 0 << type_shift // means: not set (catch uninitialized types)290, int_type = 1 << type_shift291, long_type = 2 << type_shift292, object_type = 3 << type_shift293, address_type = 4 << type_shift294, float_type = 5 << type_shift295, double_type = 6 << type_shift296, metadata_type = 7 << type_shift297};298friend OprType as_OprType(BasicType t);299friend BasicType as_BasicType(OprType t);300301OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }302OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }303304static OprSize size_for(BasicType t) {305switch (t) {306case T_LONG:307case T_DOUBLE:308return double_size;309break;310311case T_FLOAT:312case T_BOOLEAN:313case T_CHAR:314case T_BYTE:315case T_SHORT:316case T_INT:317case T_ADDRESS:318case T_OBJECT:319case T_ARRAY:320case T_METADATA:321return single_size;322break;323324default:325ShouldNotReachHere();326return single_size;327}328}329330331void validate_type() const PRODUCT_RETURN;332333BasicType type() const {334if (is_pointer()) {335return pointer()->type();336}337return as_BasicType(type_field());338}339340341ValueType* value_type() const { return as_ValueType(type()); }342343char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }344345bool is_equal(LIR_Opr opr) const { return this == opr; }346// checks whether types are same347bool is_same_type(LIR_Opr opr) const {348assert(type_field() != unknown_type &&349opr->type_field() != unknown_type, "shouldn't see unknown_type");350return type_field() == opr->type_field();351}352bool is_same_register(LIR_Opr opr) {353return (is_register() && opr->is_register() &&354kind_field() == opr->kind_field() &&355(value() & no_type_mask) == (opr->value() & no_type_mask));356}357358bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }359bool is_illegal() const { return kind_field() == illegal_value; }360bool is_valid() const { return kind_field() != illegal_value; }361362bool is_register() const { return is_cpu_register() || is_fpu_register(); }363bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }364365bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }366bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }367368bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }369bool is_oop() const;370371// semantic for fpu- and xmm-registers:372// * is_float and is_double return true for xmm_registers373// (so is_single_fpu and is_single_xmm are true)374// * So you must always check for is_???_xmm prior to is_???_fpu to375// distinguish between fpu- and xmm-registers376377bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }378bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }379bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }380381bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }382bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }383bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }384bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }385bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }386387bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }388bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }389bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }390bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }391bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }392393bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }394bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }395bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }396397// fast accessor functions for special bits that do not work for pointers398// (in this functions, the check for is_pointer() is omitted)399bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }400bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }401bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }402bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }403BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }404405bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }406bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }407LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }408LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }409410411int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }412int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }413RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }414RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }415RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }416RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }417RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }418RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }419RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }420RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }421RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }422int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }423424LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }425LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }426LIR_Address* as_address_ptr() const { return pointer()->as_address(); }427428Register as_register() const;429Register as_register_lo() const;430Register as_register_hi() const;431432Register as_pointer_register() {433#ifdef _LP64434if (is_double_cpu()) {435assert(as_register_lo() == as_register_hi(), "should be a single register");436return as_register_lo();437}438#endif439return as_register();440}441442FloatRegister as_float_reg () const;443FloatRegister as_double_reg () const;444#ifdef X86445XMMRegister as_xmm_float_reg () const;446XMMRegister as_xmm_double_reg() const;447// for compatibility with RInfo448int fpu() const { return lo_reg_half(); }449#endif450451jint as_jint() const { return as_constant_ptr()->as_jint(); }452jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }453jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }454jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }455jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }456457void print() const PRODUCT_RETURN;458void print(outputStream* out) const PRODUCT_RETURN;459};460461462inline LIR_OprDesc::OprType as_OprType(BasicType type) {463switch (type) {464case T_INT: return LIR_OprDesc::int_type;465case T_LONG: return LIR_OprDesc::long_type;466case T_FLOAT: return LIR_OprDesc::float_type;467case T_DOUBLE: return LIR_OprDesc::double_type;468case T_OBJECT:469case T_ARRAY: return LIR_OprDesc::object_type;470case T_ADDRESS: return LIR_OprDesc::address_type;471case T_METADATA: return LIR_OprDesc::metadata_type;472case T_ILLEGAL: // fall through473default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;474}475}476477inline BasicType as_BasicType(LIR_OprDesc::OprType t) {478switch (t) {479case LIR_OprDesc::int_type: return T_INT;480case LIR_OprDesc::long_type: return T_LONG;481case LIR_OprDesc::float_type: return T_FLOAT;482case LIR_OprDesc::double_type: return T_DOUBLE;483case LIR_OprDesc::object_type: return T_OBJECT;484case LIR_OprDesc::address_type: return T_ADDRESS;485case LIR_OprDesc::metadata_type:return T_METADATA;486case LIR_OprDesc::unknown_type: // fall through487default: ShouldNotReachHere(); return T_ILLEGAL;488}489}490491492// LIR_Address493class LIR_Address: public LIR_OprPtr {494friend class LIR_OpVisitState;495496public:497// NOTE: currently these must be the log2 of the scale factor (and498// must also be equivalent to the ScaleFactor enum in499// assembler_i486.hpp)500enum Scale {501times_1 = 0,502times_2 = 1,503times_4 = 2,504times_8 = 3505};506507private:508LIR_Opr _base;509LIR_Opr _index;510Scale _scale;511intx _disp;512BasicType _type;513514public:515LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):516_base(base)517, _index(index)518, _scale(times_1)519, _disp(0)520, _type(type) { verify(); }521522LIR_Address(LIR_Opr base, intx disp, BasicType type):523_base(base)524, _index(LIR_OprDesc::illegalOpr())525, _scale(times_1)526, _disp(disp)527, _type(type) { verify(); }528529LIR_Address(LIR_Opr base, BasicType type):530_base(base)531, _index(LIR_OprDesc::illegalOpr())532, _scale(times_1)533, _disp(0)534, _type(type) { verify(); }535536LIR_Address(LIR_Opr base, LIR_Opr index, intx disp, BasicType type):537_base(base)538, _index(index)539, _scale(times_1)540, _disp(disp)541, _type(type) { verify(); }542543LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):544_base(base)545, _index(index)546, _scale(scale)547, _disp(disp)548, _type(type) { verify(); }549550LIR_Opr base() const { return _base; }551LIR_Opr index() const { return _index; }552Scale scale() const { return _scale; }553intx disp() const { return _disp; }554555bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }556557virtual LIR_Address* as_address() { return this; }558virtual BasicType type() const { return _type; }559virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;560561void verify() const PRODUCT_RETURN;562563static Scale scale(BasicType type);564};565566567// operand factory568class LIR_OprFact: public AllStatic {569public:570571static LIR_Opr illegalOpr;572573static LIR_Opr single_cpu(int reg) {574return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |575LIR_OprDesc::int_type |576LIR_OprDesc::cpu_register |577LIR_OprDesc::single_size);578}579static LIR_Opr single_cpu_oop(int reg) {580return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |581LIR_OprDesc::object_type |582LIR_OprDesc::cpu_register |583LIR_OprDesc::single_size);584}585static LIR_Opr single_cpu_address(int reg) {586return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |587LIR_OprDesc::address_type |588LIR_OprDesc::cpu_register |589LIR_OprDesc::single_size);590}591static LIR_Opr single_cpu_metadata(int reg) {592return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |593LIR_OprDesc::metadata_type |594LIR_OprDesc::cpu_register |595LIR_OprDesc::single_size);596}597static LIR_Opr double_cpu(int reg1, int reg2) {598LP64_ONLY(assert(reg1 == reg2, "must be identical"));599return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |600(reg2 << LIR_OprDesc::reg2_shift) |601LIR_OprDesc::long_type |602LIR_OprDesc::cpu_register |603LIR_OprDesc::double_size);604}605606static LIR_Opr single_fpu(int reg) {607return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |608LIR_OprDesc::float_type |609LIR_OprDesc::fpu_register |610LIR_OprDesc::single_size);611}612613// Platform dependant.614static LIR_Opr double_fpu(int reg1, int reg2 = -1 /*fnoreg*/);615616#ifdef ARM32617static LIR_Opr single_softfp(int reg) {618return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |619LIR_OprDesc::float_type |620LIR_OprDesc::cpu_register |621LIR_OprDesc::single_size);622}623static LIR_Opr double_softfp(int reg1, int reg2) {624return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |625(reg2 << LIR_OprDesc::reg2_shift) |626LIR_OprDesc::double_type |627LIR_OprDesc::cpu_register |628LIR_OprDesc::double_size);629}630#endif // ARM32631632#if defined(X86)633static LIR_Opr single_xmm(int reg) {634return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |635LIR_OprDesc::float_type |636LIR_OprDesc::fpu_register |637LIR_OprDesc::single_size |638LIR_OprDesc::is_xmm_mask);639}640static LIR_Opr double_xmm(int reg) {641return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |642(reg << LIR_OprDesc::reg2_shift) |643LIR_OprDesc::double_type |644LIR_OprDesc::fpu_register |645LIR_OprDesc::double_size |646LIR_OprDesc::is_xmm_mask);647}648#endif // X86649650static LIR_Opr virtual_register(int index, BasicType type) {651if (index > LIR_OprDesc::vreg_max) {652// Running out of virtual registers. Caller should bailout.653return illegalOpr;654}655656LIR_Opr res;657switch (type) {658case T_OBJECT: // fall through659case T_ARRAY:660res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |661LIR_OprDesc::object_type |662LIR_OprDesc::cpu_register |663LIR_OprDesc::single_size |664LIR_OprDesc::virtual_mask);665break;666667case T_METADATA:668res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |669LIR_OprDesc::metadata_type|670LIR_OprDesc::cpu_register |671LIR_OprDesc::single_size |672LIR_OprDesc::virtual_mask);673break;674675case T_INT:676res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |677LIR_OprDesc::int_type |678LIR_OprDesc::cpu_register |679LIR_OprDesc::single_size |680LIR_OprDesc::virtual_mask);681break;682683case T_ADDRESS:684res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |685LIR_OprDesc::address_type |686LIR_OprDesc::cpu_register |687LIR_OprDesc::single_size |688LIR_OprDesc::virtual_mask);689break;690691case T_LONG:692res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |693LIR_OprDesc::long_type |694LIR_OprDesc::cpu_register |695LIR_OprDesc::double_size |696LIR_OprDesc::virtual_mask);697break;698699#ifdef __SOFTFP__700case T_FLOAT:701res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |702LIR_OprDesc::float_type |703LIR_OprDesc::cpu_register |704LIR_OprDesc::single_size |705LIR_OprDesc::virtual_mask);706break;707case T_DOUBLE:708res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |709LIR_OprDesc::double_type |710LIR_OprDesc::cpu_register |711LIR_OprDesc::double_size |712LIR_OprDesc::virtual_mask);713break;714#else // __SOFTFP__715case T_FLOAT:716res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |717LIR_OprDesc::float_type |718LIR_OprDesc::fpu_register |719LIR_OprDesc::single_size |720LIR_OprDesc::virtual_mask);721break;722723case724T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |725LIR_OprDesc::double_type |726LIR_OprDesc::fpu_register |727LIR_OprDesc::double_size |728LIR_OprDesc::virtual_mask);729break;730#endif // __SOFTFP__731default: ShouldNotReachHere(); res = illegalOpr;732}733734#ifdef ASSERT735res->validate_type();736assert(res->vreg_number() == index, "conversion check");737assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");738assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");739740// old-style calculation; check if old and new method are equal741LIR_OprDesc::OprType t = as_OprType(type);742#ifdef __SOFTFP__743LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |744t |745LIR_OprDesc::cpu_register |746LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);747#else // __SOFTFP__748LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |749((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |750LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);751assert(res == old_res, "old and new method not equal");752#endif // __SOFTFP__753#endif // ASSERT754755return res;756}757758// 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as759// the index is platform independent; a double stack useing indeces 2 and 3 has always760// index 2.761static LIR_Opr stack(int index, BasicType type) {762LIR_Opr res;763switch (type) {764case T_OBJECT: // fall through765case T_ARRAY:766res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |767LIR_OprDesc::object_type |768LIR_OprDesc::stack_value |769LIR_OprDesc::single_size);770break;771772case T_METADATA:773res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |774LIR_OprDesc::metadata_type |775LIR_OprDesc::stack_value |776LIR_OprDesc::single_size);777break;778case T_INT:779res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |780LIR_OprDesc::int_type |781LIR_OprDesc::stack_value |782LIR_OprDesc::single_size);783break;784785case T_ADDRESS:786res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |787LIR_OprDesc::address_type |788LIR_OprDesc::stack_value |789LIR_OprDesc::single_size);790break;791792case T_LONG:793res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |794LIR_OprDesc::long_type |795LIR_OprDesc::stack_value |796LIR_OprDesc::double_size);797break;798799case T_FLOAT:800res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |801LIR_OprDesc::float_type |802LIR_OprDesc::stack_value |803LIR_OprDesc::single_size);804break;805case T_DOUBLE:806res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |807LIR_OprDesc::double_type |808LIR_OprDesc::stack_value |809LIR_OprDesc::double_size);810break;811812default: ShouldNotReachHere(); res = illegalOpr;813}814815#ifdef ASSERT816assert(index >= 0, "index must be positive");817assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");818819LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |820LIR_OprDesc::stack_value |821as_OprType(type) |822LIR_OprDesc::size_for(type));823assert(res == old_res, "old and new method not equal");824#endif825826return res;827}828829static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }830static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }831static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }832static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }833static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }834static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }835static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }836static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }837static LIR_Opr illegal() { return (LIR_Opr)-1; }838static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }839static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }840841static LIR_Opr value_type(ValueType* type);842};843844845//-------------------------------------------------------------------------------846// LIR Instructions847//-------------------------------------------------------------------------------848//849// Note:850// - every instruction has a result operand851// - every instruction has an CodeEmitInfo operand (can be revisited later)852// - every instruction has a LIR_OpCode operand853// - LIR_OpN, means an instruction that has N input operands854//855// class hierarchy:856//857class LIR_Op;858class LIR_Op0;859class LIR_OpLabel;860class LIR_Op1;861class LIR_OpBranch;862class LIR_OpConvert;863class LIR_OpAllocObj;864class LIR_OpReturn;865class LIR_OpRoundFP;866class LIR_Op2;867class LIR_OpDelay;868class LIR_Op3;869class LIR_OpAllocArray;870class LIR_OpCall;871class LIR_OpJavaCall;872class LIR_OpRTCall;873class LIR_OpArrayCopy;874class LIR_OpUpdateCRC32;875class LIR_OpLock;876class LIR_OpTypeCheck;877class LIR_OpCompareAndSwap;878class LIR_OpProfileCall;879class LIR_OpProfileType;880#ifdef ASSERT881class LIR_OpAssert;882#endif883884// LIR operation codes885enum LIR_Code {886lir_none887, begin_op0888, lir_label889, lir_nop890, lir_backwardbranch_target891, lir_std_entry892, lir_osr_entry893, lir_fpop_raw894, lir_breakpoint895, lir_rtcall896, lir_membar897, lir_membar_acquire898, lir_membar_release899, lir_membar_loadload900, lir_membar_storestore901, lir_membar_loadstore902, lir_membar_storeload903, lir_get_thread904, lir_on_spin_wait905, end_op0906, begin_op1907, lir_fxch908, lir_fld909, lir_push910, lir_pop911, lir_null_check912, lir_return913, lir_leal914, lir_branch915, lir_cond_float_branch916, lir_move917, lir_convert918, lir_alloc_object919, lir_monaddr920, lir_roundfp921, lir_safepoint922, lir_unwind923, end_op1924, begin_op2925, lir_cmp926, lir_cmp_l2i927, lir_ucmp_fd2i928, lir_cmp_fd2i929, lir_cmove930, lir_add931, lir_sub932, lir_mul933, lir_div934, lir_rem935, lir_sqrt936, lir_abs937, lir_neg938, lir_tan939, lir_log10940, lir_logic_and941, lir_logic_or942, lir_logic_xor943, lir_shl944, lir_shr945, lir_ushr946, lir_alloc_array947, lir_throw948, lir_xadd949, lir_xchg950, end_op2951, begin_op3952, lir_idiv953, lir_irem954, lir_fmad955, lir_fmaf956, end_op3957, begin_opJavaCall958, lir_static_call959, lir_optvirtual_call960, lir_icvirtual_call961, lir_dynamic_call962, end_opJavaCall963, begin_opArrayCopy964, lir_arraycopy965, end_opArrayCopy966, begin_opUpdateCRC32967, lir_updatecrc32968, end_opUpdateCRC32969, begin_opLock970, lir_lock971, lir_unlock972, end_opLock973, begin_delay_slot974, lir_delay_slot975, end_delay_slot976, begin_opTypeCheck977, lir_instanceof978, lir_checkcast979, lir_store_check980, end_opTypeCheck981, begin_opCompareAndSwap982, lir_cas_long983, lir_cas_obj984, lir_cas_int985, end_opCompareAndSwap986, begin_opMDOProfile987, lir_profile_call988, lir_profile_type989, end_opMDOProfile990, begin_opAssert991, lir_assert992, end_opAssert993};994995996enum LIR_Condition {997lir_cond_equal998, lir_cond_notEqual999, lir_cond_less1000, lir_cond_lessEqual1001, lir_cond_greaterEqual1002, lir_cond_greater1003, lir_cond_belowEqual1004, lir_cond_aboveEqual1005, lir_cond_always1006, lir_cond_unknown = -11007};100810091010enum LIR_PatchCode {1011lir_patch_none,1012lir_patch_low,1013lir_patch_high,1014lir_patch_normal1015};101610171018enum LIR_MoveKind {1019lir_move_normal,1020lir_move_volatile,1021lir_move_unaligned,1022lir_move_wide,1023lir_move_max_flag1024};102510261027// --------------------------------------------------1028// LIR_Op1029// --------------------------------------------------1030class LIR_Op: public CompilationResourceObj {1031friend class LIR_OpVisitState;10321033#ifdef ASSERT1034private:1035const char * _file;1036int _line;1037#endif10381039protected:1040LIR_Opr _result;1041unsigned short _code;1042unsigned short _flags;1043CodeEmitInfo* _info;1044int _id; // value id for register allocation1045int _fpu_pop_count;1046Instruction* _source; // for debugging10471048static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;10491050protected:1051static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }10521053public:1054LIR_Op()1055:1056#ifdef ASSERT1057_file(NULL)1058, _line(0),1059#endif1060_result(LIR_OprFact::illegalOpr)1061, _code(lir_none)1062, _flags(0)1063, _info(NULL)1064, _id(-1)1065, _fpu_pop_count(0)1066, _source(NULL) {}10671068LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)1069:1070#ifdef ASSERT1071_file(NULL)1072, _line(0),1073#endif1074_result(result)1075, _code(code)1076, _flags(0)1077, _info(info)1078, _id(-1)1079, _fpu_pop_count(0)1080, _source(NULL) {}10811082CodeEmitInfo* info() const { return _info; }1083LIR_Code code() const { return (LIR_Code)_code; }1084LIR_Opr result_opr() const { return _result; }1085void set_result_opr(LIR_Opr opr) { _result = opr; }10861087#ifdef ASSERT1088void set_file_and_line(const char * file, int line) {1089_file = file;1090_line = line;1091}1092#endif10931094virtual const char * name() const PRODUCT_RETURN0;1095virtual void visit(LIR_OpVisitState* state);10961097int id() const { return _id; }1098void set_id(int id) { _id = id; }10991100// FPU stack simulation helpers -- only used on Intel1101void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }1102int fpu_pop_count() const { return _fpu_pop_count; }1103bool pop_fpu_stack() { return _fpu_pop_count > 0; }11041105Instruction* source() const { return _source; }1106void set_source(Instruction* ins) { _source = ins; }11071108virtual void emit_code(LIR_Assembler* masm) = 0;1109virtual void print_instr(outputStream* out) const = 0;1110virtual void print_on(outputStream* st) const PRODUCT_RETURN;11111112virtual bool is_patching() { return false; }1113virtual LIR_OpCall* as_OpCall() { return NULL; }1114virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }1115virtual LIR_OpLabel* as_OpLabel() { return NULL; }1116virtual LIR_OpDelay* as_OpDelay() { return NULL; }1117virtual LIR_OpLock* as_OpLock() { return NULL; }1118virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }1119virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }1120virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }1121virtual LIR_OpBranch* as_OpBranch() { return NULL; }1122virtual LIR_OpReturn* as_OpReturn() { return NULL; }1123virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }1124virtual LIR_OpConvert* as_OpConvert() { return NULL; }1125virtual LIR_Op0* as_Op0() { return NULL; }1126virtual LIR_Op1* as_Op1() { return NULL; }1127virtual LIR_Op2* as_Op2() { return NULL; }1128virtual LIR_Op3* as_Op3() { return NULL; }1129virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }1130virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }1131virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }1132virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }1133virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }1134virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }1135#ifdef ASSERT1136virtual LIR_OpAssert* as_OpAssert() { return NULL; }1137#endif11381139virtual void verify() const {}1140};11411142// for calls1143class LIR_OpCall: public LIR_Op {1144friend class LIR_OpVisitState;11451146protected:1147address _addr;1148LIR_OprList* _arguments;1149protected:1150LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,1151LIR_OprList* arguments, CodeEmitInfo* info = NULL)1152: LIR_Op(code, result, info)1153, _addr(addr)1154, _arguments(arguments) {}11551156public:1157address addr() const { return _addr; }1158const LIR_OprList* arguments() const { return _arguments; }1159virtual LIR_OpCall* as_OpCall() { return this; }1160};116111621163// --------------------------------------------------1164// LIR_OpJavaCall1165// --------------------------------------------------1166class LIR_OpJavaCall: public LIR_OpCall {1167friend class LIR_OpVisitState;11681169private:1170ciMethod* _method;1171LIR_Opr _receiver;1172LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.11731174public:1175LIR_OpJavaCall(LIR_Code code, ciMethod* method,1176LIR_Opr receiver, LIR_Opr result,1177address addr, LIR_OprList* arguments,1178CodeEmitInfo* info)1179: LIR_OpCall(code, addr, result, arguments, info)1180, _method(method)1181, _receiver(receiver)1182, _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)1183{ assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }11841185LIR_OpJavaCall(LIR_Code code, ciMethod* method,1186LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,1187LIR_OprList* arguments, CodeEmitInfo* info)1188: LIR_OpCall(code, (address)vtable_offset, result, arguments, info)1189, _method(method)1190, _receiver(receiver)1191, _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)1192{ assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }11931194LIR_Opr receiver() const { return _receiver; }1195ciMethod* method() const { return _method; }11961197// JSR 292 support.1198bool is_invokedynamic() const { return code() == lir_dynamic_call; }1199bool is_method_handle_invoke() const {1200return method()->is_compiled_lambda_form() || // Java-generated lambda form1201method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic1202}12031204virtual void emit_code(LIR_Assembler* masm);1205virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }1206virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1207};12081209// --------------------------------------------------1210// LIR_OpLabel1211// --------------------------------------------------1212// Location where a branch can continue1213class LIR_OpLabel: public LIR_Op {1214friend class LIR_OpVisitState;12151216private:1217Label* _label;1218public:1219LIR_OpLabel(Label* lbl)1220: LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)1221, _label(lbl) {}1222Label* label() const { return _label; }12231224virtual void emit_code(LIR_Assembler* masm);1225virtual LIR_OpLabel* as_OpLabel() { return this; }1226virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1227};12281229// LIR_OpArrayCopy1230class LIR_OpArrayCopy: public LIR_Op {1231friend class LIR_OpVisitState;12321233private:1234ArrayCopyStub* _stub;1235LIR_Opr _src;1236LIR_Opr _src_pos;1237LIR_Opr _dst;1238LIR_Opr _dst_pos;1239LIR_Opr _length;1240LIR_Opr _tmp;1241ciArrayKlass* _expected_type;1242int _flags;12431244public:1245enum Flags {1246src_null_check = 1 << 0,1247dst_null_check = 1 << 1,1248src_pos_positive_check = 1 << 2,1249dst_pos_positive_check = 1 << 3,1250length_positive_check = 1 << 4,1251src_range_check = 1 << 5,1252dst_range_check = 1 << 6,1253type_check = 1 << 7,1254overlapping = 1 << 8,1255unaligned = 1 << 9,1256src_objarray = 1 << 10,1257dst_objarray = 1 << 11,1258all_flags = (1 << 12) - 11259};12601261LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,1262ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);12631264LIR_Opr src() const { return _src; }1265LIR_Opr src_pos() const { return _src_pos; }1266LIR_Opr dst() const { return _dst; }1267LIR_Opr dst_pos() const { return _dst_pos; }1268LIR_Opr length() const { return _length; }1269LIR_Opr tmp() const { return _tmp; }1270int flags() const { return _flags; }1271ciArrayKlass* expected_type() const { return _expected_type; }1272ArrayCopyStub* stub() const { return _stub; }12731274virtual void emit_code(LIR_Assembler* masm);1275virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }1276void print_instr(outputStream* out) const PRODUCT_RETURN;1277};12781279// LIR_OpUpdateCRC321280class LIR_OpUpdateCRC32: public LIR_Op {1281friend class LIR_OpVisitState;12821283private:1284LIR_Opr _crc;1285LIR_Opr _val;12861287public:12881289LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);12901291LIR_Opr crc() const { return _crc; }1292LIR_Opr val() const { return _val; }12931294virtual void emit_code(LIR_Assembler* masm);1295virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }1296void print_instr(outputStream* out) const PRODUCT_RETURN;1297};12981299// --------------------------------------------------1300// LIR_Op01301// --------------------------------------------------1302class LIR_Op0: public LIR_Op {1303friend class LIR_OpVisitState;13041305public:1306LIR_Op0(LIR_Code code)1307: LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }1308LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)1309: LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }13101311virtual void emit_code(LIR_Assembler* masm);1312virtual LIR_Op0* as_Op0() { return this; }1313virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1314};131513161317// --------------------------------------------------1318// LIR_Op11319// --------------------------------------------------13201321class LIR_Op1: public LIR_Op {1322friend class LIR_OpVisitState;13231324protected:1325LIR_Opr _opr; // input operand1326BasicType _type; // Operand types1327LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)13281329static void print_patch_code(outputStream* out, LIR_PatchCode code);13301331void set_kind(LIR_MoveKind kind) {1332assert(code() == lir_move, "must be");1333_flags = kind;1334}13351336public:1337LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)1338: LIR_Op(code, result, info)1339, _opr(opr)1340, _type(type)1341, _patch(patch) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }13421343LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)1344: LIR_Op(code, result, info)1345, _opr(opr)1346, _type(type)1347, _patch(patch) {1348assert(code == lir_move, "must be");1349set_kind(kind);1350}13511352LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)1353: LIR_Op(code, LIR_OprFact::illegalOpr, info)1354, _opr(opr)1355, _type(T_ILLEGAL)1356, _patch(lir_patch_none) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }13571358LIR_Opr in_opr() const { return _opr; }1359LIR_PatchCode patch_code() const { return _patch; }1360BasicType type() const { return _type; }13611362LIR_MoveKind move_kind() const {1363assert(code() == lir_move, "must be");1364return (LIR_MoveKind)_flags;1365}13661367virtual bool is_patching() { return _patch != lir_patch_none; }1368virtual void emit_code(LIR_Assembler* masm);1369virtual LIR_Op1* as_Op1() { return this; }1370virtual const char * name() const PRODUCT_RETURN0;13711372void set_in_opr(LIR_Opr opr) { _opr = opr; }13731374virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1375virtual void verify() const;1376};137713781379// for runtime calls1380class LIR_OpRTCall: public LIR_OpCall {1381friend class LIR_OpVisitState;13821383private:1384LIR_Opr _tmp;1385public:1386LIR_OpRTCall(address addr, LIR_Opr tmp,1387LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)1388: LIR_OpCall(lir_rtcall, addr, result, arguments, info)1389, _tmp(tmp) {}13901391virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1392virtual void emit_code(LIR_Assembler* masm);1393virtual LIR_OpRTCall* as_OpRTCall() { return this; }13941395LIR_Opr tmp() const { return _tmp; }13961397virtual void verify() const;1398};139914001401class LIR_OpBranch: public LIR_Op {1402friend class LIR_OpVisitState;14031404private:1405LIR_Condition _cond;1406Label* _label;1407BlockBegin* _block; // if this is a branch to a block, this is the block1408BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block1409CodeStub* _stub; // if this is a branch to a stub, this is the stub14101411public:1412LIR_OpBranch(LIR_Condition cond, Label* lbl)1413: LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)1414, _cond(cond)1415, _label(lbl)1416, _block(NULL)1417, _ublock(NULL)1418, _stub(NULL) { }14191420LIR_OpBranch(LIR_Condition cond, BlockBegin* block);1421LIR_OpBranch(LIR_Condition cond, CodeStub* stub);14221423// for unordered comparisons1424LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock);14251426LIR_Condition cond() const { return _cond; }1427Label* label() const { return _label; }1428BlockBegin* block() const { return _block; }1429BlockBegin* ublock() const { return _ublock; }1430CodeStub* stub() const { return _stub; }14311432void change_block(BlockBegin* b);1433void change_ublock(BlockBegin* b);1434void negate_cond();14351436virtual void emit_code(LIR_Assembler* masm);1437virtual LIR_OpBranch* as_OpBranch() { return this; }1438virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1439};14401441class LIR_OpReturn: public LIR_Op1 {1442friend class LIR_OpVisitState;14431444private:1445C1SafepointPollStub* _stub;14461447public:1448LIR_OpReturn(LIR_Opr opr);14491450C1SafepointPollStub* stub() const { return _stub; }1451virtual LIR_OpReturn* as_OpReturn() { return this; }1452};14531454class ConversionStub;14551456class LIR_OpConvert: public LIR_Op1 {1457friend class LIR_OpVisitState;14581459private:1460Bytecodes::Code _bytecode;1461ConversionStub* _stub;14621463public:1464LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)1465: LIR_Op1(lir_convert, opr, result)1466, _bytecode(code)1467, _stub(stub) {}14681469Bytecodes::Code bytecode() const { return _bytecode; }1470ConversionStub* stub() const { return _stub; }14711472virtual void emit_code(LIR_Assembler* masm);1473virtual LIR_OpConvert* as_OpConvert() { return this; }1474virtual void print_instr(outputStream* out) const PRODUCT_RETURN;14751476static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;1477};147814791480// LIR_OpAllocObj1481class LIR_OpAllocObj : public LIR_Op1 {1482friend class LIR_OpVisitState;14831484private:1485LIR_Opr _tmp1;1486LIR_Opr _tmp2;1487LIR_Opr _tmp3;1488LIR_Opr _tmp4;1489int _hdr_size;1490int _obj_size;1491CodeStub* _stub;1492bool _init_check;14931494public:1495LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,1496LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,1497int hdr_size, int obj_size, bool init_check, CodeStub* stub)1498: LIR_Op1(lir_alloc_object, klass, result)1499, _tmp1(t1)1500, _tmp2(t2)1501, _tmp3(t3)1502, _tmp4(t4)1503, _hdr_size(hdr_size)1504, _obj_size(obj_size)1505, _stub(stub)1506, _init_check(init_check) { }15071508LIR_Opr klass() const { return in_opr(); }1509LIR_Opr obj() const { return result_opr(); }1510LIR_Opr tmp1() const { return _tmp1; }1511LIR_Opr tmp2() const { return _tmp2; }1512LIR_Opr tmp3() const { return _tmp3; }1513LIR_Opr tmp4() const { return _tmp4; }1514int header_size() const { return _hdr_size; }1515int object_size() const { return _obj_size; }1516bool init_check() const { return _init_check; }1517CodeStub* stub() const { return _stub; }15181519virtual void emit_code(LIR_Assembler* masm);1520virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }1521virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1522};152315241525// LIR_OpRoundFP1526class LIR_OpRoundFP : public LIR_Op1 {1527friend class LIR_OpVisitState;15281529private:1530LIR_Opr _tmp;15311532public:1533LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)1534: LIR_Op1(lir_roundfp, reg, result)1535, _tmp(stack_loc_temp) {}15361537LIR_Opr tmp() const { return _tmp; }1538virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }1539void print_instr(outputStream* out) const PRODUCT_RETURN;1540};15411542// LIR_OpTypeCheck1543class LIR_OpTypeCheck: public LIR_Op {1544friend class LIR_OpVisitState;15451546private:1547LIR_Opr _object;1548LIR_Opr _array;1549ciKlass* _klass;1550LIR_Opr _tmp1;1551LIR_Opr _tmp2;1552LIR_Opr _tmp3;1553bool _fast_check;1554CodeEmitInfo* _info_for_patch;1555CodeEmitInfo* _info_for_exception;1556CodeStub* _stub;1557ciMethod* _profiled_method;1558int _profiled_bci;1559bool _should_profile;15601561public:1562LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,1563LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,1564CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);1565LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,1566LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);15671568LIR_Opr object() const { return _object; }1569LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }1570LIR_Opr tmp1() const { return _tmp1; }1571LIR_Opr tmp2() const { return _tmp2; }1572LIR_Opr tmp3() const { return _tmp3; }1573ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }1574bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }1575CodeEmitInfo* info_for_patch() const { return _info_for_patch; }1576CodeEmitInfo* info_for_exception() const { return _info_for_exception; }1577CodeStub* stub() const { return _stub; }15781579// MethodData* profiling1580void set_profiled_method(ciMethod *method) { _profiled_method = method; }1581void set_profiled_bci(int bci) { _profiled_bci = bci; }1582void set_should_profile(bool b) { _should_profile = b; }1583ciMethod* profiled_method() const { return _profiled_method; }1584int profiled_bci() const { return _profiled_bci; }1585bool should_profile() const { return _should_profile; }15861587virtual bool is_patching() { return _info_for_patch != NULL; }1588virtual void emit_code(LIR_Assembler* masm);1589virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }1590void print_instr(outputStream* out) const PRODUCT_RETURN;1591};15921593// LIR_Op21594class LIR_Op2: public LIR_Op {1595friend class LIR_OpVisitState;15961597int _fpu_stack_size; // for sin/cos implementation on Intel15981599protected:1600LIR_Opr _opr1;1601LIR_Opr _opr2;1602BasicType _type;1603LIR_Opr _tmp1;1604LIR_Opr _tmp2;1605LIR_Opr _tmp3;1606LIR_Opr _tmp4;1607LIR_Opr _tmp5;1608LIR_Condition _condition;16091610void verify() const;16111612public:1613LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)1614: LIR_Op(code, LIR_OprFact::illegalOpr, info)1615, _fpu_stack_size(0)1616, _opr1(opr1)1617, _opr2(opr2)1618, _type(T_ILLEGAL)1619, _tmp1(LIR_OprFact::illegalOpr)1620, _tmp2(LIR_OprFact::illegalOpr)1621, _tmp3(LIR_OprFact::illegalOpr)1622, _tmp4(LIR_OprFact::illegalOpr)1623, _tmp5(LIR_OprFact::illegalOpr)1624, _condition(condition) {1625assert(code == lir_cmp || code == lir_assert, "code check");1626}16271628LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)1629: LIR_Op(code, result, NULL)1630, _fpu_stack_size(0)1631, _opr1(opr1)1632, _opr2(opr2)1633, _type(type)1634, _tmp1(LIR_OprFact::illegalOpr)1635, _tmp2(LIR_OprFact::illegalOpr)1636, _tmp3(LIR_OprFact::illegalOpr)1637, _tmp4(LIR_OprFact::illegalOpr)1638, _tmp5(LIR_OprFact::illegalOpr)1639, _condition(condition) {1640assert(code == lir_cmove, "code check");1641assert(type != T_ILLEGAL, "cmove should have type");1642}16431644LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,1645CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)1646: LIR_Op(code, result, info)1647, _fpu_stack_size(0)1648, _opr1(opr1)1649, _opr2(opr2)1650, _type(type)1651, _tmp1(LIR_OprFact::illegalOpr)1652, _tmp2(LIR_OprFact::illegalOpr)1653, _tmp3(LIR_OprFact::illegalOpr)1654, _tmp4(LIR_OprFact::illegalOpr)1655, _tmp5(LIR_OprFact::illegalOpr)1656, _condition(lir_cond_unknown) {1657assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");1658}16591660LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,1661LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)1662: LIR_Op(code, result, NULL)1663, _fpu_stack_size(0)1664, _opr1(opr1)1665, _opr2(opr2)1666, _type(T_ILLEGAL)1667, _tmp1(tmp1)1668, _tmp2(tmp2)1669, _tmp3(tmp3)1670, _tmp4(tmp4)1671, _tmp5(tmp5)1672, _condition(lir_cond_unknown) {1673assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");1674}16751676LIR_Opr in_opr1() const { return _opr1; }1677LIR_Opr in_opr2() const { return _opr2; }1678BasicType type() const { return _type; }1679LIR_Opr tmp1_opr() const { return _tmp1; }1680LIR_Opr tmp2_opr() const { return _tmp2; }1681LIR_Opr tmp3_opr() const { return _tmp3; }1682LIR_Opr tmp4_opr() const { return _tmp4; }1683LIR_Opr tmp5_opr() const { return _tmp5; }1684LIR_Condition condition() const {1685assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;1686}1687void set_condition(LIR_Condition condition) {1688assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;1689}16901691void set_fpu_stack_size(int size) { _fpu_stack_size = size; }1692int fpu_stack_size() const { return _fpu_stack_size; }16931694void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }1695void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }16961697virtual void emit_code(LIR_Assembler* masm);1698virtual LIR_Op2* as_Op2() { return this; }1699virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1700};17011702class LIR_OpAllocArray : public LIR_Op {1703friend class LIR_OpVisitState;17041705private:1706LIR_Opr _klass;1707LIR_Opr _len;1708LIR_Opr _tmp1;1709LIR_Opr _tmp2;1710LIR_Opr _tmp3;1711LIR_Opr _tmp4;1712BasicType _type;1713CodeStub* _stub;17141715public:1716LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)1717: LIR_Op(lir_alloc_array, result, NULL)1718, _klass(klass)1719, _len(len)1720, _tmp1(t1)1721, _tmp2(t2)1722, _tmp3(t3)1723, _tmp4(t4)1724, _type(type)1725, _stub(stub) {}17261727LIR_Opr klass() const { return _klass; }1728LIR_Opr len() const { return _len; }1729LIR_Opr obj() const { return result_opr(); }1730LIR_Opr tmp1() const { return _tmp1; }1731LIR_Opr tmp2() const { return _tmp2; }1732LIR_Opr tmp3() const { return _tmp3; }1733LIR_Opr tmp4() const { return _tmp4; }1734BasicType type() const { return _type; }1735CodeStub* stub() const { return _stub; }17361737virtual void emit_code(LIR_Assembler* masm);1738virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }1739virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1740};174117421743class LIR_Op3: public LIR_Op {1744friend class LIR_OpVisitState;17451746private:1747LIR_Opr _opr1;1748LIR_Opr _opr2;1749LIR_Opr _opr3;1750public:1751LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)1752: LIR_Op(code, result, info)1753, _opr1(opr1)1754, _opr2(opr2)1755, _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }1756LIR_Opr in_opr1() const { return _opr1; }1757LIR_Opr in_opr2() const { return _opr2; }1758LIR_Opr in_opr3() const { return _opr3; }17591760virtual void emit_code(LIR_Assembler* masm);1761virtual LIR_Op3* as_Op3() { return this; }1762virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1763};176417651766//--------------------------------1767class LabelObj: public CompilationResourceObj {1768private:1769Label _label;1770public:1771LabelObj() {}1772Label* label() { return &_label; }1773};177417751776class LIR_OpLock: public LIR_Op {1777friend class LIR_OpVisitState;17781779private:1780LIR_Opr _hdr;1781LIR_Opr _obj;1782LIR_Opr _lock;1783LIR_Opr _scratch;1784CodeStub* _stub;1785public:1786LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)1787: LIR_Op(code, LIR_OprFact::illegalOpr, info)1788, _hdr(hdr)1789, _obj(obj)1790, _lock(lock)1791, _scratch(scratch)1792, _stub(stub) {}17931794LIR_Opr hdr_opr() const { return _hdr; }1795LIR_Opr obj_opr() const { return _obj; }1796LIR_Opr lock_opr() const { return _lock; }1797LIR_Opr scratch_opr() const { return _scratch; }1798CodeStub* stub() const { return _stub; }17991800virtual void emit_code(LIR_Assembler* masm);1801virtual LIR_OpLock* as_OpLock() { return this; }1802void print_instr(outputStream* out) const PRODUCT_RETURN;1803};180418051806class LIR_OpDelay: public LIR_Op {1807friend class LIR_OpVisitState;18081809private:1810LIR_Op* _op;18111812public:1813LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):1814LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),1815_op(op) {1816assert(op->code() == lir_nop, "should be filling with nops");1817}1818virtual void emit_code(LIR_Assembler* masm);1819virtual LIR_OpDelay* as_OpDelay() { return this; }1820void print_instr(outputStream* out) const PRODUCT_RETURN;1821LIR_Op* delay_op() const { return _op; }1822CodeEmitInfo* call_info() const { return info(); }1823};18241825#ifdef ASSERT1826// LIR_OpAssert1827class LIR_OpAssert : public LIR_Op2 {1828friend class LIR_OpVisitState;18291830private:1831const char* _msg;1832bool _halt;18331834public:1835LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)1836: LIR_Op2(lir_assert, condition, opr1, opr2)1837, _msg(msg)1838, _halt(halt) {1839}18401841const char* msg() const { return _msg; }1842bool halt() const { return _halt; }18431844virtual void emit_code(LIR_Assembler* masm);1845virtual LIR_OpAssert* as_OpAssert() { return this; }1846virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1847};1848#endif18491850// LIR_OpCompareAndSwap1851class LIR_OpCompareAndSwap : public LIR_Op {1852friend class LIR_OpVisitState;18531854private:1855LIR_Opr _addr;1856LIR_Opr _cmp_value;1857LIR_Opr _new_value;1858LIR_Opr _tmp1;1859LIR_Opr _tmp2;18601861public:1862LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,1863LIR_Opr t1, LIR_Opr t2, LIR_Opr result)1864: LIR_Op(code, result, NULL) // no result, no info1865, _addr(addr)1866, _cmp_value(cmp_value)1867, _new_value(new_value)1868, _tmp1(t1)1869, _tmp2(t2) { }18701871LIR_Opr addr() const { return _addr; }1872LIR_Opr cmp_value() const { return _cmp_value; }1873LIR_Opr new_value() const { return _new_value; }1874LIR_Opr tmp1() const { return _tmp1; }1875LIR_Opr tmp2() const { return _tmp2; }18761877virtual void emit_code(LIR_Assembler* masm);1878virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }1879virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1880};18811882// LIR_OpProfileCall1883class LIR_OpProfileCall : public LIR_Op {1884friend class LIR_OpVisitState;18851886private:1887ciMethod* _profiled_method;1888int _profiled_bci;1889ciMethod* _profiled_callee;1890LIR_Opr _mdo;1891LIR_Opr _recv;1892LIR_Opr _tmp1;1893ciKlass* _known_holder;18941895public:1896// Destroys recv1897LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)1898: LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info1899, _profiled_method(profiled_method)1900, _profiled_bci(profiled_bci)1901, _profiled_callee(profiled_callee)1902, _mdo(mdo)1903, _recv(recv)1904, _tmp1(t1)1905, _known_holder(known_holder) { }19061907ciMethod* profiled_method() const { return _profiled_method; }1908int profiled_bci() const { return _profiled_bci; }1909ciMethod* profiled_callee() const { return _profiled_callee; }1910LIR_Opr mdo() const { return _mdo; }1911LIR_Opr recv() const { return _recv; }1912LIR_Opr tmp1() const { return _tmp1; }1913ciKlass* known_holder() const { return _known_holder; }19141915virtual void emit_code(LIR_Assembler* masm);1916virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }1917virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1918bool should_profile_receiver_type() const {1919bool callee_is_static = _profiled_callee->is_loaded() && _profiled_callee->is_static();1920Bytecodes::Code bc = _profiled_method->java_code_at_bci(_profiled_bci);1921bool call_is_virtual = (bc == Bytecodes::_invokevirtual && !_profiled_callee->can_be_statically_bound()) || bc == Bytecodes::_invokeinterface;1922return C1ProfileVirtualCalls && call_is_virtual && !callee_is_static;1923}1924};19251926// LIR_OpProfileType1927class LIR_OpProfileType : public LIR_Op {1928friend class LIR_OpVisitState;19291930private:1931LIR_Opr _mdp;1932LIR_Opr _obj;1933LIR_Opr _tmp;1934ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)1935intptr_t _current_klass; // what the profiling currently reports1936bool _not_null; // true if we know statically that _obj cannot be null1937bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know1938// _exact_klass it the only possible type for this parameter in any context.19391940public:1941// Destroys recv1942LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)1943: LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info1944, _mdp(mdp)1945, _obj(obj)1946, _tmp(tmp)1947, _exact_klass(exact_klass)1948, _current_klass(current_klass)1949, _not_null(not_null)1950, _no_conflict(no_conflict) { }19511952LIR_Opr mdp() const { return _mdp; }1953LIR_Opr obj() const { return _obj; }1954LIR_Opr tmp() const { return _tmp; }1955ciKlass* exact_klass() const { return _exact_klass; }1956intptr_t current_klass() const { return _current_klass; }1957bool not_null() const { return _not_null; }1958bool no_conflict() const { return _no_conflict; }19591960virtual void emit_code(LIR_Assembler* masm);1961virtual LIR_OpProfileType* as_OpProfileType() { return this; }1962virtual void print_instr(outputStream* out) const PRODUCT_RETURN;1963};19641965class LIR_InsertionBuffer;19661967//--------------------------------LIR_List---------------------------------------------------1968// Maintains a list of LIR instructions (one instance of LIR_List per basic block)1969// The LIR instructions are appended by the LIR_List class itself;1970//1971// Notes:1972// - all offsets are(should be) in bytes1973// - local positions are specified with an offset, with offset 0 being local 019741975class LIR_List: public CompilationResourceObj {1976private:1977LIR_OpList _operations;19781979Compilation* _compilation;1980#ifndef PRODUCT1981BlockBegin* _block;1982#endif1983#ifdef ASSERT1984const char * _file;1985int _line;1986#endif19871988public:1989void append(LIR_Op* op) {1990if (op->source() == NULL)1991op->set_source(_compilation->current_instruction());1992#ifndef PRODUCT1993if (PrintIRWithLIR) {1994_compilation->maybe_print_current_instruction();1995op->print(); tty->cr();1996}1997#endif // PRODUCT19981999_operations.append(op);20002001#ifdef ASSERT2002op->verify();2003op->set_file_and_line(_file, _line);2004_file = NULL;2005_line = 0;2006#endif2007}20082009LIR_List(Compilation* compilation, BlockBegin* block = NULL);20102011#ifdef ASSERT2012void set_file_and_line(const char * file, int line);2013#endif20142015//---------- accessors ---------------2016LIR_OpList* instructions_list() { return &_operations; }2017int length() const { return _operations.length(); }2018LIR_Op* at(int i) const { return _operations.at(i); }20192020NOT_PRODUCT(BlockBegin* block() const { return _block; });20212022// insert LIR_Ops in buffer to right places in LIR_List2023void append(LIR_InsertionBuffer* buffer);20242025//---------- mutators ---------------2026void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }2027void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }2028void remove_at(int i) { _operations.remove_at(i); }20292030//---------- printing -------------2031void print_instructions() PRODUCT_RETURN;203220332034//---------- instructions -------------2035void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,2036address dest, LIR_OprList* arguments,2037CodeEmitInfo* info) {2038append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));2039}2040void call_static(ciMethod* method, LIR_Opr result,2041address dest, LIR_OprList* arguments, CodeEmitInfo* info) {2042append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));2043}2044void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,2045address dest, LIR_OprList* arguments, CodeEmitInfo* info) {2046append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));2047}2048void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,2049address dest, LIR_OprList* arguments, CodeEmitInfo* info) {2050append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));2051}20522053void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }2054void membar() { append(new LIR_Op0(lir_membar)); }2055void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }2056void membar_release() { append(new LIR_Op0(lir_membar_release)); }2057void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }2058void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }2059void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }2060void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }20612062void nop() { append(new LIR_Op0(lir_nop)); }20632064void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }2065void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }20662067void on_spin_wait() { append(new LIR_Op0(lir_on_spin_wait)); }20682069void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }20702071void leal(LIR_Opr from, LIR_Opr result_reg, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_leal, from, result_reg, T_ILLEGAL, patch_code, info)); }20722073// result is a stack location for old backend and vreg for UseLinearScan2074// stack_loc_temp is an illegal register for old backend2075void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }2076void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }2077void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }2078void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }2079void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }2080void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }2081void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }2082void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {2083if (UseCompressedOops) {2084append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));2085} else {2086move(src, dst, info);2087}2088}2089void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {2090if (UseCompressedOops) {2091append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));2092} else {2093move(src, dst, info);2094}2095}2096void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }20972098void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }2099void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);21002101void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }2102void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);21032104void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }2105void return_op(LIR_Opr result) { append(new LIR_OpReturn(result)); }21062107void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }21082109void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }2110void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }2111void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }21122113void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);2114void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {2115append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));2116}2117void unwind_exception(LIR_Opr exceptionOop) {2118append(new LIR_Op1(lir_unwind, exceptionOop));2119}21202121void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }2122void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }21232124void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {2125append(new LIR_Op2(lir_cmp, condition, left, right, info));2126}2127void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {2128cmp(condition, left, LIR_OprFact::intConst(right), info);2129}21302131void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);2132void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);21332134void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {2135append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));2136}21372138void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,2139LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);2140void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,2141LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);2142void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,2143LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);21442145void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }2146void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr) { append(new LIR_Op2(lir_neg, from, tmp, to)); }2147void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }2148void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); }2149void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); }2150void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }2151void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }21522153void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }2154void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }2155void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }2156void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul, left, right, res, tmp)); }2157void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }2158void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div, left, right, res, tmp)); }2159void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }21602161void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);2162void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);21632164void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);21652166void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);2167void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);2168void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);2169void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);2170void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);21712172void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);2173void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);2174void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);2175void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);21762177void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);2178void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);21792180// jump is an unconditional branch2181void jump(BlockBegin* block) {2182append(new LIR_OpBranch(lir_cond_always, block));2183}2184void jump(CodeStub* stub) {2185append(new LIR_OpBranch(lir_cond_always, stub));2186}2187void branch(LIR_Condition cond, Label* lbl) {2188append(new LIR_OpBranch(cond, lbl));2189}2190// Should not be used for fp comparisons2191void branch(LIR_Condition cond, BlockBegin* block) {2192append(new LIR_OpBranch(cond, block));2193}2194// Should not be used for fp comparisons2195void branch(LIR_Condition cond, CodeStub* stub) {2196append(new LIR_OpBranch(cond, stub));2197}2198// Should only be used for fp comparisons2199void branch(LIR_Condition cond, BlockBegin* block, BlockBegin* unordered) {2200append(new LIR_OpBranch(cond, block, unordered));2201}22022203void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);2204void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);2205void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);22062207void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }2208void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }2209void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }22102211void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }2212void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);22132214void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {2215append(new LIR_OpRTCall(routine, tmp, result, arguments));2216}22172218void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,2219LIR_OprList* arguments, CodeEmitInfo* info) {2220append(new LIR_OpRTCall(routine, tmp, result, arguments, info));2221}22222223void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }2224void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);2225void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);22262227void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }22282229void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }22302231void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); }22322233void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);2234void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);22352236void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,2237LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,2238CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,2239ciMethod* profiled_method, int profiled_bci);2240// MethodData* profiling2241void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {2242append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));2243}2244void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {2245append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));2246}22472248void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }2249void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }2250#ifdef ASSERT2251void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }2252#endif2253};22542255void print_LIR(BlockList* blocks);22562257class LIR_InsertionBuffer : public CompilationResourceObj {2258private:2259LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)22602261// list of insertion points. index and count are stored alternately:2262// _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted2263// _index_and_count[i * 2 + 1]: the number of ops to be inserted at index2264intStack _index_and_count;22652266// the LIR_Ops to be inserted2267LIR_OpList _ops;22682269void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }2270void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }2271void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }22722273#ifdef ASSERT2274void verify();2275#endif2276public:2277LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }22782279// must be called before using the insertion buffer2280void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }2281bool initialized() const { return _lir != NULL; }2282// called automatically when the buffer is appended to the LIR_List2283void finish() { _lir = NULL; }22842285// accessors2286LIR_List* lir_list() const { return _lir; }2287int number_of_insertion_points() const { return _index_and_count.length() >> 1; }2288int index_at(int i) const { return _index_and_count.at((i << 1)); }2289int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }22902291int number_of_ops() const { return _ops.length(); }2292LIR_Op* op_at(int i) const { return _ops.at(i); }22932294// append an instruction to the buffer2295void append(int index, LIR_Op* op);22962297// instruction2298void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }2299};230023012302//2303// LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.2304// Calling a LIR_Op's visit function with a LIR_OpVisitState causes2305// information about the input, output and temporaries used by the2306// op to be recorded. It also records whether the op has call semantics2307// and also records all the CodeEmitInfos used by this op.2308//230923102311class LIR_OpVisitState: public StackObj {2312public:2313typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;23142315enum {2316maxNumberOfOperands = 20,2317maxNumberOfInfos = 42318};23192320private:2321LIR_Op* _op;23222323// optimization: the operands and infos are not stored in a variable-length2324// list, but in a fixed-size array to save time of size checks and resizing2325int _oprs_len[numModes];2326LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];2327int _info_len;2328CodeEmitInfo* _info_new[maxNumberOfInfos];23292330bool _has_call;2331bool _has_slow_case;233223332334// only include register operands2335// addresses are decomposed to the base and index registers2336// constants and stack operands are ignored2337void append(LIR_Opr& opr, OprMode mode) {2338assert(opr->is_valid(), "should not call this otherwise");2339assert(mode >= 0 && mode < numModes, "bad mode");23402341if (opr->is_register()) {2342assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");2343_oprs_new[mode][_oprs_len[mode]++] = &opr;23442345} else if (opr->is_pointer()) {2346LIR_Address* address = opr->as_address_ptr();2347if (address != NULL) {2348// special handling for addresses: add base and index register of the address2349// both are always input operands or temp if we want to extend2350// their liveness!2351if (mode == outputMode) {2352mode = inputMode;2353}2354assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");2355if (address->_base->is_valid()) {2356assert(address->_base->is_register(), "must be");2357assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");2358_oprs_new[mode][_oprs_len[mode]++] = &address->_base;2359}2360if (address->_index->is_valid()) {2361assert(address->_index->is_register(), "must be");2362assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");2363_oprs_new[mode][_oprs_len[mode]++] = &address->_index;2364}23652366} else {2367assert(opr->is_constant(), "constant operands are not processed");2368}2369} else {2370assert(opr->is_stack(), "stack operands are not processed");2371}2372}23732374void append(CodeEmitInfo* info) {2375assert(info != NULL, "should not call this otherwise");2376assert(_info_len < maxNumberOfInfos, "array overflow");2377_info_new[_info_len++] = info;2378}23792380public:2381LIR_OpVisitState() { reset(); }23822383LIR_Op* op() const { return _op; }2384void set_op(LIR_Op* op) { reset(); _op = op; }23852386bool has_call() const { return _has_call; }2387bool has_slow_case() const { return _has_slow_case; }23882389void reset() {2390_op = NULL;2391_has_call = false;2392_has_slow_case = false;23932394_oprs_len[inputMode] = 0;2395_oprs_len[tempMode] = 0;2396_oprs_len[outputMode] = 0;2397_info_len = 0;2398}239924002401int opr_count(OprMode mode) const {2402assert(mode >= 0 && mode < numModes, "bad mode");2403return _oprs_len[mode];2404}24052406LIR_Opr opr_at(OprMode mode, int index) const {2407assert(mode >= 0 && mode < numModes, "bad mode");2408assert(index >= 0 && index < _oprs_len[mode], "index out of bound");2409return *_oprs_new[mode][index];2410}24112412void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {2413assert(mode >= 0 && mode < numModes, "bad mode");2414assert(index >= 0 && index < _oprs_len[mode], "index out of bound");2415*_oprs_new[mode][index] = opr;2416}24172418int info_count() const {2419return _info_len;2420}24212422CodeEmitInfo* info_at(int index) const {2423assert(index < _info_len, "index out of bounds");2424return _info_new[index];2425}24262427XHandlers* all_xhandler();24282429// collects all register operands of the instruction2430void visit(LIR_Op* op);24312432#ifdef ASSERT2433// check that an operation has no operands2434bool no_operands(LIR_Op* op);2435#endif24362437// LIR_Op visitor functions use these to fill in the state2438void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }2439void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }2440void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }2441void do_info(CodeEmitInfo* info) { append(info); }24422443void do_stub(CodeStub* stub);2444void do_call() { _has_call = true; }2445void do_slow_case() { _has_slow_case = true; }2446void do_slow_case(CodeEmitInfo* info) {2447_has_slow_case = true;2448append(info);2449}2450};245124522453inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };24542455#endif // SHARE_C1_C1_LIR_HPP245624572458