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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/openj9
Path: blob/master/runtime/compiler/x/codegen/J9X86Instruction.cpp
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/*******************************************************************************
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* Copyright (c) 2000, 2021 IBM Corp. and others
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*
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* This program and the accompanying materials are made available under
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* the terms of the Eclipse Public License 2.0 which accompanies this
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* distribution and is available at https://www.eclipse.org/legal/epl-2.0/
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* or the Apache License, Version 2.0 which accompanies this distribution and
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* is available at https://www.apache.org/licenses/LICENSE-2.0.
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*
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* This Source Code may also be made available under the following
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* Secondary Licenses when the conditions for such availability set
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* forth in the Eclipse Public License, v. 2.0 are satisfied: GNU
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* General Public License, version 2 with the GNU Classpath
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* Exception [1] and GNU General Public License, version 2 with the
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* OpenJDK Assembly Exception [2].
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*
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* [1] https://www.gnu.org/software/classpath/license.html
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* [2] http://openjdk.java.net/legal/assembly-exception.html
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*
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* SPDX-License-Identifier: EPL-2.0 OR Apache-2.0 OR GPL-2.0 WITH Classpath-exception-2.0 OR LicenseRef-GPL-2.0 WITH Assembly-exception
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*******************************************************************************/
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#include <algorithm>
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#include "codegen/J9X86Instruction.hpp"
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#include "env/OMRMemory.hpp"
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#include "il/Node.hpp"
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#include "il/Node_inlines.hpp"
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#include "codegen/MemoryReference.hpp"
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#include "codegen/UnresolvedDataSnippet.hpp"
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#include "codegen/RegisterConstants.hpp"
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#include "codegen/CodeGenerator.hpp"
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#include "codegen/X86Instruction.hpp"
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#include "codegen/Snippet.hpp"
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#include "x/codegen/X86Instruction.hpp"
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#include "codegen/InstOpCode.hpp"
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////////////////////////////////////////////////////////////////////////////////
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// TR::X86MemImmSnippetInstruction:: member functions
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////////////////////////////////////////////////////////////////////////////////
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TR::X86MemImmSnippetInstruction::X86MemImmSnippetInstruction(TR::InstOpCode::Mnemonic op,
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TR::Node *node,
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TR::MemoryReference *mr,
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int32_t imm,
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TR::UnresolvedDataSnippet *us,
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TR::CodeGenerator *cg)
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: TR::X86MemImmInstruction(imm, mr, node, op, cg), _unresolvedSnippet(us)
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{
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}
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TR::X86MemImmSnippetInstruction::X86MemImmSnippetInstruction(TR::Instruction *precedingInstruction,
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TR::InstOpCode::Mnemonic op,
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TR::MemoryReference *mr,
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int32_t imm,
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TR::UnresolvedDataSnippet *us,
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TR::CodeGenerator *cg)
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: TR::X86MemImmInstruction(imm, mr, op, precedingInstruction, cg), _unresolvedSnippet(us)
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{
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}
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TR::Snippet *TR::X86MemImmSnippetInstruction::getSnippetForGC()
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{
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if (getUnresolvedSnippet() != NULL)
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{
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return getUnresolvedSnippet();
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}
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return getMemoryReference()->getUnresolvedDataSnippet();
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}
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void TR::X86MemImmSnippetInstruction::assignRegisters(TR_RegisterKinds kindsToBeAssigned)
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{
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TR::X86MemImmInstruction::assignRegisters(kindsToBeAssigned);
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if (kindsToBeAssigned & (TR_X87_Mask | TR_FPR_Mask))
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{
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TR::UnresolvedDataSnippet *snippet = getMemoryReference()->getUnresolvedDataSnippet();
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if (snippet)
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{
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if (kindsToBeAssigned & TR_X87_Mask)
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snippet->setNumLiveX87Registers(cg()->machine()->fpGetNumberOfLiveFPRs());
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if (kindsToBeAssigned & TR_FPR_Mask)
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snippet->setHasLiveXMMRegisters((cg()->machine()->fpGetNumberOfLiveXMMRs() > 0) ? true : false);
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}
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}
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}
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uint8_t *TR::X86MemImmSnippetInstruction::generateBinaryEncoding()
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{
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uint8_t *instructionStart = cg()->getBinaryBufferCursor();
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uint8_t *cursor = instructionStart;
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setBinaryEncoding(instructionStart);
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cursor = getOpCode().binary(cursor, rexBits());
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cursor = getMemoryReference()->generateBinaryEncoding(cursor - 1, this, cg());
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if (cursor)
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{
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if (getOpCode().hasIntImmediate())
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{
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if (std::find(cg()->comp()->getStaticHCRPICSites()->begin(), cg()->comp()->getStaticHCRPICSites()->end(), this) != cg()->comp()->getStaticHCRPICSites()->end())
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{
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cg()->jitAdd32BitPicToPatchOnClassRedefinition(((void *)(uintptr_t)getSourceImmediateAsAddress()), (void *) cursor);
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}
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*(int32_t *)cursor = (int32_t)getSourceImmediate();
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if (getUnresolvedSnippet() != NULL)
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{
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getUnresolvedSnippet()->setAddressOfDataReference(cursor);
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}
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cursor += 4;
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}
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else if (getOpCode().hasByteImmediate() || getOpCode().hasSignExtendImmediate())
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{
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*(int8_t *)cursor = (int8_t)getSourceImmediate();
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cursor += 1;
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}
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else
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{
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*(int16_t *)cursor = (int16_t)getSourceImmediate();
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cursor += 2;
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}
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setBinaryLength(cursor - getBinaryEncoding());
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cg()->addAccumulatedInstructionLengthError(getEstimatedBinaryLength() - getBinaryLength());
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return cursor;
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}
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else
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{
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// Memref changed during binary encoding; re-generate current instruction.
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return generateBinaryEncoding();
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}
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}
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TR::X86CheckAsyncMessagesMemImmInstruction::X86CheckAsyncMessagesMemImmInstruction(
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TR::Node *node,
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TR::InstOpCode::Mnemonic op,
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TR::MemoryReference *mr,
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int32_t value,
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TR::CodeGenerator *cg) :
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TR::X86MemImmInstruction(value, mr, node, op, cg)
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{
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}
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TR::X86CheckAsyncMessagesMemRegInstruction::X86CheckAsyncMessagesMemRegInstruction(
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TR::Node *node,
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TR::InstOpCode::Mnemonic op,
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TR::MemoryReference *mr,
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TR::Register *valueReg,
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TR::CodeGenerator *cg) :
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TR::X86MemRegInstruction(valueReg, mr, node, op, cg)
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{
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}
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TR::X86StackOverflowCheckInstruction::X86StackOverflowCheckInstruction(
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TR::Instruction *precedingInstruction,
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TR::InstOpCode::Mnemonic op,
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TR::Register *cmpRegister,
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TR::MemoryReference *mr,
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TR::CodeGenerator *cg) :
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TR::X86RegMemInstruction(mr, cmpRegister, op, precedingInstruction, cg)
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{
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}
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uint8_t *TR::X86StackOverflowCheckInstruction::generateBinaryEncoding()
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{
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uint8_t *cursor = TR::X86RegMemInstruction::generateBinaryEncoding();
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return cursor;
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};
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TR::X86StackOverflowCheckInstruction *generateStackOverflowCheckInstruction(
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TR::Instruction *precedingInstruction,
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TR::InstOpCode::Mnemonic op,
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TR::Register *cmpRegister,
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TR::MemoryReference *mr,
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TR::CodeGenerator *cg)
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{
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return new (cg->trHeapMemory()) TR::X86StackOverflowCheckInstruction(precedingInstruction, op, cmpRegister, mr, cg);
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}
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TR::X86CheckAsyncMessagesMemImmInstruction *generateCheckAsyncMessagesInstruction(
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TR::Node *node,
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TR::InstOpCode::Mnemonic op,
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TR::MemoryReference *mr,
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int32_t value,
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TR::CodeGenerator *cg)
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{
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return new (cg->trHeapMemory()) TR::X86CheckAsyncMessagesMemImmInstruction(node, op, mr, value, cg);
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}
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TR::X86CheckAsyncMessagesMemRegInstruction *generateCheckAsyncMessagesInstruction(
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TR::Node *node,
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TR::InstOpCode::Mnemonic op,
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TR::MemoryReference *mr,
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TR::Register *reg,
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TR::CodeGenerator *cg)
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{
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return new (cg->trHeapMemory()) TR::X86CheckAsyncMessagesMemRegInstruction(node, op, mr, reg, cg);
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}
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uint8_t *TR::X86CheckAsyncMessagesMemImmInstruction::generateBinaryEncoding()
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{
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uint8_t *cursor = TR::X86MemImmInstruction::generateBinaryEncoding();
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return cursor;
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};
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uint8_t *TR::X86CheckAsyncMessagesMemRegInstruction::generateBinaryEncoding()
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{
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uint8_t *cursor = TR::X86MemRegInstruction::generateBinaryEncoding();
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return cursor;
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};
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TR::X86MemImmSnippetInstruction *
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generateMemImmSnippetInstruction(TR::InstOpCode::Mnemonic op, TR::Node * node, TR::MemoryReference * mr, int32_t imm, TR::UnresolvedDataSnippet * snippet, TR::CodeGenerator *cg)
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{
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return new (cg->trHeapMemory()) TR::X86MemImmSnippetInstruction(op, node, mr, imm, snippet, cg);
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}
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