Path: blob/aarch64-shenandoah-jdk8u272-b10/hotspot/src/cpu/sparc/vm/frame_sparc.hpp
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/*1* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.2* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.3*4* This code is free software; you can redistribute it and/or modify it5* under the terms of the GNU General Public License version 2 only, as6* published by the Free Software Foundation.7*8* This code is distributed in the hope that it will be useful, but WITHOUT9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License11* version 2 for more details (a copy is included in the LICENSE file that12* accompanied this code).13*14* You should have received a copy of the GNU General Public License version15* 2 along with this work; if not, write to the Free Software Foundation,16* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.17*18* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA19* or visit www.oracle.com if you need additional information or have any20* questions.21*22*/2324#ifndef CPU_SPARC_VM_FRAME_SPARC_HPP25#define CPU_SPARC_VM_FRAME_SPARC_HPP2627#include "runtime/synchronizer.hpp"28#include "utilities/top.hpp"2930// A frame represents a physical stack frame (an activation). Frames can be31// C or Java frames, and the Java frames can be interpreted or compiled.32// In contrast, vframes represent source-level activations, so that one physical frame33// can correspond to multiple source level frames because of inlining.34// A frame is comprised of {pc, sp, younger_sp}353637// Layout of asm interpreter frame:38//39// 0xfffffff40// ......41// [last extra incoming arg, (local # Nargs > 6 ? Nargs-1 : undef)]42// .. Note: incoming args are copied to local frame area upon entry43// [first extra incoming arg, (local # Nargs > 6 ? 6 : undef)]44// [6 words for C-arg storage (unused)] Are this and next one really needed?45// [C-aggregate-word (unused)] Yes, if want extra params to be in same place as C convention46// [16 words for register saving] <--- FP47// [interpreter_frame_vm_locals ] (see below)4849// Note: Llocals is always double-word aligned50// [first local i.e. local # 0] <-- Llocals51// ...52// [last local, i.e. local # Nlocals-1]5354// [monitors ]55// ....56// [monitors ] <-- Lmonitors (same as Llocals + 6*4 if none)57// (must be double-word aligned because58// monitor element size is constrained to59// doubleword)60//61// <-- Lesp (points 1 past TOS)62// [bottom word used for stack ]63// ...64// [top word used for stack] (first word of stack is double-word aligned)6566// [space for outgoing args (conservatively allocated as max_stack - 6 + interpreter_frame_extra_outgoing_argument_words)]67// [6 words for C-arg storage]68// [C-aggregate-word (unused)]69// [16 words for register saving] <--- SP70// ...71// 0x000000072//73// The in registers and local registers are preserved in a block at SP.74//75// The first six in registers (I0..I5) hold the first six locals.76// The locals are used as follows:77// Lesp first free element of expression stack78// (which grows towards __higher__ addresses)79// Lbcp is set to address of bytecode to execute80// It is accessed in the frame under the name "bcx".81// It may at times (during GC) be an index instead.82// Lmethod the method being interpreted83// Llocals the base pointer for accessing the locals array84// (lower-numbered locals have lower addresses)85// Lmonitors the base pointer for accessing active monitors86// Lcache a saved pointer to the method's constant pool cache87//88//89// When calling out to another method,90// G5_method is set to method to call, G5_inline_cache_klass may be set,91// parameters are put in O registers, and also extra parameters92// must be cleverly copied from the top of stack to the outgoing param area in the frame,93// ------------------------------ C++ interpreter ----------------------------------------94// Layout of C++ interpreter frame:95//96979899// All frames:100101public:102103enum {104// normal return address is 2 words past PC105pc_return_offset = 2 * BytesPerInstWord,106107// size of each block, in order of increasing address:108register_save_words = 16,109#ifdef _LP64110callee_aggregate_return_pointer_words = 0,111#else112callee_aggregate_return_pointer_words = 1,113#endif114callee_register_argument_save_area_words = 6,115// memory_parameter_words = <arbitrary>,116117// offset of each block, in order of increasing address:118// (note: callee_register_argument_save_area_words == Assembler::n_register_parameters)119register_save_words_sp_offset = 0,120callee_aggregate_return_pointer_sp_offset = register_save_words_sp_offset + register_save_words,121callee_register_argument_save_area_sp_offset = callee_aggregate_return_pointer_sp_offset + callee_aggregate_return_pointer_words,122memory_parameter_word_sp_offset = callee_register_argument_save_area_sp_offset + callee_register_argument_save_area_words,123varargs_offset = memory_parameter_word_sp_offset124};125126private:127intptr_t* _younger_sp; // optional SP of callee (used to locate O7)128int _sp_adjustment_by_callee; // adjustment in words to SP by callee for making locals contiguous129130// Note: On SPARC, unlike Intel, the saved PC for a stack frame131// is stored at a __variable__ distance from that frame's SP.132// (In fact, it may be in the register save area of the callee frame,133// but that fact need not bother us.) Thus, we must store the134// address of that saved PC explicitly. On the other hand, SPARC135// stores the FP for a frame at a fixed offset from the frame's SP,136// so there is no need for a separate "frame::_fp" field.137138public:139// Accessors140141intptr_t* younger_sp() const {142assert(_younger_sp != NULL, "frame must possess a younger_sp");143return _younger_sp;144}145146int callee_sp_adjustment() const { return _sp_adjustment_by_callee; }147void set_sp_adjustment_by_callee(int number_of_words) { _sp_adjustment_by_callee = number_of_words; }148149// Constructors150151// This constructor relies on the fact that the creator of a frame152// has flushed register windows which the frame will refer to, and153// that those register windows will not be reloaded until the frame is154// done reading and writing the stack. Moreover, if the "younger_sp"155// argument points into the register save area of the next younger156// frame (though it need not), the register window for that next157// younger frame must also stay flushed. (The caller is responsible158// for ensuring this.)159160frame(intptr_t* sp, intptr_t* younger_sp, bool younger_frame_adjusted_stack = false);161162// make a deficient frame which doesn't know where its PC is:163enum unpatchable_t { unpatchable };164frame(intptr_t* sp, unpatchable_t, address pc = NULL, CodeBlob* cb = NULL);165166void init(intptr_t* sp, address pc, CodeBlob* cb);167168// Walk from sp outward looking for old_sp, and return old_sp's predecessor169// (i.e. return the sp from the frame where old_sp is the fp).170// Register windows are assumed to be flushed for the stack in question.171172static intptr_t* next_younger_sp_or_null(intptr_t* old_sp, intptr_t* sp);173174// Return true if sp is a younger sp in the stack described by valid_sp.175static bool is_valid_stack_pointer(intptr_t* valid_sp, intptr_t* sp);176177public:178// accessors for the instance variables179intptr_t* fp() const { return (intptr_t*) ((intptr_t)(sp()[FP->sp_offset_in_saved_window()]) + STACK_BIAS ); }180181// All frames182183intptr_t* fp_addr_at(int index) const { return &fp()[index]; }184intptr_t* sp_addr_at(int index) const { return &sp()[index]; }185intptr_t fp_at( int index) const { return *fp_addr_at(index); }186intptr_t sp_at( int index) const { return *sp_addr_at(index); }187188private:189inline address* I7_addr() const;190inline address* O7_addr() const;191192inline address* I0_addr() const;193inline address* O0_addr() const;194intptr_t* younger_sp_addr_at(int index) const { return &younger_sp()[index]; }195196public:197// access to SPARC arguments and argument registers198199// Assumes reg is an in/local register200intptr_t* register_addr(Register reg) const {201return sp_addr_at(reg->sp_offset_in_saved_window());202}203204// Assumes reg is an out register205intptr_t* out_register_addr(Register reg) const {206return younger_sp_addr_at(reg->after_save()->sp_offset_in_saved_window());207}208209210// Interpreter frames211212public:213// Asm interpreter214#ifndef CC_INTERP215enum interpreter_frame_vm_locals {216// 2 words, also used to save float regs across calls to C217interpreter_frame_d_scratch_fp_offset = -2,218interpreter_frame_l_scratch_fp_offset = -4,219interpreter_frame_padding_offset = -5, // for native calls only220interpreter_frame_oop_temp_offset = -6, // for native calls only221interpreter_frame_vm_locals_fp_offset = -6, // should be same as above, and should be zero mod 8222223interpreter_frame_vm_local_words = -interpreter_frame_vm_locals_fp_offset,224225226// interpreter frame set-up needs to save 2 extra words in outgoing param area227// for class and jnienv arguments for native stubs (see nativeStubGen_sparc.cpp_228229interpreter_frame_extra_outgoing_argument_words = 2230};231#else232enum interpreter_frame_vm_locals {233// 2 words, also used to save float regs across calls to C234interpreter_state_ptr_offset = 0, // Is in L0 (Lstate) in save area235interpreter_frame_mirror_offset = 1, // Is in L1 (Lmirror) in save area (for native calls only)236237// interpreter frame set-up needs to save 2 extra words in outgoing param area238// for class and jnienv arguments for native stubs (see nativeStubGen_sparc.cpp_239240interpreter_frame_extra_outgoing_argument_words = 2241};242#endif /* CC_INTERP */243244enum compiler_frame_fixed_locals {245compiler_frame_vm_locals_fp_offset = -2246};247248private:249ConstantPoolCache** interpreter_frame_cpoolcache_addr() const;250251#ifndef CC_INTERP252253// where Lmonitors is saved:254inline BasicObjectLock** interpreter_frame_monitors_addr() const;255inline intptr_t** interpreter_frame_esp_addr() const;256257inline void interpreter_frame_set_tos_address(intptr_t* x);258259// monitors:260261// next two fns read and write Lmonitors value,262private:263BasicObjectLock* interpreter_frame_monitors() const;264void interpreter_frame_set_monitors(BasicObjectLock* monitors);265#else266public:267inline interpreterState get_interpreterState() const {268return ((interpreterState)sp_at(interpreter_state_ptr_offset));269}270271#endif /* CC_INTERP */272273public:274275#endif // CPU_SPARC_VM_FRAME_SPARC_HPP276277278