Path: blob/aarch64-shenandoah-jdk8u272-b10/hotspot/src/cpu/sparc/vm/icBuffer_sparc.cpp
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/*1* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.2* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.3*4* This code is free software; you can redistribute it and/or modify it5* under the terms of the GNU General Public License version 2 only, as6* published by the Free Software Foundation.7*8* This code is distributed in the hope that it will be useful, but WITHOUT9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License11* version 2 for more details (a copy is included in the LICENSE file that12* accompanied this code).13*14* You should have received a copy of the GNU General Public License version15* 2 along with this work; if not, write to the Free Software Foundation,16* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.17*18* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA19* or visit www.oracle.com if you need additional information or have any20* questions.21*22*/2324#include "precompiled.hpp"25#include "asm/macroAssembler.inline.hpp"26#include "code/icBuffer.hpp"27#include "gc_interface/collectedHeap.inline.hpp"28#include "interpreter/bytecodes.hpp"29#include "memory/resourceArea.hpp"30#include "nativeInst_sparc.hpp"31#include "oops/oop.inline.hpp"32#include "oops/oop.inline2.hpp"3334int InlineCacheBuffer::ic_stub_code_size() {35#ifdef _LP6436if (TraceJumps) return 600 * wordSize;37return (NativeMovConstReg::instruction_size + // sethi;add38NativeJump::instruction_size + // sethi; jmp; delay slot39(1*BytesPerInstWord) + 1); // flush + 1 extra byte40#else41if (TraceJumps) return 300 * wordSize;42return (2+2+ 1) * wordSize + 1; // set/jump_to/nop + 1 byte so that code_end can be set in CodeBuffer43#endif44}4546void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {47ResourceMark rm;48CodeBuffer code(code_begin, ic_stub_code_size());49MacroAssembler* masm = new MacroAssembler(&code);50// note: even though the code contains an embedded metadata, we do not need reloc info51// because52// (1) the metadata is old (i.e., doesn't matter for scavenges)53// (2) these ICStubs are removed *before* a GC happens, so the roots disappear54AddressLiteral cached_value_addrlit((address)cached_value, relocInfo::none);55// Force the set to generate the fixed sequence so next_instruction_address works56masm->patchable_set(cached_value_addrlit, G5_inline_cache_reg);57assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub");58assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub");59AddressLiteral entry(entry_point);60masm->JUMP(entry, G3_scratch, 0);61masm->delayed()->nop();62masm->flush();63}646566address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {67NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object68NativeJump* jump = nativeJump_at(move->next_instruction_address());69return jump->jump_destination();70}717273void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {74NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object75NativeJump* jump = nativeJump_at(move->next_instruction_address());76void* o = (void*)move->data();77return o;78}798081