CoCalc -- c1

GitHub Repository: PojavLauncherTeam/openjdk-multiarch-jdk8u
Path: blob/aarch64-shenandoah-jdk8u272-b10/hotspot/src/share/vm/c1/c1_LIR.hpp
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/*
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 * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef SHARE_VM_C1_C1_LIR_HPP
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#define SHARE_VM_C1_C1_LIR_HPP
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#include "c1/c1_Defs.hpp"
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#include "c1/c1_ValueType.hpp"
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#include "oops/method.hpp"
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class BlockBegin;
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class BlockList;
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class LIR_Assembler;
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class CodeEmitInfo;
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class CodeStub;
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class CodeStubList;
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class ArrayCopyStub;
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class LIR_Op;
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class ciType;
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class ValueType;
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class LIR_OpVisitState;
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class FpuStackSim;
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//---------------------------------------------------------------------
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//                 LIR Operands
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//  LIR_OprDesc
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//    LIR_OprPtr
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//      LIR_Const
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//      LIR_Address
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//---------------------------------------------------------------------
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class LIR_OprDesc;
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class LIR_OprPtr;
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class LIR_Const;
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class LIR_Address;
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class LIR_OprVisitor;
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typedef LIR_OprDesc* LIR_Opr;
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typedef int          RegNr;
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define_array(LIR_OprArray, LIR_Opr)
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define_stack(LIR_OprList, LIR_OprArray)
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define_array(LIR_OprRefArray, LIR_Opr*)
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define_stack(LIR_OprRefList, LIR_OprRefArray)
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define_array(CodeEmitInfoArray, CodeEmitInfo*)
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define_stack(CodeEmitInfoList, CodeEmitInfoArray)
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define_array(LIR_OpArray, LIR_Op*)
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define_stack(LIR_OpList, LIR_OpArray)
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// define LIR_OprPtr early so LIR_OprDesc can refer to it
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class LIR_OprPtr: public CompilationResourceObj {
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 public:
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  bool is_oop_pointer() const                    { return (type() == T_OBJECT); }
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  bool is_float_kind() const                     { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
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  virtual LIR_Const*  as_constant()              { return NULL; }
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  virtual LIR_Address* as_address()              { return NULL; }
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  virtual BasicType type() const                 = 0;
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  virtual void print_value_on(outputStream* out) const = 0;
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};
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// LIR constants
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class LIR_Const: public LIR_OprPtr {
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 private:
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  JavaValue _value;
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  void type_check(BasicType t) const   { assert(type() == t, "type check"); }
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  void type_check(BasicType t1, BasicType t2) const   { assert(type() == t1 || type() == t2, "type check"); }
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  void type_check(BasicType t1, BasicType t2, BasicType t3) const   { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
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 public:
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  LIR_Const(jint i, bool is_address=false)       { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
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  LIR_Const(jlong l)                             { _value.set_type(T_LONG);    _value.set_jlong(l); }
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  LIR_Const(jfloat f)                            { _value.set_type(T_FLOAT);   _value.set_jfloat(f); }
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  LIR_Const(jdouble d)                           { _value.set_type(T_DOUBLE);  _value.set_jdouble(d); }
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  LIR_Const(jobject o)                           { _value.set_type(T_OBJECT);  _value.set_jobject(o); }
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  LIR_Const(void* p) {
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#ifdef _LP64
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    assert(sizeof(jlong) >= sizeof(p), "too small");;
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    _value.set_type(T_LONG);    _value.set_jlong((jlong)p);
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#else
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    assert(sizeof(jint) >= sizeof(p), "too small");;
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    _value.set_type(T_INT);     _value.set_jint((jint)p);
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#endif
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  }
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  LIR_Const(Metadata* m) {
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    _value.set_type(T_METADATA);
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#ifdef _LP64
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    _value.set_jlong((jlong)m);
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#else
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    _value.set_jint((jint)m);
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#endif // _LP64
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  }
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  virtual BasicType type()       const { return _value.get_type(); }
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  virtual LIR_Const* as_constant()     { return this; }
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  jint      as_jint()    const         { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
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  jlong     as_jlong()   const         { type_check(T_LONG  ); return _value.get_jlong(); }
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  jfloat    as_jfloat()  const         { type_check(T_FLOAT ); return _value.get_jfloat(); }
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  jdouble   as_jdouble() const         { type_check(T_DOUBLE); return _value.get_jdouble(); }
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  jobject   as_jobject() const         { type_check(T_OBJECT); return _value.get_jobject(); }
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  jint      as_jint_lo() const         { type_check(T_LONG  ); return low(_value.get_jlong()); }
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  jint      as_jint_hi() const         { type_check(T_LONG  ); return high(_value.get_jlong()); }
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#ifdef _LP64
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  address   as_pointer() const         { type_check(T_LONG  ); return (address)_value.get_jlong(); }
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  Metadata* as_metadata() const        { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
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#else
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  address   as_pointer() const         { type_check(T_INT   ); return (address)_value.get_jint(); }
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  Metadata* as_metadata() const        { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
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#endif
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  jint      as_jint_bits() const       { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
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  jint      as_jint_lo_bits() const    {
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    if (type() == T_DOUBLE) {
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      return low(jlong_cast(_value.get_jdouble()));
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    } else {
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      return as_jint_lo();
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    }
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  }
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  jint      as_jint_hi_bits() const    {
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    if (type() == T_DOUBLE) {
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      return high(jlong_cast(_value.get_jdouble()));
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    } else {
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      return as_jint_hi();
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    }
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  }
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  jlong      as_jlong_bits() const    {
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    if (type() == T_DOUBLE) {
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      return jlong_cast(_value.get_jdouble());
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    } else {
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      return as_jlong();
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    }
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  }
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  virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
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  bool is_zero_float() {
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    jfloat f = as_jfloat();
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    jfloat ok = 0.0f;
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    return jint_cast(f) == jint_cast(ok);
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  }
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  bool is_one_float() {
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    jfloat f = as_jfloat();
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    return !g_isnan(f) && g_isfinite(f) && f == 1.0;
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  }
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  bool is_zero_double() {
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    jdouble d = as_jdouble();
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    jdouble ok = 0.0;
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    return jlong_cast(d) == jlong_cast(ok);
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  }
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  bool is_one_double() {
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    jdouble d = as_jdouble();
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    return !g_isnan(d) && g_isfinite(d) && d == 1.0;
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  }
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};
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//---------------------LIR Operand descriptor------------------------------------
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//
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// The class LIR_OprDesc represents a LIR instruction operand;
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// it can be a register (ALU/FPU), stack location or a constant;
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// Constants and addresses are represented as resource area allocated
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// structures (see above).
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// Registers and stack locations are inlined into the this pointer
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// (see value function).
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class LIR_OprDesc: public CompilationResourceObj {
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 public:
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  // value structure:
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  //     data       opr-type opr-kind
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  // +--------------+-------+-------+
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  // [max...........|7 6 5 4|3 2 1 0]
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  //                             ^
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  //                    is_pointer bit
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  //
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  // lowest bit cleared, means it is a structure pointer
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  // we need  4 bits to represent types
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 private:
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  friend class LIR_OprFact;
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  // Conversion
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  intptr_t value() const                         { return (intptr_t) this; }
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  bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
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    return (value() & mask) == masked_value;
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  }
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  enum OprKind {
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      pointer_value      = 0
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    , stack_value        = 1
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    , cpu_register       = 3
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    , fpu_register       = 5
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    , illegal_value      = 7
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  };
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  enum OprBits {
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      pointer_bits   = 1
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    , kind_bits      = 3
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    , type_bits      = 4
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    , size_bits      = 2
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    , destroys_bits  = 1
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    , virtual_bits   = 1
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    , is_xmm_bits    = 1
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    , last_use_bits  = 1
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    , is_fpu_stack_offset_bits = 1        // used in assertion checking on x86 for FPU stack slot allocation
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    , non_data_bits  = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
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                       is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
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    , data_bits      = BitsPerInt - non_data_bits
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    , reg_bits       = data_bits / 2      // for two registers in one value encoding
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  };
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  enum OprShift {
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      kind_shift     = 0
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    , type_shift     = kind_shift     + kind_bits
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    , size_shift     = type_shift     + type_bits
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    , destroys_shift = size_shift     + size_bits
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    , last_use_shift = destroys_shift + destroys_bits
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    , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
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    , virtual_shift  = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
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    , is_xmm_shift   = virtual_shift + virtual_bits
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    , data_shift     = is_xmm_shift + is_xmm_bits
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    , reg1_shift = data_shift
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    , reg2_shift = data_shift + reg_bits
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  };
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  enum OprSize {
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      single_size = 0 << size_shift
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    , double_size = 1 << size_shift
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  };
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  enum OprMask {
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      kind_mask      = right_n_bits(kind_bits)
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    , type_mask      = right_n_bits(type_bits) << type_shift
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    , size_mask      = right_n_bits(size_bits) << size_shift
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    , last_use_mask  = right_n_bits(last_use_bits) << last_use_shift
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    , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
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    , virtual_mask   = right_n_bits(virtual_bits) << virtual_shift
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    , is_xmm_mask    = right_n_bits(is_xmm_bits) << is_xmm_shift
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    , pointer_mask   = right_n_bits(pointer_bits)
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    , lower_reg_mask = right_n_bits(reg_bits)
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    , no_type_mask   = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
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  };
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  uintptr_t data() const                         { return value() >> data_shift; }
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  int lo_reg_half() const                        { return data() & lower_reg_mask; }
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  int hi_reg_half() const                        { return (data() >> reg_bits) & lower_reg_mask; }
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  OprKind kind_field() const                     { return (OprKind)(value() & kind_mask); }
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  OprSize size_field() const                     { return (OprSize)(value() & size_mask); }
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  static char type_char(BasicType t);
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 public:
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  enum {
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    vreg_base = ConcreteRegisterImpl::number_of_registers,
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    vreg_max = (1 << data_bits) - 1
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  };
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  static inline LIR_Opr illegalOpr();
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  enum OprType {
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      unknown_type  = 0 << type_shift    // means: not set (catch uninitialized types)
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    , int_type      = 1 << type_shift
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    , long_type     = 2 << type_shift
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    , object_type   = 3 << type_shift
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    , address_type  = 4 << type_shift
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    , float_type    = 5 << type_shift
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    , double_type   = 6 << type_shift
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    , metadata_type = 7 << type_shift
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  };
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  friend OprType as_OprType(BasicType t);
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  friend BasicType as_BasicType(OprType t);
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  OprType type_field_valid() const               { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
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  OprType type_field() const                     { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
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  static OprSize size_for(BasicType t) {
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    switch (t) {
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      case T_LONG:
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      case T_DOUBLE:
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        return double_size;
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        break;
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      case T_FLOAT:
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      case T_BOOLEAN:
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      case T_CHAR:
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      case T_BYTE:
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      case T_SHORT:
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      case T_INT:
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      case T_ADDRESS:
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      case T_OBJECT:
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      case T_ARRAY:
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      case T_METADATA:
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        return single_size;
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        break;
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      default:
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        ShouldNotReachHere();
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        return single_size;
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      }
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  }
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  void validate_type() const PRODUCT_RETURN;
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  BasicType type() const {
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    if (is_pointer()) {
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      return pointer()->type();
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    }
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    return as_BasicType(type_field());
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  }
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  ValueType* value_type() const                  { return as_ValueType(type()); }
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  char type_char() const                         { return type_char((is_pointer()) ? pointer()->type() : type()); }
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  bool is_equal(LIR_Opr opr) const         { return this == opr; }
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  // checks whether types are same
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  bool is_same_type(LIR_Opr opr) const     {
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    assert(type_field() != unknown_type &&
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           opr->type_field() != unknown_type, "shouldn't see unknown_type");
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    return type_field() == opr->type_field();
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  }
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  bool is_same_register(LIR_Opr opr) {
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    return (is_register() && opr->is_register() &&
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            kind_field() == opr->kind_field() &&
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            (value() & no_type_mask) == (opr->value() & no_type_mask));
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  }
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  bool is_pointer() const      { return check_value_mask(pointer_mask, pointer_value); }
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  bool is_illegal() const      { return kind_field() == illegal_value; }
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  bool is_valid() const        { return kind_field() != illegal_value; }
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  bool is_register() const     { return is_cpu_register() || is_fpu_register(); }
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  bool is_virtual() const      { return is_virtual_cpu()  || is_virtual_fpu();  }
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  bool is_constant() const     { return is_pointer() && pointer()->as_constant() != NULL; }
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  bool is_address() const      { return is_pointer() && pointer()->as_address() != NULL; }
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  bool is_float_kind() const   { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
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  bool is_oop() const;
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  // semantic for fpu- and xmm-registers:
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  // * is_float and is_double return true for xmm_registers
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  //   (so is_single_fpu and is_single_xmm are true)
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  // * So you must always check for is_???_xmm prior to is_???_fpu to
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  //   distinguish between fpu- and xmm-registers
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  bool is_stack() const        { validate_type(); return check_value_mask(kind_mask,                stack_value);                 }
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  bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask,    stack_value  | single_size);  }
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  bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask,    stack_value  | double_size);  }
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  bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask,                cpu_register);                }
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  bool is_virtual_cpu() const  { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
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  bool is_fixed_cpu() const    { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register);                }
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  bool is_single_cpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    cpu_register | single_size);  }
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  bool is_double_cpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    cpu_register | double_size);  }
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  bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask,                fpu_register);                }
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  bool is_virtual_fpu() const  { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
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  bool is_fixed_fpu() const    { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register);                }
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  bool is_single_fpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    fpu_register | single_size);  }
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  bool is_double_fpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    fpu_register | double_size);  }
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  bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask,             fpu_register | is_xmm_mask); }
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  bool is_single_xmm() const   { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
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  bool is_double_xmm() const   { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
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  // fast accessor functions for special bits that do not work for pointers
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  // (in this functions, the check for is_pointer() is omitted)
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  bool is_single_word() const      { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
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  bool is_double_word() const      { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
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  bool is_virtual_register() const { assert(is_register(),               "type check"); return check_value_mask(virtual_mask, virtual_mask); }
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  bool is_oop_register() const     { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
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  BasicType type_register() const  { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid());  }
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  bool is_last_use() const         { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
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  bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
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  LIR_Opr make_last_use()          { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
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  LIR_Opr make_fpu_stack_offset()  { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
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417

418
  int single_stack_ix() const  { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
419
  int double_stack_ix() const  { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
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  RegNr cpu_regnr() const      { assert(is_single_cpu()   && !is_virtual(), "type check"); return (RegNr)data(); }
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  RegNr cpu_regnrLo() const    { assert(is_double_cpu()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
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  RegNr cpu_regnrHi() const    { assert(is_double_cpu()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
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  RegNr fpu_regnr() const      { assert(is_single_fpu()   && !is_virtual(), "type check"); return (RegNr)data(); }
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  RegNr fpu_regnrLo() const    { assert(is_double_fpu()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
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  RegNr fpu_regnrHi() const    { assert(is_double_fpu()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
426
  RegNr xmm_regnr() const      { assert(is_single_xmm()   && !is_virtual(), "type check"); return (RegNr)data(); }
427
  RegNr xmm_regnrLo() const    { assert(is_double_xmm()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
428
  RegNr xmm_regnrHi() const    { assert(is_double_xmm()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
429
  int   vreg_number() const    { assert(is_virtual(),                       "type check"); return (RegNr)data(); }
430

431
  LIR_OprPtr* pointer()  const                   { assert(is_pointer(), "type check");      return (LIR_OprPtr*)this; }
432
  LIR_Const* as_constant_ptr() const             { return pointer()->as_constant(); }
433
  LIR_Address* as_address_ptr() const            { return pointer()->as_address(); }
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435
  Register as_register()    const;
436
  Register as_register_lo() const;
437
  Register as_register_hi() const;
438

439
  Register as_pointer_register() {
440
#ifdef _LP64
441
    if (is_double_cpu()) {
442
      assert(as_register_lo() == as_register_hi(), "should be a single register");
443
      return as_register_lo();
444
    }
445
#endif
446
    return as_register();
447
  }
448

449
#if defined(X86)
450
  XMMRegister as_xmm_float_reg() const;
451
  XMMRegister as_xmm_double_reg() const;
452
  // for compatibility with RInfo
453
  int fpu () const                                  { return lo_reg_half(); }
454
#endif
455
#if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64)
456
  FloatRegister as_float_reg   () const;
457
  FloatRegister as_double_reg  () const;
458
#endif
459

460
  jint      as_jint()    const { return as_constant_ptr()->as_jint(); }
461
  jlong     as_jlong()   const { return as_constant_ptr()->as_jlong(); }
462
  jfloat    as_jfloat()  const { return as_constant_ptr()->as_jfloat(); }
463
  jdouble   as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
464
  jobject   as_jobject() const { return as_constant_ptr()->as_jobject(); }
465

466
  void print() const PRODUCT_RETURN;
467
  void print(outputStream* out) const PRODUCT_RETURN;
468
};
469

470

471
inline LIR_OprDesc::OprType as_OprType(BasicType type) {
472
  switch (type) {
473
  case T_INT:      return LIR_OprDesc::int_type;
474
  case T_LONG:     return LIR_OprDesc::long_type;
475
  case T_FLOAT:    return LIR_OprDesc::float_type;
476
  case T_DOUBLE:   return LIR_OprDesc::double_type;
477
  case T_OBJECT:
478
  case T_ARRAY:    return LIR_OprDesc::object_type;
479
  case T_ADDRESS:  return LIR_OprDesc::address_type;
480
  case T_METADATA: return LIR_OprDesc::metadata_type;
481
  case T_ILLEGAL:  // fall through
482
  default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
483
  }
484
}
485

486
inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
487
  switch (t) {
488
  case LIR_OprDesc::int_type:     return T_INT;
489
  case LIR_OprDesc::long_type:    return T_LONG;
490
  case LIR_OprDesc::float_type:   return T_FLOAT;
491
  case LIR_OprDesc::double_type:  return T_DOUBLE;
492
  case LIR_OprDesc::object_type:  return T_OBJECT;
493
  case LIR_OprDesc::address_type: return T_ADDRESS;
494
  case LIR_OprDesc::metadata_type:return T_METADATA;
495
  case LIR_OprDesc::unknown_type: // fall through
496
  default: ShouldNotReachHere();  return T_ILLEGAL;
497
  }
498
}
499

500

501
// LIR_Address
502
class LIR_Address: public LIR_OprPtr {
503
 friend class LIR_OpVisitState;
504

505
 public:
506
  // NOTE: currently these must be the log2 of the scale factor (and
507
  // must also be equivalent to the ScaleFactor enum in
508
  // assembler_i486.hpp)
509
  enum Scale {
510
    times_1  =  0,
511
    times_2  =  1,
512
    times_4  =  2,
513
    times_8  =  3
514
  };
515

516
 private:
517
  LIR_Opr   _base;
518
  LIR_Opr   _index;
519
  Scale     _scale;
520
  intx      _disp;
521
  BasicType _type;
522

523
 public:
524
  LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
525
       _base(base)
526
     , _index(index)
527
     , _scale(times_1)
528
     , _type(type)
529
     , _disp(0) { verify(); }
530

531
  LIR_Address(LIR_Opr base, intx disp, BasicType type):
532
       _base(base)
533
     , _index(LIR_OprDesc::illegalOpr())
534
     , _scale(times_1)
535
     , _type(type)
536
     , _disp(disp) { verify(); }
537

538
  LIR_Address(LIR_Opr base, BasicType type):
539
       _base(base)
540
     , _index(LIR_OprDesc::illegalOpr())
541
     , _scale(times_1)
542
     , _type(type)
543
     , _disp(0) { verify(); }
544

545
#if defined(X86) || defined(ARM) || defined(AARCH64)
546
  LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
547
       _base(base)
548
     , _index(index)
549
     , _scale(scale)
550
     , _type(type)
551
     , _disp(disp) { verify(); }
552
#endif // X86 || ARM
553

554
  LIR_Opr base()  const                          { return _base;  }
555
  LIR_Opr index() const                          { return _index; }
556
  Scale   scale() const                          { return _scale; }
557
  intx    disp()  const                          { return _disp;  }
558

559
  bool equals(LIR_Address* other) const          { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
560

561
  virtual LIR_Address* as_address()              { return this;   }
562
  virtual BasicType type() const                 { return _type; }
563
  virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
564

565
  void verify0() const PRODUCT_RETURN;
566
#if defined(LIR_ADDRESS_PD_VERIFY) && !defined(PRODUCT)
567
  void pd_verify() const;
568
  void verify() const { pd_verify(); }
569
#else
570
  void verify() const { verify0(); }
571
#endif
572

573
  static Scale scale(BasicType type);
574
};
575

576

577
// operand factory
578
class LIR_OprFact: public AllStatic {
579
 public:
580

581
  static LIR_Opr illegalOpr;
582

583
  static LIR_Opr single_cpu(int reg) {
584
    return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
585
                               LIR_OprDesc::int_type             |
586
                               LIR_OprDesc::cpu_register         |
587
                               LIR_OprDesc::single_size);
588
  }
589
  static LIR_Opr single_cpu_oop(int reg) {
590
    return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
591
                               LIR_OprDesc::object_type          |
592
                               LIR_OprDesc::cpu_register         |
593
                               LIR_OprDesc::single_size);
594
  }
595
  static LIR_Opr single_cpu_address(int reg) {
596
    return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
597
                               LIR_OprDesc::address_type         |
598
                               LIR_OprDesc::cpu_register         |
599
                               LIR_OprDesc::single_size);
600
  }
601
  static LIR_Opr single_cpu_metadata(int reg) {
602
    return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
603
                               LIR_OprDesc::metadata_type        |
604
                               LIR_OprDesc::cpu_register         |
605
                               LIR_OprDesc::single_size);
606
  }
607
  static LIR_Opr double_cpu(int reg1, int reg2) {
608
    LP64_ONLY(assert(reg1 == reg2, "must be identical"));
609
    return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
610
                               (reg2 << LIR_OprDesc::reg2_shift) |
611
                               LIR_OprDesc::long_type            |
612
                               LIR_OprDesc::cpu_register         |
613
                               LIR_OprDesc::double_size);
614
  }
615

616
  static LIR_Opr single_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
617
                                                                             LIR_OprDesc::float_type           |
618
                                                                             LIR_OprDesc::fpu_register         |
619
                                                                             LIR_OprDesc::single_size); }
620
#if defined(C1_LIR_MD_HPP)
621
# include C1_LIR_MD_HPP
622
#elif defined(SPARC) || defined(AARCH32)
623
  static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
624
                                                                             (reg2 << LIR_OprDesc::reg2_shift) |
625
                                                                             LIR_OprDesc::double_type          |
626
                                                                             LIR_OprDesc::fpu_register         |
627
                                                                             LIR_OprDesc::double_size); }
628
#elif defined(X86) || defined(AARCH64)
629
  static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
630
                                                                             (reg  << LIR_OprDesc::reg2_shift) |
631
                                                                             LIR_OprDesc::double_type          |
632
                                                                             LIR_OprDesc::fpu_register         |
633
                                                                             LIR_OprDesc::double_size); }
634

635
  static LIR_Opr single_xmm(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
636
                                                                             LIR_OprDesc::float_type           |
637
                                                                             LIR_OprDesc::fpu_register         |
638
                                                                             LIR_OprDesc::single_size          |
639
                                                                             LIR_OprDesc::is_xmm_mask); }
640
  static LIR_Opr double_xmm(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
641
                                                                             (reg  << LIR_OprDesc::reg2_shift) |
642
                                                                             LIR_OprDesc::double_type          |
643
                                                                             LIR_OprDesc::fpu_register         |
644
                                                                             LIR_OprDesc::double_size          |
645
                                                                             LIR_OprDesc::is_xmm_mask); }
646
#elif defined(PPC)
647
  static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
648
                                                                             (reg  << LIR_OprDesc::reg2_shift) |
649
                                                                             LIR_OprDesc::double_type          |
650
                                                                             LIR_OprDesc::fpu_register         |
651
                                                                             LIR_OprDesc::double_size); }
652
  static LIR_Opr single_softfp(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift)        |
653
                                                                             LIR_OprDesc::float_type           |
654
                                                                             LIR_OprDesc::cpu_register         |
655
                                                                             LIR_OprDesc::single_size); }
656
  static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift)        |
657
                                                                             (reg1 << LIR_OprDesc::reg2_shift) |
658
                                                                             LIR_OprDesc::double_type          |
659
                                                                             LIR_OprDesc::cpu_register         |
660
                                                                             LIR_OprDesc::double_size); }
661
#endif // PPC
662

663
  static LIR_Opr virtual_register(int index, BasicType type) {
664
    LIR_Opr res;
665
    switch (type) {
666
      case T_OBJECT: // fall through
667
      case T_ARRAY:
668
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift)  |
669
                                            LIR_OprDesc::object_type  |
670
                                            LIR_OprDesc::cpu_register |
671
                                            LIR_OprDesc::single_size  |
672
                                            LIR_OprDesc::virtual_mask);
673
        break;
674

675
      case T_METADATA:
676
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift)  |
677
                                            LIR_OprDesc::metadata_type|
678
                                            LIR_OprDesc::cpu_register |
679
                                            LIR_OprDesc::single_size  |
680
                                            LIR_OprDesc::virtual_mask);
681
        break;
682

683
      case T_INT:
684
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
685
                                  LIR_OprDesc::int_type              |
686
                                  LIR_OprDesc::cpu_register          |
687
                                  LIR_OprDesc::single_size           |
688
                                  LIR_OprDesc::virtual_mask);
689
        break;
690

691
      case T_ADDRESS:
692
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
693
                                  LIR_OprDesc::address_type          |
694
                                  LIR_OprDesc::cpu_register          |
695
                                  LIR_OprDesc::single_size           |
696
                                  LIR_OprDesc::virtual_mask);
697
        break;
698

699
      case T_LONG:
700
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
701
                                  LIR_OprDesc::long_type             |
702
                                  LIR_OprDesc::cpu_register          |
703
                                  LIR_OprDesc::double_size           |
704
                                  LIR_OprDesc::virtual_mask);
705
        break;
706

707
#ifdef __SOFTFP__
708
      case T_FLOAT:
709
#ifdef AARCH32
710
        if (hasFPU()) {
711
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
712
                                  LIR_OprDesc::float_type  |
713
                                      LIR_OprDesc::fpu_register         |
714
                                      LIR_OprDesc::single_size          |
715
                                      LIR_OprDesc::virtual_mask);
716
        } else
717
#endif // AARCH32
718
        {
719
            res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
720
                                      LIR_OprDesc::float_type  |
721
                                  LIR_OprDesc::cpu_register |
722
                                  LIR_OprDesc::single_size |
723
                                  LIR_OprDesc::virtual_mask);
724
        }
725
        break;
726
      case T_DOUBLE:
727
#ifdef AARCH32
728
        if(hasFPU()) {
729
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
730
                                  LIR_OprDesc::double_type |
731
                                                LIR_OprDesc::fpu_register          |
732
                                                LIR_OprDesc::double_size           |
733
                                                LIR_OprDesc::virtual_mask);
734
        } else
735
#endif
736
        {
737
            res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
738
                                      LIR_OprDesc::double_type |
739
                                  LIR_OprDesc::cpu_register |
740
                                  LIR_OprDesc::double_size |
741
                                  LIR_OprDesc::virtual_mask);
742
        }
743
        break;
744
#else // __SOFTFP__
745
      case T_FLOAT:
746
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
747
                                  LIR_OprDesc::float_type           |
748
                                  LIR_OprDesc::fpu_register         |
749
                                  LIR_OprDesc::single_size          |
750
                                  LIR_OprDesc::virtual_mask);
751
        break;
752

753
      case
754
        T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
755
                                            LIR_OprDesc::double_type           |
756
                                            LIR_OprDesc::fpu_register          |
757
                                            LIR_OprDesc::double_size           |
758
                                            LIR_OprDesc::virtual_mask);
759
        break;
760
#endif // __SOFTFP__
761
      default:       ShouldNotReachHere(); res = illegalOpr;
762
    }
763

764
#ifdef ASSERT
765
    res->validate_type();
766
    assert(res->vreg_number() == index, "conversion check");
767
    assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
768
    assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
769

770
    // old-style calculation; check if old and new method are equal
771
    LIR_OprDesc::OprType t = as_OprType(type);
772
#ifdef __SOFTFP__
773
    LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
774
                               t |
775
                               LIR_OprDesc::cpu_register |
776
                               LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
777
#else // __SOFTFP__
778
    LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
779
                                          ((type == T_FLOAT || type == T_DOUBLE) ?  LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
780
                               LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
781
    assert(res == old_res, "old and new method not equal");
782
#endif // __SOFTFP__
783
#endif // ASSERT
784

785
    return res;
786
  }
787

788
  // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
789
  // the index is platform independent; a double stack useing indeces 2 and 3 has always
790
  // index 2.
791
  static LIR_Opr stack(int index, BasicType type) {
792
    LIR_Opr res;
793
    switch (type) {
794
      case T_OBJECT: // fall through
795
      case T_ARRAY:
796
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
797
                                  LIR_OprDesc::object_type           |
798
                                  LIR_OprDesc::stack_value           |
799
                                  LIR_OprDesc::single_size);
800
        break;
801

802
      case T_METADATA:
803
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
804
                                  LIR_OprDesc::metadata_type         |
805
                                  LIR_OprDesc::stack_value           |
806
                                  LIR_OprDesc::single_size);
807
        break;
808
      case T_INT:
809
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
810
                                  LIR_OprDesc::int_type              |
811
                                  LIR_OprDesc::stack_value           |
812
                                  LIR_OprDesc::single_size);
813
        break;
814

815
      case T_ADDRESS:
816
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
817
                                  LIR_OprDesc::address_type          |
818
                                  LIR_OprDesc::stack_value           |
819
                                  LIR_OprDesc::single_size);
820
        break;
821

822
      case T_LONG:
823
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
824
                                  LIR_OprDesc::long_type             |
825
                                  LIR_OprDesc::stack_value           |
826
                                  LIR_OprDesc::double_size);
827
        break;
828

829
      case T_FLOAT:
830
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
831
                                  LIR_OprDesc::float_type            |
832
                                  LIR_OprDesc::stack_value           |
833
                                  LIR_OprDesc::single_size);
834
        break;
835
      case T_DOUBLE:
836
        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
837
                                  LIR_OprDesc::double_type           |
838
                                  LIR_OprDesc::stack_value           |
839
                                  LIR_OprDesc::double_size);
840
        break;
841

842
      default:       ShouldNotReachHere(); res = illegalOpr;
843
    }
844

845
#ifdef ASSERT
846
    assert(index >= 0, "index must be positive");
847
    assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
848

849
    LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
850
                                          LIR_OprDesc::stack_value           |
851
                                          as_OprType(type)                   |
852
                                          LIR_OprDesc::size_for(type));
853
    assert(res == old_res, "old and new method not equal");
854
#endif
855

856
    return res;
857
  }
858

859
  static LIR_Opr intConst(jint i)                { return (LIR_Opr)(new LIR_Const(i)); }
860
  static LIR_Opr longConst(jlong l)              { return (LIR_Opr)(new LIR_Const(l)); }
861
  static LIR_Opr floatConst(jfloat f)            { return (LIR_Opr)(new LIR_Const(f)); }
862
  static LIR_Opr doubleConst(jdouble d)          { return (LIR_Opr)(new LIR_Const(d)); }
863
  static LIR_Opr oopConst(jobject o)             { return (LIR_Opr)(new LIR_Const(o)); }
864
  static LIR_Opr address(LIR_Address* a)         { return (LIR_Opr)a; }
865
  static LIR_Opr intptrConst(void* p)            { return (LIR_Opr)(new LIR_Const(p)); }
866
  static LIR_Opr intptrConst(intptr_t v)         { return (LIR_Opr)(new LIR_Const((void*)v)); }
867
  static LIR_Opr illegal()                       { return (LIR_Opr)-1; }
868
  static LIR_Opr addressConst(jint i)            { return (LIR_Opr)(new LIR_Const(i, true)); }
869
  static LIR_Opr metadataConst(Metadata* m)      { return (LIR_Opr)(new LIR_Const(m)); }
870

871
  static LIR_Opr value_type(ValueType* type);
872
  static LIR_Opr dummy_value_type(ValueType* type);
873
};
874

875

876
//-------------------------------------------------------------------------------
877
//                   LIR Instructions
878
//-------------------------------------------------------------------------------
879
//
880
// Note:
881
//  - every instruction has a result operand
882
//  - every instruction has an CodeEmitInfo operand (can be revisited later)
883
//  - every instruction has a LIR_OpCode operand
884
//  - LIR_OpN, means an instruction that has N input operands
885
//
886
// class hierarchy:
887
//
888
class  LIR_Op;
889
class    LIR_Op0;
890
class      LIR_OpLabel;
891
class    LIR_Op1;
892
class      LIR_OpBranch;
893
class      LIR_OpConvert;
894
class      LIR_OpAllocObj;
895
class      LIR_OpRoundFP;
896
class    LIR_Op2;
897
class    LIR_OpDelay;
898
class    LIR_Op3;
899
class      LIR_OpAllocArray;
900
class    LIR_OpCall;
901
class      LIR_OpJavaCall;
902
class      LIR_OpRTCall;
903
class    LIR_OpArrayCopy;
904
class    LIR_OpUpdateCRC32;
905
class    LIR_OpLock;
906
class    LIR_OpTypeCheck;
907
class    LIR_OpCompareAndSwap;
908
class    LIR_OpProfileCall;
909
class    LIR_OpProfileType;
910
#ifdef ASSERT
911
class    LIR_OpAssert;
912
#endif
913

914
// LIR operation codes
915
enum LIR_Code {
916
    lir_none
917
  , begin_op0
918
      , lir_word_align
919
      , lir_label
920
      , lir_nop
921
      , lir_backwardbranch_target
922
      , lir_std_entry
923
      , lir_osr_entry
924
      , lir_build_frame
925
      , lir_fpop_raw
926
      , lir_24bit_FPU
927
      , lir_reset_FPU
928
      , lir_breakpoint
929
      , lir_rtcall
930
      , lir_membar
931
      , lir_membar_acquire
932
      , lir_membar_release
933
      , lir_membar_loadload
934
      , lir_membar_storestore
935
      , lir_membar_loadstore
936
      , lir_membar_storeload
937
      , lir_get_thread
938
  , end_op0
939
  , begin_op1
940
      , lir_fxch
941
      , lir_fld
942
      , lir_ffree
943
      , lir_push
944
      , lir_pop
945
      , lir_null_check
946
      , lir_return
947
      , lir_leal
948
      , lir_neg
949
      , lir_branch
950
      , lir_cond_float_branch
951
      , lir_move
952
      , lir_prefetchr
953
      , lir_prefetchw
954
      , lir_convert
955
      , lir_alloc_object
956
      , lir_monaddr
957
      , lir_roundfp
958
      , lir_safepoint
959
      , lir_pack64
960
      , lir_unpack64
961
      , lir_unwind
962
  , end_op1
963
  , begin_op2
964
      , lir_cmp
965
      , lir_cmp_l2i
966
      , lir_ucmp_fd2i
967
      , lir_cmp_fd2i
968
      , lir_cmove
969
      , lir_add
970
      , lir_sub
971
      , lir_mul
972
      , lir_mul_strictfp
973
      , lir_div
974
      , lir_div_strictfp
975
      , lir_rem
976
      , lir_sqrt
977
      , lir_abs
978
      , lir_sin
979
      , lir_cos
980
      , lir_tan
981
      , lir_log
982
      , lir_log10
983
      , lir_exp
984
      , lir_pow
985
      , lir_logic_and
986
      , lir_logic_or
987
      , lir_logic_xor
988
      , lir_shl
989
      , lir_shr
990
      , lir_ushr
991
      , lir_alloc_array
992
      , lir_throw
993
      , lir_compare_to
994
      , lir_xadd
995
      , lir_xchg
996
  , end_op2
997
  , begin_op3
998
      , lir_idiv
999
      , lir_irem
1000
  , end_op3
1001
  , begin_opJavaCall
1002
      , lir_static_call
1003
      , lir_optvirtual_call
1004
      , lir_icvirtual_call
1005
      , lir_virtual_call
1006
      , lir_dynamic_call
1007
  , end_opJavaCall
1008
  , begin_opArrayCopy
1009
      , lir_arraycopy
1010
  , end_opArrayCopy
1011
  , begin_opUpdateCRC32
1012
      , lir_updatecrc32
1013
  , end_opUpdateCRC32
1014
  , begin_opLock
1015
    , lir_lock
1016
    , lir_unlock
1017
  , end_opLock
1018
  , begin_delay_slot
1019
    , lir_delay_slot
1020
  , end_delay_slot
1021
  , begin_opTypeCheck
1022
    , lir_instanceof
1023
    , lir_checkcast
1024
    , lir_store_check
1025
  , end_opTypeCheck
1026
  , begin_opCompareAndSwap
1027
    , lir_cas_long
1028
    , lir_cas_obj
1029
    , lir_cas_int
1030
  , end_opCompareAndSwap
1031
  , begin_opMDOProfile
1032
    , lir_profile_call
1033
    , lir_profile_type
1034
  , end_opMDOProfile
1035
  , begin_opAssert
1036
    , lir_assert
1037
  , end_opAssert
1038
};
1039

1040

1041
enum LIR_Condition {
1042
    lir_cond_equal
1043
  , lir_cond_notEqual
1044
  , lir_cond_less
1045
  , lir_cond_lessEqual
1046
  , lir_cond_greaterEqual
1047
  , lir_cond_greater
1048
  , lir_cond_belowEqual
1049
  , lir_cond_aboveEqual
1050
  , lir_cond_always
1051
  , lir_cond_unknown = -1
1052
};
1053

1054

1055
enum LIR_PatchCode {
1056
  lir_patch_none,
1057
  lir_patch_low,
1058
  lir_patch_high,
1059
  lir_patch_normal
1060
};
1061

1062

1063
enum LIR_MoveKind {
1064
  lir_move_normal,
1065
  lir_move_volatile,
1066
  lir_move_unaligned,
1067
  lir_move_wide,
1068
  lir_move_max_flag
1069
};
1070

1071

1072
// --------------------------------------------------
1073
// LIR_Op
1074
// --------------------------------------------------
1075
class LIR_Op: public CompilationResourceObj {
1076
 friend class LIR_OpVisitState;
1077

1078
#ifdef ASSERT
1079
 private:
1080
  const char *  _file;
1081
  int           _line;
1082
#endif
1083

1084
 protected:
1085
  LIR_Opr       _result;
1086
  unsigned short _code;
1087
  unsigned short _flags;
1088
  CodeEmitInfo* _info;
1089
  int           _id;     // value id for register allocation
1090
  int           _fpu_pop_count;
1091
  Instruction*  _source; // for debugging
1092

1093
  static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1094

1095
 protected:
1096
  static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end)  { return start < test && test < end; }
1097

1098
 public:
1099
  LIR_Op()
1100
    : _result(LIR_OprFact::illegalOpr)
1101
    , _code(lir_none)
1102
    , _flags(0)
1103
    , _info(NULL)
1104
#ifdef ASSERT
1105
    , _file(NULL)
1106
    , _line(0)
1107
#endif
1108
    , _fpu_pop_count(0)
1109
    , _source(NULL)
1110
    , _id(-1)                             {}
1111

1112
  LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1113
    : _result(result)
1114
    , _code(code)
1115
    , _flags(0)
1116
    , _info(info)
1117
#ifdef ASSERT
1118
    , _file(NULL)
1119
    , _line(0)
1120
#endif
1121
    , _fpu_pop_count(0)
1122
    , _source(NULL)
1123
    , _id(-1)                             {}
1124

1125
  CodeEmitInfo* info() const                  { return _info;   }
1126
  LIR_Code code()      const                  { return (LIR_Code)_code;   }
1127
  LIR_Opr result_opr() const                  { return _result; }
1128
  void    set_result_opr(LIR_Opr opr)         { _result = opr;  }
1129

1130
#ifdef ASSERT
1131
  void set_file_and_line(const char * file, int line) {
1132
    _file = file;
1133
    _line = line;
1134
  }
1135
#endif
1136

1137
  virtual const char * name() const PRODUCT_RETURN0;
1138

1139
  int id()             const                  { return _id;     }
1140
  void set_id(int id)                         { _id = id; }
1141

1142
  // FPU stack simulation helpers -- only used on Intel
1143
  void set_fpu_pop_count(int count)           { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1144
  int  fpu_pop_count() const                  { return _fpu_pop_count; }
1145
  bool pop_fpu_stack()                        { return _fpu_pop_count > 0; }
1146

1147
  Instruction* source() const                 { return _source; }
1148
  void set_source(Instruction* ins)           { _source = ins; }
1149

1150
  virtual void emit_code(LIR_Assembler* masm) = 0;
1151
  virtual void print_instr(outputStream* out) const   = 0;
1152
  virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1153

1154
  virtual bool is_patching() { return false; }
1155
  virtual LIR_OpCall* as_OpCall() { return NULL; }
1156
  virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1157
  virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1158
  virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1159
  virtual LIR_OpLock* as_OpLock() { return NULL; }
1160
  virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1161
  virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1162
  virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1163
  virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1164
  virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1165
  virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1166
  virtual LIR_Op0* as_Op0() { return NULL; }
1167
  virtual LIR_Op1* as_Op1() { return NULL; }
1168
  virtual LIR_Op2* as_Op2() { return NULL; }
1169
  virtual LIR_Op3* as_Op3() { return NULL; }
1170
  virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1171
  virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1172
  virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1173
  virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1174
  virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1175
  virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1176
#ifdef ASSERT
1177
  virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1178
#endif
1179

1180
  virtual void verify() const {}
1181
};
1182

1183
// for calls
1184
class LIR_OpCall: public LIR_Op {
1185
 friend class LIR_OpVisitState;
1186

1187
 protected:
1188
  address      _addr;
1189
  LIR_OprList* _arguments;
1190
 protected:
1191
  LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1192
             LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1193
    : LIR_Op(code, result, info)
1194
    , _arguments(arguments)
1195
    , _addr(addr) {}
1196

1197
 public:
1198
  address addr() const                           { return _addr; }
1199
  const LIR_OprList* arguments() const           { return _arguments; }
1200
  virtual LIR_OpCall* as_OpCall()                { return this; }
1201
};
1202

1203

1204
// --------------------------------------------------
1205
// LIR_OpJavaCall
1206
// --------------------------------------------------
1207
class LIR_OpJavaCall: public LIR_OpCall {
1208
 friend class LIR_OpVisitState;
1209

1210
 private:
1211
  ciMethod* _method;
1212
  LIR_Opr   _receiver;
1213
  LIR_Opr   _method_handle_invoke_SP_save_opr;  // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1214

1215
 public:
1216
  LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1217
                 LIR_Opr receiver, LIR_Opr result,
1218
                 address addr, LIR_OprList* arguments,
1219
                 CodeEmitInfo* info)
1220
  : LIR_OpCall(code, addr, result, arguments, info)
1221
  , _receiver(receiver)
1222
  , _method(method)
1223
  , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1224
  { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1225

1226
  LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1227
                 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1228
                 LIR_OprList* arguments, CodeEmitInfo* info)
1229
  : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1230
  , _receiver(receiver)
1231
  , _method(method)
1232
  , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1233
  { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1234

1235
  LIR_Opr receiver() const                       { return _receiver; }
1236
  ciMethod* method() const                       { return _method;   }
1237

1238
  // JSR 292 support.
1239
  bool is_invokedynamic() const                  { return code() == lir_dynamic_call; }
1240
  bool is_method_handle_invoke() const {
1241
    return method()->is_compiled_lambda_form() ||   // Java-generated lambda form
1242
           method()->is_method_handle_intrinsic();  // JVM-generated MH intrinsic
1243
  }
1244

1245
  intptr_t vtable_offset() const {
1246
    assert(_code == lir_virtual_call, "only have vtable for real vcall");
1247
    return (intptr_t) addr();
1248
  }
1249

1250
  virtual void emit_code(LIR_Assembler* masm);
1251
  virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1252
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1253
};
1254

1255
// --------------------------------------------------
1256
// LIR_OpLabel
1257
// --------------------------------------------------
1258
// Location where a branch can continue
1259
class LIR_OpLabel: public LIR_Op {
1260
 friend class LIR_OpVisitState;
1261

1262
 private:
1263
  Label* _label;
1264
 public:
1265
  LIR_OpLabel(Label* lbl)
1266
   : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1267
   , _label(lbl)                                 {}
1268
  Label* label() const                           { return _label; }
1269

1270
  virtual void emit_code(LIR_Assembler* masm);
1271
  virtual LIR_OpLabel* as_OpLabel() { return this; }
1272
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1273
};
1274

1275
// LIR_OpArrayCopy
1276
class LIR_OpArrayCopy: public LIR_Op {
1277
 friend class LIR_OpVisitState;
1278

1279
 private:
1280
  ArrayCopyStub*  _stub;
1281
  LIR_Opr   _src;
1282
  LIR_Opr   _src_pos;
1283
  LIR_Opr   _dst;
1284
  LIR_Opr   _dst_pos;
1285
  LIR_Opr   _length;
1286
  LIR_Opr   _tmp;
1287
  ciArrayKlass* _expected_type;
1288
  int       _flags;
1289

1290
public:
1291
  enum Flags {
1292
    src_null_check         = 1 << 0,
1293
    dst_null_check         = 1 << 1,
1294
    src_pos_positive_check = 1 << 2,
1295
    dst_pos_positive_check = 1 << 3,
1296
    length_positive_check  = 1 << 4,
1297
    src_range_check        = 1 << 5,
1298
    dst_range_check        = 1 << 6,
1299
    type_check             = 1 << 7,
1300
    overlapping            = 1 << 8,
1301
    unaligned              = 1 << 9,
1302
    src_objarray           = 1 << 10,
1303
    dst_objarray           = 1 << 11,
1304
    all_flags              = (1 << 12) - 1
1305
  };
1306

1307
  LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1308
                  ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1309

1310
  LIR_Opr src() const                            { return _src; }
1311
  LIR_Opr src_pos() const                        { return _src_pos; }
1312
  LIR_Opr dst() const                            { return _dst; }
1313
  LIR_Opr dst_pos() const                        { return _dst_pos; }
1314
  LIR_Opr length() const                         { return _length; }
1315
  LIR_Opr tmp() const                            { return _tmp; }
1316
  int flags() const                              { return _flags; }
1317
  ciArrayKlass* expected_type() const            { return _expected_type; }
1318
  ArrayCopyStub* stub() const                    { return _stub; }
1319

1320
  virtual void emit_code(LIR_Assembler* masm);
1321
  virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1322
  void print_instr(outputStream* out) const PRODUCT_RETURN;
1323
};
1324

1325
// LIR_OpUpdateCRC32
1326
class LIR_OpUpdateCRC32: public LIR_Op {
1327
  friend class LIR_OpVisitState;
1328

1329
private:
1330
  LIR_Opr   _crc;
1331
  LIR_Opr   _val;
1332

1333
public:
1334

1335
  LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1336

1337
  LIR_Opr crc() const                            { return _crc; }
1338
  LIR_Opr val() const                            { return _val; }
1339

1340
  virtual void emit_code(LIR_Assembler* masm);
1341
  virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32()  { return this; }
1342
  void print_instr(outputStream* out) const PRODUCT_RETURN;
1343
};
1344

1345
// --------------------------------------------------
1346
// LIR_Op0
1347
// --------------------------------------------------
1348
class LIR_Op0: public LIR_Op {
1349
 friend class LIR_OpVisitState;
1350

1351
 public:
1352
  LIR_Op0(LIR_Code code)
1353
   : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)  { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1354
  LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1355
   : LIR_Op(code, result, info)  { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1356

1357
  virtual void emit_code(LIR_Assembler* masm);
1358
  virtual LIR_Op0* as_Op0() { return this; }
1359
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1360
};
1361

1362

1363
// --------------------------------------------------
1364
// LIR_Op1
1365
// --------------------------------------------------
1366

1367
class LIR_Op1: public LIR_Op {
1368
 friend class LIR_OpVisitState;
1369

1370
 protected:
1371
  LIR_Opr         _opr;   // input operand
1372
  BasicType       _type;  // Operand types
1373
  LIR_PatchCode   _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1374

1375
  static void print_patch_code(outputStream* out, LIR_PatchCode code);
1376

1377
  void set_kind(LIR_MoveKind kind) {
1378
    assert(code() == lir_move, "must be");
1379
    _flags = kind;
1380
  }
1381

1382
 public:
1383
  LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1384
    : LIR_Op(code, result, info)
1385
    , _opr(opr)
1386
    , _patch(patch)
1387
    , _type(type)                      { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1388

1389
  LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1390
    : LIR_Op(code, result, info)
1391
    , _opr(opr)
1392
    , _patch(patch)
1393
    , _type(type)                      {
1394
    assert(code == lir_move, "must be");
1395
    set_kind(kind);
1396
  }
1397

1398
  LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1399
    : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1400
    , _opr(opr)
1401
    , _patch(lir_patch_none)
1402
    , _type(T_ILLEGAL)                 { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1403

1404
  LIR_Opr in_opr()           const               { return _opr;   }
1405
  LIR_PatchCode patch_code() const               { return _patch; }
1406
  BasicType type()           const               { return _type;  }
1407

1408
  LIR_MoveKind move_kind() const {
1409
    assert(code() == lir_move, "must be");
1410
    return (LIR_MoveKind)_flags;
1411
  }
1412

1413
  virtual bool is_patching() { return _patch != lir_patch_none; }
1414
  virtual void emit_code(LIR_Assembler* masm);
1415
  virtual LIR_Op1* as_Op1() { return this; }
1416
  virtual const char * name() const PRODUCT_RETURN0;
1417

1418
  void set_in_opr(LIR_Opr opr) { _opr = opr; }
1419

1420
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1421
  virtual void verify() const;
1422
};
1423

1424

1425
// for runtime calls
1426
class LIR_OpRTCall: public LIR_OpCall {
1427
 friend class LIR_OpVisitState;
1428

1429
 private:
1430
  LIR_Opr _tmp;
1431
 public:
1432
  LIR_OpRTCall(address addr, LIR_Opr tmp,
1433
               LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1434
    : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1435
    , _tmp(tmp) {}
1436

1437
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1438
  virtual void emit_code(LIR_Assembler* masm);
1439
  virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1440

1441
  LIR_Opr tmp() const                            { return _tmp; }
1442

1443
  virtual void verify() const;
1444
};
1445

1446

1447
class LIR_OpBranch: public LIR_Op {
1448
 friend class LIR_OpVisitState;
1449

1450
 private:
1451
  LIR_Condition _cond;
1452
  BasicType     _type;
1453
  Label*        _label;
1454
  BlockBegin*   _block;  // if this is a branch to a block, this is the block
1455
  BlockBegin*   _ublock; // if this is a float-branch, this is the unorderd block
1456
  CodeStub*     _stub;   // if this is a branch to a stub, this is the stub
1457

1458
 public:
1459
  LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1460
    : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1461
    , _cond(cond)
1462
    , _type(type)
1463
    , _label(lbl)
1464
    , _block(NULL)
1465
    , _ublock(NULL)
1466
    , _stub(NULL) { }
1467

1468
  LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1469
  LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1470

1471
  // for unordered comparisons
1472
  LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1473

1474
  LIR_Condition cond()        const              { return _cond;        }
1475
  BasicType     type()        const              { return _type;        }
1476
  Label*        label()       const              { return _label;       }
1477
  BlockBegin*   block()       const              { return _block;       }
1478
  BlockBegin*   ublock()      const              { return _ublock;      }
1479
  CodeStub*     stub()        const              { return _stub;       }
1480

1481
  void          change_block(BlockBegin* b);
1482
  void          change_ublock(BlockBegin* b);
1483
  void          negate_cond();
1484

1485
  virtual void emit_code(LIR_Assembler* masm);
1486
  virtual LIR_OpBranch* as_OpBranch() { return this; }
1487
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1488
};
1489

1490

1491
class ConversionStub;
1492

1493
class LIR_OpConvert: public LIR_Op1 {
1494
 friend class LIR_OpVisitState;
1495

1496
 private:
1497
   Bytecodes::Code _bytecode;
1498
   ConversionStub* _stub;
1499
#if defined(PPC) || defined(AARCH64)
1500
  LIR_Opr _tmp1;
1501
  LIR_Opr _tmp2;
1502
#endif
1503

1504
 public:
1505
   LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1506
     : LIR_Op1(lir_convert, opr, result)
1507
     , _stub(stub)
1508
#ifdef PPC
1509
     , _tmp1(LIR_OprDesc::illegalOpr())
1510
     , _tmp2(LIR_OprDesc::illegalOpr())
1511
#endif
1512
     , _bytecode(code)                           {}
1513

1514
#if defined(PPC) || defined(AARCH64)
1515
   LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1516
                 ,LIR_Opr tmp1, LIR_Opr tmp2)
1517
     : LIR_Op1(lir_convert, opr, result)
1518
     , _stub(stub)
1519
     , _tmp1(tmp1)
1520
     , _tmp2(tmp2)
1521
     , _bytecode(code)                           {}
1522
#endif
1523

1524
  Bytecodes::Code bytecode() const               { return _bytecode; }
1525
  ConversionStub* stub() const                   { return _stub; }
1526
#if defined(PPC) || defined(AARCH64)
1527
  LIR_Opr tmp1() const                           { return _tmp1; }
1528
  LIR_Opr tmp2() const                           { return _tmp2; }
1529
#endif
1530

1531
  virtual void emit_code(LIR_Assembler* masm);
1532
  virtual LIR_OpConvert* as_OpConvert() { return this; }
1533
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1534

1535
  static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1536
};
1537

1538

1539
// LIR_OpAllocObj
1540
class LIR_OpAllocObj : public LIR_Op1 {
1541
 friend class LIR_OpVisitState;
1542

1543
 private:
1544
  LIR_Opr _tmp1;
1545
  LIR_Opr _tmp2;
1546
  LIR_Opr _tmp3;
1547
  LIR_Opr _tmp4;
1548
  int     _hdr_size;
1549
  int     _obj_size;
1550
  CodeStub* _stub;
1551
  bool    _init_check;
1552

1553
 public:
1554
  LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1555
                 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1556
                 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1557
    : LIR_Op1(lir_alloc_object, klass, result)
1558
    , _tmp1(t1)
1559
    , _tmp2(t2)
1560
    , _tmp3(t3)
1561
    , _tmp4(t4)
1562
    , _hdr_size(hdr_size)
1563
    , _obj_size(obj_size)
1564
    , _init_check(init_check)
1565
    , _stub(stub)                                { }
1566

1567
  LIR_Opr klass()        const                   { return in_opr();     }
1568
  LIR_Opr obj()          const                   { return result_opr(); }
1569
  LIR_Opr tmp1()         const                   { return _tmp1;        }
1570
  LIR_Opr tmp2()         const                   { return _tmp2;        }
1571
  LIR_Opr tmp3()         const                   { return _tmp3;        }
1572
  LIR_Opr tmp4()         const                   { return _tmp4;        }
1573
  int     header_size()  const                   { return _hdr_size;    }
1574
  int     object_size()  const                   { return _obj_size;    }
1575
  bool    init_check()   const                   { return _init_check;  }
1576
  CodeStub* stub()       const                   { return _stub;        }
1577

1578
  virtual void emit_code(LIR_Assembler* masm);
1579
  virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1580
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1581
};
1582

1583

1584
// LIR_OpRoundFP
1585
class LIR_OpRoundFP : public LIR_Op1 {
1586
 friend class LIR_OpVisitState;
1587

1588
 private:
1589
  LIR_Opr _tmp;
1590

1591
 public:
1592
  LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1593
    : LIR_Op1(lir_roundfp, reg, result)
1594
    , _tmp(stack_loc_temp) {}
1595

1596
  LIR_Opr tmp() const                            { return _tmp; }
1597
  virtual LIR_OpRoundFP* as_OpRoundFP()          { return this; }
1598
  void print_instr(outputStream* out) const PRODUCT_RETURN;
1599
};
1600

1601
// LIR_OpTypeCheck
1602
class LIR_OpTypeCheck: public LIR_Op {
1603
 friend class LIR_OpVisitState;
1604

1605
 private:
1606
  LIR_Opr       _object;
1607
  LIR_Opr       _array;
1608
  ciKlass*      _klass;
1609
  LIR_Opr       _tmp1;
1610
  LIR_Opr       _tmp2;
1611
  LIR_Opr       _tmp3;
1612
  bool          _fast_check;
1613
  CodeEmitInfo* _info_for_patch;
1614
  CodeEmitInfo* _info_for_exception;
1615
  CodeStub*     _stub;
1616
  ciMethod*     _profiled_method;
1617
  int           _profiled_bci;
1618
  bool          _should_profile;
1619

1620
public:
1621
  LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1622
                  LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1623
                  CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1624
  LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1625
                  LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1626

1627
  LIR_Opr object() const                         { return _object;         }
1628
  LIR_Opr array() const                          { assert(code() == lir_store_check, "not valid"); return _array;         }
1629
  LIR_Opr tmp1() const                           { return _tmp1;           }
1630
  LIR_Opr tmp2() const                           { return _tmp2;           }
1631
  LIR_Opr tmp3() const                           { return _tmp3;           }
1632
  ciKlass* klass() const                         { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass;          }
1633
  bool fast_check() const                        { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check;     }
1634
  CodeEmitInfo* info_for_patch() const           { return _info_for_patch;  }
1635
  CodeEmitInfo* info_for_exception() const       { return _info_for_exception; }
1636
  CodeStub* stub() const                         { return _stub;           }
1637

1638
  // MethodData* profiling
1639
  void set_profiled_method(ciMethod *method)     { _profiled_method = method; }
1640
  void set_profiled_bci(int bci)                 { _profiled_bci = bci;       }
1641
  void set_should_profile(bool b)                { _should_profile = b;       }
1642
  ciMethod* profiled_method() const              { return _profiled_method;   }
1643
  int       profiled_bci() const                 { return _profiled_bci;      }
1644
  bool      should_profile() const               { return _should_profile;    }
1645

1646
  virtual bool is_patching() { return _info_for_patch != NULL; }
1647
  virtual void emit_code(LIR_Assembler* masm);
1648
  virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1649
  void print_instr(outputStream* out) const PRODUCT_RETURN;
1650
};
1651

1652
// LIR_Op2
1653
class LIR_Op2: public LIR_Op {
1654
 friend class LIR_OpVisitState;
1655

1656
  int  _fpu_stack_size; // for sin/cos implementation on Intel
1657

1658
 protected:
1659
  LIR_Opr   _opr1;
1660
  LIR_Opr   _opr2;
1661
  BasicType _type;
1662
  LIR_Opr   _tmp1;
1663
  LIR_Opr   _tmp2;
1664
  LIR_Opr   _tmp3;
1665
  LIR_Opr   _tmp4;
1666
  LIR_Opr   _tmp5;
1667
  LIR_Condition _condition;
1668

1669
  void verify() const;
1670

1671
 public:
1672
  LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1673
    : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1674
    , _opr1(opr1)
1675
    , _opr2(opr2)
1676
    , _type(T_ILLEGAL)
1677
    , _condition(condition)
1678
    , _fpu_stack_size(0)
1679
    , _tmp1(LIR_OprFact::illegalOpr)
1680
    , _tmp2(LIR_OprFact::illegalOpr)
1681
    , _tmp3(LIR_OprFact::illegalOpr)
1682
    , _tmp4(LIR_OprFact::illegalOpr)
1683
    , _tmp5(LIR_OprFact::illegalOpr) {
1684
    assert(code == lir_cmp || code == lir_assert, "code check");
1685
  }
1686

1687
  LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1688
    : LIR_Op(code, result, NULL)
1689
    , _opr1(opr1)
1690
    , _opr2(opr2)
1691
    , _type(type)
1692
    , _condition(condition)
1693
    , _fpu_stack_size(0)
1694
    , _tmp1(LIR_OprFact::illegalOpr)
1695
    , _tmp2(LIR_OprFact::illegalOpr)
1696
    , _tmp3(LIR_OprFact::illegalOpr)
1697
    , _tmp4(LIR_OprFact::illegalOpr)
1698
    , _tmp5(LIR_OprFact::illegalOpr) {
1699
    assert(code == lir_cmove, "code check");
1700
    assert(type != T_ILLEGAL, "cmove should have type");
1701
  }
1702

1703
  LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1704
          CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1705
    : LIR_Op(code, result, info)
1706
    , _opr1(opr1)
1707
    , _opr2(opr2)
1708
    , _type(type)
1709
    , _condition(lir_cond_unknown)
1710
    , _fpu_stack_size(0)
1711
    , _tmp1(LIR_OprFact::illegalOpr)
1712
    , _tmp2(LIR_OprFact::illegalOpr)
1713
    , _tmp3(LIR_OprFact::illegalOpr)
1714
    , _tmp4(LIR_OprFact::illegalOpr)
1715
    , _tmp5(LIR_OprFact::illegalOpr) {
1716
    assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1717
  }
1718

1719
  LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1720
          LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1721
    : LIR_Op(code, result, NULL)
1722
    , _opr1(opr1)
1723
    , _opr2(opr2)
1724
    , _type(T_ILLEGAL)
1725
    , _condition(lir_cond_unknown)
1726
    , _fpu_stack_size(0)
1727
    , _tmp1(tmp1)
1728
    , _tmp2(tmp2)
1729
    , _tmp3(tmp3)
1730
    , _tmp4(tmp4)
1731
    , _tmp5(tmp5) {
1732
    assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1733
  }
1734

1735
  LIR_Opr in_opr1() const                        { return _opr1; }
1736
  LIR_Opr in_opr2() const                        { return _opr2; }
1737
  BasicType type()  const                        { return _type; }
1738
  LIR_Opr tmp1_opr() const                       { return _tmp1; }
1739
  LIR_Opr tmp2_opr() const                       { return _tmp2; }
1740
  LIR_Opr tmp3_opr() const                       { return _tmp3; }
1741
  LIR_Opr tmp4_opr() const                       { return _tmp4; }
1742
  LIR_Opr tmp5_opr() const                       { return _tmp5; }
1743
  LIR_Condition condition() const  {
1744
    assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1745
  }
1746
  void set_condition(LIR_Condition condition) {
1747
    assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove");  _condition = condition;
1748
  }
1749

1750
  void set_fpu_stack_size(int size)              { _fpu_stack_size = size; }
1751
  int  fpu_stack_size() const                    { return _fpu_stack_size; }
1752

1753
  void set_in_opr1(LIR_Opr opr)                  { _opr1 = opr; }
1754
  void set_in_opr2(LIR_Opr opr)                  { _opr2 = opr; }
1755

1756
  virtual void emit_code(LIR_Assembler* masm);
1757
  virtual LIR_Op2* as_Op2() { return this; }
1758
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1759
};
1760

1761
class LIR_OpAllocArray : public LIR_Op {
1762
 friend class LIR_OpVisitState;
1763

1764
 private:
1765
  LIR_Opr   _klass;
1766
  LIR_Opr   _len;
1767
  LIR_Opr   _tmp1;
1768
  LIR_Opr   _tmp2;
1769
  LIR_Opr   _tmp3;
1770
  LIR_Opr   _tmp4;
1771
  BasicType _type;
1772
  CodeStub* _stub;
1773

1774
 public:
1775
  LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1776
    : LIR_Op(lir_alloc_array, result, NULL)
1777
    , _klass(klass)
1778
    , _len(len)
1779
    , _tmp1(t1)
1780
    , _tmp2(t2)
1781
    , _tmp3(t3)
1782
    , _tmp4(t4)
1783
    , _type(type)
1784
    , _stub(stub) {}
1785

1786
  LIR_Opr   klass()   const                      { return _klass;       }
1787
  LIR_Opr   len()     const                      { return _len;         }
1788
  LIR_Opr   obj()     const                      { return result_opr(); }
1789
  LIR_Opr   tmp1()    const                      { return _tmp1;        }
1790
  LIR_Opr   tmp2()    const                      { return _tmp2;        }
1791
  LIR_Opr   tmp3()    const                      { return _tmp3;        }
1792
  LIR_Opr   tmp4()    const                      { return _tmp4;        }
1793
  BasicType type()    const                      { return _type;        }
1794
  CodeStub* stub()    const                      { return _stub;        }
1795

1796
  virtual void emit_code(LIR_Assembler* masm);
1797
  virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1798
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1799
};
1800

1801

1802
class LIR_Op3: public LIR_Op {
1803
 friend class LIR_OpVisitState;
1804

1805
 private:
1806
  LIR_Opr _opr1;
1807
  LIR_Opr _opr2;
1808
  LIR_Opr _opr3;
1809
 public:
1810
  LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1811
    : LIR_Op(code, result, info)
1812
    , _opr1(opr1)
1813
    , _opr2(opr2)
1814
    , _opr3(opr3)                                { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1815
  LIR_Opr in_opr1() const                        { return _opr1; }
1816
  LIR_Opr in_opr2() const                        { return _opr2; }
1817
  LIR_Opr in_opr3() const                        { return _opr3; }
1818

1819
  virtual void emit_code(LIR_Assembler* masm);
1820
  virtual LIR_Op3* as_Op3() { return this; }
1821
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1822
};
1823

1824

1825
//--------------------------------
1826
class LabelObj: public CompilationResourceObj {
1827
 private:
1828
  Label _label;
1829
 public:
1830
  LabelObj()                                     {}
1831
  Label* label()                                 { return &_label; }
1832
};
1833

1834

1835
class LIR_OpLock: public LIR_Op {
1836
 friend class LIR_OpVisitState;
1837

1838
 private:
1839
  LIR_Opr _hdr;
1840
  LIR_Opr _obj;
1841
  LIR_Opr _lock;
1842
  LIR_Opr _scratch;
1843
  CodeStub* _stub;
1844
 public:
1845
  LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1846
    : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1847
    , _hdr(hdr)
1848
    , _obj(obj)
1849
    , _lock(lock)
1850
    , _scratch(scratch)
1851
    , _stub(stub)                      {}
1852

1853
  LIR_Opr hdr_opr() const                        { return _hdr; }
1854
  LIR_Opr obj_opr() const                        { return _obj; }
1855
  LIR_Opr lock_opr() const                       { return _lock; }
1856
  LIR_Opr scratch_opr() const                    { return _scratch; }
1857
  CodeStub* stub() const                         { return _stub; }
1858

1859
  virtual void emit_code(LIR_Assembler* masm);
1860
  virtual LIR_OpLock* as_OpLock() { return this; }
1861
  void print_instr(outputStream* out) const PRODUCT_RETURN;
1862
};
1863

1864

1865
class LIR_OpDelay: public LIR_Op {
1866
 friend class LIR_OpVisitState;
1867

1868
 private:
1869
  LIR_Op* _op;
1870

1871
 public:
1872
  LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1873
    LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1874
    _op(op) {
1875
    assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1876
  }
1877
  virtual void emit_code(LIR_Assembler* masm);
1878
  virtual LIR_OpDelay* as_OpDelay() { return this; }
1879
  void print_instr(outputStream* out) const PRODUCT_RETURN;
1880
  LIR_Op* delay_op() const { return _op; }
1881
  CodeEmitInfo* call_info() const { return info(); }
1882
};
1883

1884
#ifdef ASSERT
1885
// LIR_OpAssert
1886
class LIR_OpAssert : public LIR_Op2 {
1887
 friend class LIR_OpVisitState;
1888

1889
 private:
1890
  const char* _msg;
1891
  bool        _halt;
1892

1893
 public:
1894
  LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
1895
    : LIR_Op2(lir_assert, condition, opr1, opr2)
1896
    , _halt(halt)
1897
    , _msg(msg) {
1898
  }
1899

1900
  const char* msg() const                        { return _msg; }
1901
  bool        halt() const                       { return _halt; }
1902

1903
  virtual void emit_code(LIR_Assembler* masm);
1904
  virtual LIR_OpAssert* as_OpAssert()            { return this; }
1905
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1906
};
1907
#endif
1908

1909
// LIR_OpCompareAndSwap
1910
class LIR_OpCompareAndSwap : public LIR_Op {
1911
 friend class LIR_OpVisitState;
1912

1913
 private:
1914
  LIR_Opr _addr;
1915
  LIR_Opr _cmp_value;
1916
  LIR_Opr _new_value;
1917
  LIR_Opr _tmp1;
1918
  LIR_Opr _tmp2;
1919

1920
 public:
1921
  LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1922
                       LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
1923
    : LIR_Op(code, result, NULL)  // no result, no info
1924
    , _addr(addr)
1925
    , _cmp_value(cmp_value)
1926
    , _new_value(new_value)
1927
    , _tmp1(t1)
1928
    , _tmp2(t2)                                  { }
1929

1930
  LIR_Opr addr()        const                    { return _addr;  }
1931
  LIR_Opr cmp_value()   const                    { return _cmp_value; }
1932
  LIR_Opr new_value()   const                    { return _new_value; }
1933
  LIR_Opr tmp1()        const                    { return _tmp1;      }
1934
  LIR_Opr tmp2()        const                    { return _tmp2;      }
1935

1936
  virtual void emit_code(LIR_Assembler* masm);
1937
  virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1938
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1939
};
1940

1941
// LIR_OpProfileCall
1942
class LIR_OpProfileCall : public LIR_Op {
1943
 friend class LIR_OpVisitState;
1944

1945
 private:
1946
  ciMethod* _profiled_method;
1947
  int       _profiled_bci;
1948
  ciMethod* _profiled_callee;
1949
  LIR_Opr   _mdo;
1950
  LIR_Opr   _recv;
1951
  LIR_Opr   _tmp1;
1952
  ciKlass*  _known_holder;
1953

1954
 public:
1955
  // Destroys recv
1956
  LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1957
    : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL)  // no result, no info
1958
    , _profiled_method(profiled_method)
1959
    , _profiled_bci(profiled_bci)
1960
    , _profiled_callee(profiled_callee)
1961
    , _mdo(mdo)
1962
    , _recv(recv)
1963
    , _tmp1(t1)
1964
    , _known_holder(known_holder)                { }
1965

1966
  ciMethod* profiled_method() const              { return _profiled_method;  }
1967
  int       profiled_bci()    const              { return _profiled_bci;     }
1968
  ciMethod* profiled_callee() const              { return _profiled_callee;  }
1969
  LIR_Opr   mdo()             const              { return _mdo;              }
1970
  LIR_Opr   recv()            const              { return _recv;             }
1971
  LIR_Opr   tmp1()            const              { return _tmp1;             }
1972
  ciKlass*  known_holder()    const              { return _known_holder;     }
1973

1974
  virtual void emit_code(LIR_Assembler* masm);
1975
  virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1976
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1977
};
1978

1979
// LIR_OpProfileType
1980
class LIR_OpProfileType : public LIR_Op {
1981
 friend class LIR_OpVisitState;
1982

1983
 private:
1984
  LIR_Opr      _mdp;
1985
  LIR_Opr      _obj;
1986
  LIR_Opr      _tmp;
1987
  ciKlass*     _exact_klass;   // non NULL if we know the klass statically (no need to load it from _obj)
1988
  intptr_t     _current_klass; // what the profiling currently reports
1989
  bool         _not_null;      // true if we know statically that _obj cannot be null
1990
  bool         _no_conflict;   // true if we're profling parameters, _exact_klass is not NULL and we know
1991
                               // _exact_klass it the only possible type for this parameter in any context.
1992

1993
 public:
1994
  // Destroys recv
1995
  LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
1996
    : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL)  // no result, no info
1997
    , _mdp(mdp)
1998
    , _obj(obj)
1999
    , _exact_klass(exact_klass)
2000
    , _current_klass(current_klass)
2001
    , _tmp(tmp)
2002
    , _not_null(not_null)
2003
    , _no_conflict(no_conflict) { }
2004

2005
  LIR_Opr      mdp()              const             { return _mdp;              }
2006
  LIR_Opr      obj()              const             { return _obj;              }
2007
  LIR_Opr      tmp()              const             { return _tmp;              }
2008
  ciKlass*     exact_klass()      const             { return _exact_klass;      }
2009
  intptr_t     current_klass()    const             { return _current_klass;    }
2010
  bool         not_null()         const             { return _not_null;         }
2011
  bool         no_conflict()      const             { return _no_conflict;      }
2012

2013
  virtual void emit_code(LIR_Assembler* masm);
2014
  virtual LIR_OpProfileType* as_OpProfileType() { return this; }
2015
  virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2016
};
2017

2018
class LIR_InsertionBuffer;
2019

2020
//--------------------------------LIR_List---------------------------------------------------
2021
// Maintains a list of LIR instructions (one instance of LIR_List per basic block)
2022
// The LIR instructions are appended by the LIR_List class itself;
2023
//
2024
// Notes:
2025
// - all offsets are(should be) in bytes
2026
// - local positions are specified with an offset, with offset 0 being local 0
2027

2028
class LIR_List: public CompilationResourceObj {
2029
 private:
2030
  LIR_OpList  _operations;
2031

2032
  Compilation*  _compilation;
2033
#ifndef PRODUCT
2034
  BlockBegin*   _block;
2035
#endif
2036
#ifdef ASSERT
2037
  const char *  _file;
2038
  int           _line;
2039
#endif
2040

2041
  void append(LIR_Op* op) {
2042
    if (op->source() == NULL)
2043
      op->set_source(_compilation->current_instruction());
2044
#ifndef PRODUCT
2045
    if (PrintIRWithLIR) {
2046
      _compilation->maybe_print_current_instruction();
2047
      op->print(); tty->cr();
2048
    }
2049
#endif // PRODUCT
2050

2051
    _operations.append(op);
2052

2053
#ifdef ASSERT
2054
    op->verify();
2055
    op->set_file_and_line(_file, _line);
2056
    _file = NULL;
2057
    _line = 0;
2058
#endif
2059
  }
2060

2061
 public:
2062
  LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2063

2064
#ifdef ASSERT
2065
  void set_file_and_line(const char * file, int line);
2066
#endif
2067

2068
  //---------- accessors ---------------
2069
  LIR_OpList* instructions_list()                { return &_operations; }
2070
  int         length() const                     { return _operations.length(); }
2071
  LIR_Op*     at(int i) const                    { return _operations.at(i); }
2072

2073
  NOT_PRODUCT(BlockBegin* block() const          { return _block; });
2074

2075
  // insert LIR_Ops in buffer to right places in LIR_List
2076
  void append(LIR_InsertionBuffer* buffer);
2077

2078
  //---------- mutators ---------------
2079
  void insert_before(int i, LIR_List* op_list)   { _operations.insert_before(i, op_list->instructions_list()); }
2080
  void insert_before(int i, LIR_Op* op)          { _operations.insert_before(i, op); }
2081
  void remove_at(int i)                          { _operations.remove_at(i); }
2082

2083
  //---------- printing -------------
2084
  void print_instructions() PRODUCT_RETURN;
2085

2086

2087
  //---------- instructions -------------
2088
  void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2089
                        address dest, LIR_OprList* arguments,
2090
                        CodeEmitInfo* info) {
2091
    append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2092
  }
2093
  void call_static(ciMethod* method, LIR_Opr result,
2094
                   address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2095
    append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2096
  }
2097
  void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2098
                      address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2099
    append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2100
  }
2101
  void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2102
                    intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2103
    append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2104
  }
2105
  void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2106
                    address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2107
    append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2108
  }
2109

2110
  void get_thread(LIR_Opr result)                { append(new LIR_Op0(lir_get_thread, result)); }
2111
  void word_align()                              { append(new LIR_Op0(lir_word_align)); }
2112
  void membar()                                  { append(new LIR_Op0(lir_membar)); }
2113
  void membar_acquire()                          { append(new LIR_Op0(lir_membar_acquire)); }
2114
  void membar_release()                          { append(new LIR_Op0(lir_membar_release)); }
2115
  void membar_loadload()                         { append(new LIR_Op0(lir_membar_loadload)); }
2116
  void membar_storestore()                       { append(new LIR_Op0(lir_membar_storestore)); }
2117
  void membar_loadstore()                        { append(new LIR_Op0(lir_membar_loadstore)); }
2118
  void membar_storeload()                        { append(new LIR_Op0(lir_membar_storeload)); }
2119

2120
  void nop()                                     { append(new LIR_Op0(lir_nop)); }
2121
  void build_frame()                             { append(new LIR_Op0(lir_build_frame)); }
2122

2123
  void std_entry(LIR_Opr receiver)               { append(new LIR_Op0(lir_std_entry, receiver)); }
2124
  void osr_entry(LIR_Opr osrPointer)             { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2125

2126
  void branch_destination(Label* lbl)            { append(new LIR_OpLabel(lbl)); }
2127

2128
  void negate(LIR_Opr from, LIR_Opr to)          { append(new LIR_Op1(lir_neg, from, to)); }
2129
  void leal(LIR_Opr from, LIR_Opr result_reg, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_leal, from, result_reg, T_ILLEGAL, patch_code, info)); }
2130

2131
  // result is a stack location for old backend and vreg for UseLinearScan
2132
  // stack_loc_temp is an illegal register for old backend
2133
  void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
2134
  void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2135
  void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2136
  void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2137
  void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2138
  void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
2139
  void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
2140
  void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2141
    if (UseCompressedOops) {
2142
      append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2143
    } else {
2144
      move(src, dst, info);
2145
    }
2146
  }
2147
  void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2148
    if (UseCompressedOops) {
2149
      append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2150
    } else {
2151
      move(src, dst, info);
2152
    }
2153
  }
2154
  void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2155

2156
  void oop2reg  (jobject o, LIR_Opr reg)         { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),    reg));   }
2157
  void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2158

2159
  void metadata2reg  (Metadata* o, LIR_Opr reg)  { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg));   }
2160
  void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2161

2162
  void return_op(LIR_Opr result)                 { append(new LIR_Op1(lir_return, result)); }
2163

2164
  void safepoint(LIR_Opr tmp, CodeEmitInfo* info)  { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2165

2166
#ifdef PPC
2167
  void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2168
#endif
2169
#if defined(AARCH64)
2170
  void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst,
2171
               ConversionStub* stub = NULL, LIR_Opr tmp1 = LIR_OprDesc::illegalOpr()) {
2172
    append(new LIR_OpConvert(code, left, dst, stub, tmp1, LIR_OprDesc::illegalOpr()));
2173
  }
2174
#else
2175
  void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2176
#endif
2177

2178
  void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and,  left, right, dst)); }
2179
  void logical_or  (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or,   left, right, dst)); }
2180
  void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor,  left, right, dst)); }
2181

2182
  void   pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64,   src, dst, T_LONG, lir_patch_none, NULL)); }
2183
  void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2184

2185
  void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);
2186
  void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2187
    append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2188
  }
2189
  void unwind_exception(LIR_Opr exceptionOop) {
2190
    append(new LIR_Op1(lir_unwind, exceptionOop));
2191
  }
2192

2193
  void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2194
    append(new LIR_Op2(lir_compare_to,  left, right, dst));
2195
  }
2196

2197
  void push(LIR_Opr opr)                                   { append(new LIR_Op1(lir_push, opr)); }
2198
  void pop(LIR_Opr reg)                                    { append(new LIR_Op1(lir_pop,  reg)); }
2199

2200
  void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2201
    append(new LIR_Op2(lir_cmp, condition, left, right, info));
2202
  }
2203
  void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2204
    cmp(condition, left, LIR_OprFact::intConst(right), info);
2205
  }
2206

2207
  void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2208
  void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2209

2210
  void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2211
    append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2212
  }
2213

2214
  void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2215
                LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2216
  void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2217
               LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2218
  void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2219
               LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2220

2221
  void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2222
  void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2223
  void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_log,  from, LIR_OprFact::illegalOpr, to, tmp)); }
2224
  void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)              { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2225
  void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
2226
  void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
2227
  void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2228
  void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5)                { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); }
2229
  void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); }
2230

2231
  void add (LIR_Opr left, LIR_Opr right, LIR_Opr res)      { append(new LIR_Op2(lir_add, left, right, res)); }
2232
  void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2233
  void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2234
  void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2235
  void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL)      { append(new LIR_Op2(lir_div, left, right, res, info)); }
2236
  void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2237
  void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL)      { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2238

2239
  void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2240
  void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2241

2242
  void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2243

2244
  void prefetch(LIR_Address* addr, bool is_store);
2245

2246
  void store_mem_int(jint v,    LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2247
  void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2248
  void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2249
  void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2250
  void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2251

2252
  void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2253
  void idiv(LIR_Opr left, int   right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2254
  void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2255
  void irem(LIR_Opr left, int   right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2256

2257
  void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2258
  void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2259

2260
  // jump is an unconditional branch
2261
  void jump(BlockBegin* block) {
2262
    append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2263
  }
2264
  void jump(CodeStub* stub) {
2265
    append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2266
  }
2267
  void branch(LIR_Condition cond, BasicType type, Label* lbl)        { append(new LIR_OpBranch(cond, type, lbl)); }
2268
  void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2269
    assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2270
    append(new LIR_OpBranch(cond, type, block));
2271
  }
2272
  void branch(LIR_Condition cond, BasicType type, CodeStub* stub)    {
2273
    assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2274
    append(new LIR_OpBranch(cond, type, stub));
2275
  }
2276
  void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2277
    assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2278
    append(new LIR_OpBranch(cond, type, block, unordered));
2279
  }
2280

2281
  void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2282
  void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2283
  void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2284

2285
  void shift_left(LIR_Opr value, int count, LIR_Opr dst)       { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2286
  void shift_right(LIR_Opr value, int count, LIR_Opr dst)      { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2287
  void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2288

2289
  void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst)        { append(new LIR_Op2(lir_cmp_l2i,  left, right, dst)); }
2290
  void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2291

2292
  void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2293
    append(new LIR_OpRTCall(routine, tmp, result, arguments));
2294
  }
2295

2296
  void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2297
                    LIR_OprList* arguments, CodeEmitInfo* info) {
2298
    append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2299
  }
2300

2301
  void load_stack_address_monitor(int monitor_ix, LIR_Opr dst)  { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2302
  void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2303
  void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2304

2305
  void set_24bit_fpu()                                               { append(new LIR_Op0(lir_24bit_FPU )); }
2306
  void restore_fpu()                                                 { append(new LIR_Op0(lir_reset_FPU )); }
2307
  void breakpoint()                                                  { append(new LIR_Op0(lir_breakpoint)); }
2308

2309
  void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2310

2311
  void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)  { append(new LIR_OpUpdateCRC32(crc, val, res)); }
2312

2313
  void fpop_raw()                                { append(new LIR_Op0(lir_fpop_raw)); }
2314

2315
  void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2316
  void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2317

2318
  void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2319
                  LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2320
                  CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2321
                  ciMethod* profiled_method, int profiled_bci);
2322
  // MethodData* profiling
2323
  void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2324
    append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));
2325
  }
2326
  void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {
2327
    append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));
2328
  }
2329

2330
  void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }
2331
  void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }
2332
#ifdef ASSERT
2333
  void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }
2334
#endif
2335
};
2336

2337
void print_LIR(BlockList* blocks);
2338

2339
class LIR_InsertionBuffer : public CompilationResourceObj {
2340
 private:
2341
  LIR_List*   _lir;   // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2342

2343
  // list of insertion points. index and count are stored alternately:
2344
  // _index_and_count[i * 2]:     the index into lir list where "count" ops should be inserted
2345
  // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2346
  intStack    _index_and_count;
2347

2348
  // the LIR_Ops to be inserted
2349
  LIR_OpList  _ops;
2350

2351
  void append_new(int index, int count)  { _index_and_count.append(index); _index_and_count.append(count); }
2352
  void set_index_at(int i, int value)    { _index_and_count.at_put((i << 1),     value); }
2353
  void set_count_at(int i, int value)    { _index_and_count.at_put((i << 1) + 1, value); }
2354

2355
#ifdef ASSERT
2356
  void verify();
2357
#endif
2358
 public:
2359
  LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2360

2361
  // must be called before using the insertion buffer
2362
  void init(LIR_List* lir)  { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2363
  bool initialized() const  { return _lir != NULL; }
2364
  // called automatically when the buffer is appended to the LIR_List
2365
  void finish()             { _lir = NULL; }
2366

2367
  // accessors
2368
  LIR_List*  lir_list() const             { return _lir; }
2369
  int number_of_insertion_points() const  { return _index_and_count.length() >> 1; }
2370
  int index_at(int i) const               { return _index_and_count.at((i << 1));     }
2371
  int count_at(int i) const               { return _index_and_count.at((i << 1) + 1); }
2372

2373
  int number_of_ops() const               { return _ops.length(); }
2374
  LIR_Op* op_at(int i) const              { return _ops.at(i); }
2375

2376
  // append an instruction to the buffer
2377
  void append(int index, LIR_Op* op);
2378

2379
  // instruction
2380
  void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2381
};
2382

2383

2384
//
2385
// LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2386
// Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2387
// information about the input, output and temporaries used by the
2388
// op to be recorded.  It also records whether the op has call semantics
2389
// and also records all the CodeEmitInfos used by this op.
2390
//
2391

2392

2393
class LIR_OpVisitState: public StackObj {
2394
 public:
2395
  typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2396

2397
  enum {
2398
    maxNumberOfOperands = 20,
2399
    maxNumberOfInfos = 4
2400
  };
2401

2402
 private:
2403
  LIR_Op*          _op;
2404

2405
  // optimization: the operands and infos are not stored in a variable-length
2406
  //               list, but in a fixed-size array to save time of size checks and resizing
2407
  int              _oprs_len[numModes];
2408
  LIR_Opr*         _oprs_new[numModes][maxNumberOfOperands];
2409
  int _info_len;
2410
  CodeEmitInfo*    _info_new[maxNumberOfInfos];
2411

2412
  bool             _has_call;
2413
  bool             _has_slow_case;
2414

2415

2416
  // only include register operands
2417
  // addresses are decomposed to the base and index registers
2418
  // constants and stack operands are ignored
2419
  void append(LIR_Opr& opr, OprMode mode) {
2420
    assert(opr->is_valid(), "should not call this otherwise");
2421
    assert(mode >= 0 && mode < numModes, "bad mode");
2422

2423
    if (opr->is_register()) {
2424
       assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2425
      _oprs_new[mode][_oprs_len[mode]++] = &opr;
2426

2427
    } else if (opr->is_pointer()) {
2428
      LIR_Address* address = opr->as_address_ptr();
2429
      if (address != NULL) {
2430
        // special handling for addresses: add base and index register of the address
2431
        // both are always input operands or temp if we want to extend
2432
        // their liveness!
2433
        if (mode == outputMode) {
2434
          mode = inputMode;
2435
        }
2436
        assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");
2437
        if (address->_base->is_valid()) {
2438
          assert(address->_base->is_register(), "must be");
2439
          assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2440
          _oprs_new[mode][_oprs_len[mode]++] = &address->_base;
2441
        }
2442
        if (address->_index->is_valid()) {
2443
          assert(address->_index->is_register(), "must be");
2444
          assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2445
          _oprs_new[mode][_oprs_len[mode]++] = &address->_index;
2446
        }
2447

2448
      } else {
2449
        assert(opr->is_constant(), "constant operands are not processed");
2450
      }
2451
    } else {
2452
      assert(opr->is_stack(), "stack operands are not processed");
2453
    }
2454
  }
2455

2456
  void append(CodeEmitInfo* info) {
2457
    assert(info != NULL, "should not call this otherwise");
2458
    assert(_info_len < maxNumberOfInfos, "array overflow");
2459
    _info_new[_info_len++] = info;
2460
  }
2461

2462
 public:
2463
  LIR_OpVisitState()         { reset(); }
2464

2465
  LIR_Op* op() const         { return _op; }
2466
  void set_op(LIR_Op* op)    { reset(); _op = op; }
2467

2468
  bool has_call() const      { return _has_call; }
2469
  bool has_slow_case() const { return _has_slow_case; }
2470

2471
  void reset() {
2472
    _op = NULL;
2473
    _has_call = false;
2474
    _has_slow_case = false;
2475

2476
    _oprs_len[inputMode] = 0;
2477
    _oprs_len[tempMode] = 0;
2478
    _oprs_len[outputMode] = 0;
2479
    _info_len = 0;
2480
  }
2481

2482

2483
  int opr_count(OprMode mode) const {
2484
    assert(mode >= 0 && mode < numModes, "bad mode");
2485
    return _oprs_len[mode];
2486
  }
2487

2488
  LIR_Opr opr_at(OprMode mode, int index) const {
2489
    assert(mode >= 0 && mode < numModes, "bad mode");
2490
    assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2491
    return *_oprs_new[mode][index];
2492
  }
2493

2494
  void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2495
    assert(mode >= 0 && mode < numModes, "bad mode");
2496
    assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2497
    *_oprs_new[mode][index] = opr;
2498
  }
2499

2500
  int info_count() const {
2501
    return _info_len;
2502
  }
2503

2504
  CodeEmitInfo* info_at(int index) const {
2505
    assert(index < _info_len, "index out of bounds");
2506
    return _info_new[index];
2507
  }
2508

2509
  XHandlers* all_xhandler();
2510

2511
  // collects all register operands of the instruction
2512
  void visit(LIR_Op* op);
2513

2514
#ifdef ASSERT
2515
  // check that an operation has no operands
2516
  bool no_operands(LIR_Op* op);
2517
#endif
2518

2519
  // LIR_Op visitor functions use these to fill in the state
2520
  void do_input(LIR_Opr& opr)             { append(opr, LIR_OpVisitState::inputMode); }
2521
  void do_output(LIR_Opr& opr)            { append(opr, LIR_OpVisitState::outputMode); }
2522
  void do_temp(LIR_Opr& opr)              { append(opr, LIR_OpVisitState::tempMode); }
2523
  void do_info(CodeEmitInfo* info)        { append(info); }
2524

2525
  void do_stub(CodeStub* stub);
2526
  void do_call()                          { _has_call = true; }
2527
  void do_slow_case()                     { _has_slow_case = true; }
2528
  void do_slow_case(CodeEmitInfo* info) {
2529
    _has_slow_case = true;
2530
    append(info);
2531
  }
2532
};
2533

2534

2535
inline LIR_Opr LIR_OprDesc::illegalOpr()   { return LIR_OprFact::illegalOpr; };
2536

2537
#endif // SHARE_VM_C1_C1_LIR_HPP
2538

2539
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