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PojavLauncherTeam
GitHub Repository: PojavLauncherTeam/openjdk-multiarch-jdk8u
Path: blob/aarch64-shenandoah-jdk8u272-b10/hotspot/src/share/vm/gc_implementation/shenandoah/c1/shenandoahBarrierSetC1.cpp
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/*
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* Copyright (c) 2018, 2020 Red Hat, Inc. All rights reserved.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#include "precompiled.hpp"
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#include "c1/c1_LIRGenerator.hpp"
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#include "c1/c1_IR.hpp"
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#include "gc_implementation/g1/satbQueue.hpp"
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#include "gc_implementation/shenandoah/shenandoahForwarding.hpp"
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#include "gc_implementation/shenandoah/shenandoahHeap.inline.hpp"
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#include "gc_implementation/shenandoah/shenandoahHeapRegion.hpp"
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#include "gc_implementation/shenandoah/c1/shenandoahBarrierSetC1.hpp"
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#ifdef TARGET_ARCH_aarch64
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#include "shenandoahBarrierSetAssembler_aarch64.hpp"
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#endif
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#ifdef TARGET_ARCH_x86
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#include "shenandoahBarrierSetAssembler_x86.hpp"
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#endif
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#ifdef ASSERT
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#define __ gen->lir(__FILE__, __LINE__)->
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#else
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#define __ gen->lir()->
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#endif
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void ShenandoahLoadReferenceBarrierStub::emit_code(LIR_Assembler* ce) {
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ShenandoahBarrierSetAssembler* bs = ShenandoahBarrierSetAssembler::bsasm();
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bs->gen_load_reference_barrier_stub(ce, this);
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}
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ShenandoahBarrierSetC1* ShenandoahBarrierSetC1::bsc1() {
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return ShenandoahBarrierSet::barrier_set()->bsc1();
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}
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LIR_Opr ShenandoahBarrierSetC1::load_reference_barrier(LIRGenerator* gen, LIR_Opr obj, LIR_Opr addr) {
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if (ShenandoahLoadRefBarrier) {
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return load_reference_barrier_impl(gen, obj, addr);
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} else {
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return obj;
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}
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}
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LIR_Opr ShenandoahBarrierSetC1::load_reference_barrier_impl(LIRGenerator* gen, LIR_Opr obj, LIR_Opr addr) {
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assert(ShenandoahLoadRefBarrier, "Should be enabled");
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obj = ensure_in_register(gen, obj, T_OBJECT);
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assert(obj->is_register(), "must be a register at this point");
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addr = ensure_in_register(gen, addr, T_ADDRESS);
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assert(addr->is_register(), "must be a register at this point");
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LIR_Opr result = gen->result_register_for(obj->value_type());
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__ move(obj, result);
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LIR_Opr tmp1 = gen->new_register(T_ADDRESS);
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LIR_Opr tmp2 = gen->new_register(T_ADDRESS);
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LIR_Opr thrd = gen->getThreadPointer();
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LIR_Address* active_flag_addr =
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new LIR_Address(thrd,
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in_bytes(JavaThread::gc_state_offset()),
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T_BYTE);
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// Read and check the gc-state-flag.
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LIR_Opr flag_val = gen->new_register(T_INT);
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__ load(active_flag_addr, flag_val);
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LIR_Opr mask = LIR_OprFact::intConst(ShenandoahHeap::HAS_FORWARDED |
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ShenandoahHeap::EVACUATION);
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LIR_Opr mask_reg = gen->new_register(T_INT);
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__ move(mask, mask_reg);
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if (TwoOperandLIRForm) {
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__ logical_and(flag_val, mask_reg, flag_val);
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} else {
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LIR_Opr masked_flag = gen->new_register(T_INT);
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__ logical_and(flag_val, mask_reg, masked_flag);
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flag_val = masked_flag;
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}
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__ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0));
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CodeStub* slow = new ShenandoahLoadReferenceBarrierStub(obj, addr, result, tmp1, tmp2);
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__ branch(lir_cond_notEqual, T_INT, slow);
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__ branch_destination(slow->continuation());
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return result;
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}
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LIR_Opr ShenandoahBarrierSetC1::ensure_in_register(LIRGenerator* gen, LIR_Opr obj, BasicType type) {
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if (!obj->is_register()) {
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LIR_Opr obj_reg;
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if (obj->is_constant()) {
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obj_reg = gen->new_register(type);
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__ move(obj, obj_reg);
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} else {
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obj_reg = gen->new_pointer_register();
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__ leal(obj, obj_reg);
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}
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obj = obj_reg;
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}
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return obj;
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}
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LIR_Opr ShenandoahBarrierSetC1::storeval_barrier(LIRGenerator* gen, LIR_Opr obj, CodeEmitInfo* info, bool patch) {
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if (ShenandoahStoreValEnqueueBarrier) {
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obj = ensure_in_register(gen, obj, T_OBJECT);
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gen->G1SATBCardTableModRef_pre_barrier(LIR_OprFact::illegalOpr, obj, false, false, NULL);
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}
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return obj;
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}
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LIR_Opr ShenandoahBarrierSetC1::resolve_address(LIRGenerator* gen, LIR_Address* addr, BasicType type, CodeEmitInfo* patch_emit_info) {
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LIR_Opr addr_opr = LIR_OprFact::address(addr);
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LIR_Opr resolved_addr = gen->new_pointer_register();
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if (patch_emit_info != NULL) {
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__ leal(addr_opr, resolved_addr, lir_patch_normal, new CodeEmitInfo(patch_emit_info));
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} else {
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__ leal(addr_opr, resolved_addr);
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}
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return LIR_OprFact::address(new LIR_Address(resolved_addr, type));
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}
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