Path: blob/master/Documentation/DMA-attributes.txt
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DMA attributes1==============23This document describes the semantics of the DMA attributes that are4defined in linux/dma-attrs.h.56DMA_ATTR_WRITE_BARRIER7----------------------89DMA_ATTR_WRITE_BARRIER is a (write) barrier attribute for DMA. DMA10to a memory region with the DMA_ATTR_WRITE_BARRIER attribute forces11all pending DMA writes to complete, and thus provides a mechanism to12strictly order DMA from a device across all intervening busses and13bridges. This barrier is not specific to a particular type of14interconnect, it applies to the system as a whole, and so its15implementation must account for the idiosyncracies of the system all16the way from the DMA device to memory.1718As an example of a situation where DMA_ATTR_WRITE_BARRIER would be19useful, suppose that a device does a DMA write to indicate that data is20ready and available in memory. The DMA of the "completion indication"21could race with data DMA. Mapping the memory used for completion22indications with DMA_ATTR_WRITE_BARRIER would prevent the race.2324DMA_ATTR_WEAK_ORDERING25----------------------2627DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping28may be weakly ordered, that is that reads and writes may pass each other.2930Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,31those that do not will simply ignore the attribute and exhibit default32behavior.333435