/*1* linux/arch/alpha/kernel/es1888.c2*3* Init the built-in ES1888 sound chip (SB16 compatible)4*/56#include <linux/init.h>7#include <asm/io.h>8#include "proto.h"910void __init11es1888_init(void)12{13/* Sequence of IO reads to init the audio controller */14inb(0x0229);15inb(0x0229);16inb(0x0229);17inb(0x022b);18inb(0x0229);19inb(0x022b);20inb(0x0229);21inb(0x0229);22inb(0x022b);23inb(0x0229);24inb(0x0220); /* This sets the base address to 0x220 */2526/* Sequence to set DMA channels */27outb(0x01, 0x0226); /* reset */28inb(0x0226); /* pause */29outb(0x00, 0x0226); /* release reset */30while (!(inb(0x022e) & 0x80)) /* wait for bit 7 to assert*/31continue;32inb(0x022a); /* pause */33outb(0xc6, 0x022c); /* enable extended mode */34inb(0x022a); /* pause, also forces the write */35while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */36continue;37outb(0xb1, 0x022c); /* setup for write to Interrupt CR */38while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */39continue;40outb(0x14, 0x022c); /* set IRQ 5 */41while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */42continue;43outb(0xb2, 0x022c); /* setup for write to DMA CR */44while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */45continue;46outb(0x18, 0x022c); /* set DMA channel 1 */47inb(0x022c); /* force the write */48}495051