Path: blob/master/arch/alpha/kernel/machvec_impl.h
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/*1* linux/arch/alpha/kernel/machvec_impl.h2*3* Copyright (C) 1997, 1998 Richard Henderson4*5* This file has goodies to help simplify instantiation of machine vectors.6*/78#include <asm/pgalloc.h>910/* Whee. These systems don't have an HAE:11IRONGATE, MARVEL, POLARIS, TSUNAMI, TITAN, WILDFIRE12Fix things up for the GENERIC kernel by defining the HAE address13to be that of the cache. Now we can read and write it as we like. ;-) */14#define IRONGATE_HAE_ADDRESS (&alpha_mv.hae_cache)15#define MARVEL_HAE_ADDRESS (&alpha_mv.hae_cache)16#define POLARIS_HAE_ADDRESS (&alpha_mv.hae_cache)17#define TSUNAMI_HAE_ADDRESS (&alpha_mv.hae_cache)18#define TITAN_HAE_ADDRESS (&alpha_mv.hae_cache)19#define WILDFIRE_HAE_ADDRESS (&alpha_mv.hae_cache)2021#ifdef CIA_ONE_HAE_WINDOW22#define CIA_HAE_ADDRESS (&alpha_mv.hae_cache)23#endif24#ifdef MCPCIA_ONE_HAE_WINDOW25#define MCPCIA_HAE_ADDRESS (&alpha_mv.hae_cache)26#endif27#ifdef T2_ONE_HAE_WINDOW28#define T2_HAE_ADDRESS (&alpha_mv.hae_cache)29#endif3031/* Only a few systems don't define IACK_SC, handling all interrupts through32the SRM console. But splitting out that one case from IO() below33seems like such a pain. Define this to get things to compile. */34#define JENSEN_IACK_SC 135#define T2_IACK_SC 136#define WILDFIRE_IACK_SC 1 /* FIXME */3738/*39* Some helpful macros for filling in the blanks.40*/4142#define CAT1(x,y) x##y43#define CAT(x,y) CAT1(x,y)4445#define DO_DEFAULT_RTC \46.rtc_port = 0x70, \47.rtc_get_time = common_get_rtc_time, \48.rtc_set_time = common_set_rtc_time4950#define DO_EV4_MMU \51.max_asn = EV4_MAX_ASN, \52.mv_switch_mm = ev4_switch_mm, \53.mv_activate_mm = ev4_activate_mm, \54.mv_flush_tlb_current = ev4_flush_tlb_current, \55.mv_flush_tlb_current_page = ev4_flush_tlb_current_page5657#define DO_EV5_MMU \58.max_asn = EV5_MAX_ASN, \59.mv_switch_mm = ev5_switch_mm, \60.mv_activate_mm = ev5_activate_mm, \61.mv_flush_tlb_current = ev5_flush_tlb_current, \62.mv_flush_tlb_current_page = ev5_flush_tlb_current_page6364#define DO_EV6_MMU \65.max_asn = EV6_MAX_ASN, \66.mv_switch_mm = ev5_switch_mm, \67.mv_activate_mm = ev5_activate_mm, \68.mv_flush_tlb_current = ev5_flush_tlb_current, \69.mv_flush_tlb_current_page = ev5_flush_tlb_current_page7071#define DO_EV7_MMU \72.max_asn = EV6_MAX_ASN, \73.mv_switch_mm = ev5_switch_mm, \74.mv_activate_mm = ev5_activate_mm, \75.mv_flush_tlb_current = ev5_flush_tlb_current, \76.mv_flush_tlb_current_page = ev5_flush_tlb_current_page7778#define IO_LITE(UP,low) \79.hae_register = (unsigned long *) CAT(UP,_HAE_ADDRESS), \80.iack_sc = CAT(UP,_IACK_SC), \81.mv_ioread8 = CAT(low,_ioread8), \82.mv_ioread16 = CAT(low,_ioread16), \83.mv_ioread32 = CAT(low,_ioread32), \84.mv_iowrite8 = CAT(low,_iowrite8), \85.mv_iowrite16 = CAT(low,_iowrite16), \86.mv_iowrite32 = CAT(low,_iowrite32), \87.mv_readb = CAT(low,_readb), \88.mv_readw = CAT(low,_readw), \89.mv_readl = CAT(low,_readl), \90.mv_readq = CAT(low,_readq), \91.mv_writeb = CAT(low,_writeb), \92.mv_writew = CAT(low,_writew), \93.mv_writel = CAT(low,_writel), \94.mv_writeq = CAT(low,_writeq), \95.mv_ioportmap = CAT(low,_ioportmap), \96.mv_ioremap = CAT(low,_ioremap), \97.mv_iounmap = CAT(low,_iounmap), \98.mv_is_ioaddr = CAT(low,_is_ioaddr), \99.mv_is_mmio = CAT(low,_is_mmio) \100101#define IO(UP,low) \102IO_LITE(UP,low), \103.pci_ops = &CAT(low,_pci_ops), \104.mv_pci_tbi = CAT(low,_pci_tbi)105106#define DO_APECS_IO IO(APECS,apecs)107#define DO_CIA_IO IO(CIA,cia)108#define DO_IRONGATE_IO IO(IRONGATE,irongate)109#define DO_LCA_IO IO(LCA,lca)110#define DO_MARVEL_IO IO(MARVEL,marvel)111#define DO_MCPCIA_IO IO(MCPCIA,mcpcia)112#define DO_POLARIS_IO IO(POLARIS,polaris)113#define DO_T2_IO IO(T2,t2)114#define DO_TSUNAMI_IO IO(TSUNAMI,tsunami)115#define DO_TITAN_IO IO(TITAN,titan)116#define DO_WILDFIRE_IO IO(WILDFIRE,wildfire)117118#define DO_PYXIS_IO IO_LITE(CIA,cia_bwx), \119.pci_ops = &cia_pci_ops, \120.mv_pci_tbi = cia_pci_tbi121122/*123* In a GENERIC kernel, we have lots of these vectors floating about,124* all but one of which we want to go away. In a non-GENERIC kernel,125* we want only one, ever.126*127* Accomplish this in the GENERIC kernel by putting all of the vectors128* in the .init.data section where they'll go away. We'll copy the129* one we want to the real alpha_mv vector in setup_arch.130*131* Accomplish this in a non-GENERIC kernel by ifdef'ing out all but132* one of the vectors, which will not reside in .init.data. We then133* alias this one vector to alpha_mv, so no copy is needed.134*135* Upshot: set __initdata to nothing for non-GENERIC kernels.136*/137138#ifdef CONFIG_ALPHA_GENERIC139#define __initmv __initdata140#define ALIAS_MV(x)141#else142#define __initmv __initdata_refok143144/* GCC actually has a syntax for defining aliases, but is under some145delusion that you shouldn't be able to declare it extern somewhere146else beforehand. Fine. We'll do it ourselves. */147#if 0148#define ALIAS_MV(system) \149struct alpha_machine_vector alpha_mv __attribute__((alias(#system "_mv")));150#else151#define ALIAS_MV(system) \152asm(".global alpha_mv\nalpha_mv = " #system "_mv");153#endif154#endif /* GENERIC */155156157