Path: blob/master/arch/arm/boot/compressed/head-shark.S
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/* The head-file for the Shark1* by Alexander Schulz2*3* Does the following:4* - get the memory layout from firmware. This can only be done as long as the mmu5* is still on.6* - switch the mmu off, so we have physical addresses7* - copy the kernel to 0x08508000. This is done to have a fixed address where the8* C-parts (misc.c) are executed. This address must be known at compile-time,9* but the load-address of the kernel depends on how much memory is installed.10* - Jump to this location.11* - Set r8 with 0, r7 with the architecture ID for head.S12*/1314#include <linux/linkage.h>1516#include <asm/assembler.h>1718.section ".start", "ax"1920b __beginning2122__ofw_data: .long 0 @ the number of memory blocks23.space 128 @ (startaddr,size) ...24.space 128 @ bootargs25.align2627__beginning: mov r4, r0 @ save the entry to the firmware2829mov r0, #0xC0 @ disable irq and fiq30mov r1, r031mrs r3, cpsr32bic r2, r3, r033eor r2, r2, r134msr cpsr_c, r23536mov r0, r4 @ get the Memory layout from firmware37adr r1, __ofw_data38add r2, r1, #439mov lr, pc40b ofw_init41mov r1, #04243adr r2, __mmu_off @ calculate physical address44sub r2, r2, #0xf0000000 @ openprom maps us at f000 virt, 0e50 phys45adr r0, __ofw_data46ldr r0, [r0, #4]47add r2, r2, r048add r2, r2, #0x005000004950mrc p15, 0, r3, c1, c051bic r3, r3, #0xC @ Write Buffer and DCache52bic r3, r3, #0x1000 @ ICache53mcr p15, 0, r3, c1, c0 @ disabled5455mov r0, #056mcr p15, 0, r0, c7, c7 @ flush I,D caches on v457mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v458mcr p15, 0, r0, c8, c7 @ flush I,D TLBs on v45960bic r3, r3, #0x1 @ MMU61mcr p15, 0, r3, c1, c0 @ disabled6263mov pc, r26465__copy_target: .long 0x08507FFC66__copy_end: .long 0x08607FFC6768.word _start69.word __bss_start7071.align72__temp_stack: .space 1287374__mmu_off:75adr r0, __ofw_data @ read the 1. entry of the memory map76ldr r0, [r0, #4]77orr r0, r0, #0x0060000078sub r0, r0, #47980ldr r1, __copy_end81ldr r3, __copy_target8283/* r0 = 0x0e600000 (current end of kernelcode)84* r3 = 0x08508000 (where it should begin)85* r1 = 0x08608000 (end of copying area, 1MB)86* The kernel is compressed, so 1 MB should be enough.87* copy the kernel to the beginning of physical memory88* We start from the highest address, so we can copy89* from 0x08500000 to 0x08508000 if we have only 8MB90*/9192/* As we get more 2.6-kernels it gets more and more93* uncomfortable to be bound to kernel images of 1MB only.94* So we add a loop here, to be able to copy some more.95* Alexander Schulz 2005-07-1796*/9798mov r4, #3 @ How many megabytes to copy99100101__MoveCode: sub r4, r4, #1102103__Copy: ldr r2, [r0], #-4104str r2, [r1], #-4105teq r1, r3106bne __Copy107108/* The firmware maps us in blocks of 1 MB, the next block is109_below_ the last one. So our decrementing source pointer110ist right here, but the destination pointer must be increased111by 2 MB */112add r1, r1, #0x00200000113add r3, r3, #0x00100000114115teq r4, #0116bne __MoveCode117118119/* and jump to it */120adr r2, __go_on @ where we want to jump121adr r0, __ofw_data @ read the 1. entry of the memory map122ldr r0, [r0, #4]123sub r2, r2, r0 @ we are mapped add 0e50 now, sub that (-0e00)124sub r2, r2, #0x00500000 @ -0050125ldr r0, __copy_target @ and add 0850 8000 instead126add r0, r0, #4127add r2, r2, r0128mov pc, r2 @ and jump there129130__go_on:131adr sp, __temp_stack132add sp, sp, #128133adr r0, __ofw_data134mov lr, pc135b create_params136137mov r8, #0138mov r7, #15139140141