Path: blob/master/arch/arm/include/asm/dma-mapping.h
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#ifndef ASMARM_DMA_MAPPING_H1#define ASMARM_DMA_MAPPING_H23#ifdef __KERNEL__45#include <linux/mm_types.h>6#include <linux/scatterlist.h>7#include <linux/dma-debug.h>89#include <asm-generic/dma-coherent.h>10#include <asm/memory.h>1112#ifdef __arch_page_to_dma13#error Please update to __arch_pfn_to_dma14#endif1516/*17* dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private18* functions used internally by the DMA-mapping API to provide DMA19* addresses. They must not be used by drivers.20*/21#ifndef __arch_pfn_to_dma22static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)23{24return (dma_addr_t)__pfn_to_bus(pfn);25}2627static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)28{29return __bus_to_pfn(addr);30}3132static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)33{34return (void *)__bus_to_virt(addr);35}3637static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)38{39return (dma_addr_t)__virt_to_bus((unsigned long)(addr));40}41#else42static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)43{44return __arch_pfn_to_dma(dev, pfn);45}4647static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)48{49return __arch_dma_to_pfn(dev, addr);50}5152static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)53{54return __arch_dma_to_virt(dev, addr);55}5657static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)58{59return __arch_virt_to_dma(dev, addr);60}61#endif6263/*64* The DMA API is built upon the notion of "buffer ownership". A buffer65* is either exclusively owned by the CPU (and therefore may be accessed66* by it) or exclusively owned by the DMA device. These helper functions67* represent the transitions between these two ownership states.68*69* Note, however, that on later ARMs, this notion does not work due to70* speculative prefetches. We model our approach on the assumption that71* the CPU does do speculative prefetches, which means we clean caches72* before transfers and delay cache invalidation until transfer completion.73*74* Private support functions: these are not part of the API and are75* liable to change. Drivers must not use these.76*/77static inline void __dma_single_cpu_to_dev(const void *kaddr, size_t size,78enum dma_data_direction dir)79{80extern void ___dma_single_cpu_to_dev(const void *, size_t,81enum dma_data_direction);8283if (!arch_is_coherent())84___dma_single_cpu_to_dev(kaddr, size, dir);85}8687static inline void __dma_single_dev_to_cpu(const void *kaddr, size_t size,88enum dma_data_direction dir)89{90extern void ___dma_single_dev_to_cpu(const void *, size_t,91enum dma_data_direction);9293if (!arch_is_coherent())94___dma_single_dev_to_cpu(kaddr, size, dir);95}9697static inline void __dma_page_cpu_to_dev(struct page *page, unsigned long off,98size_t size, enum dma_data_direction dir)99{100extern void ___dma_page_cpu_to_dev(struct page *, unsigned long,101size_t, enum dma_data_direction);102103if (!arch_is_coherent())104___dma_page_cpu_to_dev(page, off, size, dir);105}106107static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off,108size_t size, enum dma_data_direction dir)109{110extern void ___dma_page_dev_to_cpu(struct page *, unsigned long,111size_t, enum dma_data_direction);112113if (!arch_is_coherent())114___dma_page_dev_to_cpu(page, off, size, dir);115}116117/*118* Return whether the given device DMA address mask can be supported119* properly. For example, if your device can only drive the low 24-bits120* during bus mastering, then you would pass 0x00ffffff as the mask121* to this function.122*123* FIXME: This should really be a platform specific issue - we should124* return false if GFP_DMA allocations may not satisfy the supplied 'mask'.125*/126static inline int dma_supported(struct device *dev, u64 mask)127{128if (mask < ISA_DMA_THRESHOLD)129return 0;130return 1;131}132133static inline int dma_set_mask(struct device *dev, u64 dma_mask)134{135#ifdef CONFIG_DMABOUNCE136if (dev->archdata.dmabounce) {137if (dma_mask >= ISA_DMA_THRESHOLD)138return 0;139else140return -EIO;141}142#endif143if (!dev->dma_mask || !dma_supported(dev, dma_mask))144return -EIO;145146*dev->dma_mask = dma_mask;147148return 0;149}150151/*152* DMA errors are defined by all-bits-set in the DMA address.153*/154static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)155{156return dma_addr == ~0;157}158159/*160* Dummy noncoherent implementation. We don't provide a dma_cache_sync161* function so drivers using this API are highlighted with build warnings.162*/163static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,164dma_addr_t *handle, gfp_t gfp)165{166return NULL;167}168169static inline void dma_free_noncoherent(struct device *dev, size_t size,170void *cpu_addr, dma_addr_t handle)171{172}173174/**175* dma_alloc_coherent - allocate consistent memory for DMA176* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices177* @size: required memory size178* @handle: bus-specific DMA address179*180* Allocate some uncached, unbuffered memory for a device for181* performing DMA. This function allocates pages, and will182* return the CPU-viewed address, and sets @handle to be the183* device-viewed address.184*/185extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);186187/**188* dma_free_coherent - free memory allocated by dma_alloc_coherent189* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices190* @size: size of memory originally requested in dma_alloc_coherent191* @cpu_addr: CPU-view address returned from dma_alloc_coherent192* @handle: device-view address returned from dma_alloc_coherent193*194* Free (and unmap) a DMA buffer previously allocated by195* dma_alloc_coherent().196*197* References to memory and mappings associated with cpu_addr/handle198* during and after this call executing are illegal.199*/200extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);201202/**203* dma_mmap_coherent - map a coherent DMA allocation into user space204* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices205* @vma: vm_area_struct describing requested user mapping206* @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent207* @handle: device-view address returned from dma_alloc_coherent208* @size: size of memory originally requested in dma_alloc_coherent209*210* Map a coherent DMA buffer previously allocated by dma_alloc_coherent211* into user space. The coherent DMA buffer must not be freed by the212* driver until the user space mapping has been released.213*/214int dma_mmap_coherent(struct device *, struct vm_area_struct *,215void *, dma_addr_t, size_t);216217218/**219* dma_alloc_writecombine - allocate writecombining memory for DMA220* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices221* @size: required memory size222* @handle: bus-specific DMA address223*224* Allocate some uncached, buffered memory for a device for225* performing DMA. This function allocates pages, and will226* return the CPU-viewed address, and sets @handle to be the227* device-viewed address.228*/229extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,230gfp_t);231232#define dma_free_writecombine(dev,size,cpu_addr,handle) \233dma_free_coherent(dev,size,cpu_addr,handle)234235int dma_mmap_writecombine(struct device *, struct vm_area_struct *,236void *, dma_addr_t, size_t);237238239#ifdef CONFIG_DMABOUNCE240/*241* For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"242* and utilize bounce buffers as needed to work around limited DMA windows.243*244* On the SA-1111, a bug limits DMA to only certain regions of RAM.245* On the IXP425, the PCI inbound window is 64MB (256MB total RAM)246* On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)247*248* The following are helper functions used by the dmabounce subystem249*250*/251252/**253* dmabounce_register_dev254*255* @dev: valid struct device pointer256* @small_buf_size: size of buffers to use with small buffer pool257* @large_buf_size: size of buffers to use with large buffer pool (can be 0)258*259* This function should be called by low-level platform code to register260* a device as requireing DMA buffer bouncing. The function will allocate261* appropriate DMA pools for the device.262*263*/264extern int dmabounce_register_dev(struct device *, unsigned long,265unsigned long);266267/**268* dmabounce_unregister_dev269*270* @dev: valid struct device pointer271*272* This function should be called by low-level platform code when device273* that was previously registered with dmabounce_register_dev is removed274* from the system.275*276*/277extern void dmabounce_unregister_dev(struct device *);278279/**280* dma_needs_bounce281*282* @dev: valid struct device pointer283* @dma_handle: dma_handle of unbounced buffer284* @size: size of region being mapped285*286* Platforms that utilize the dmabounce mechanism must implement287* this function.288*289* The dmabounce routines call this function whenever a dma-mapping290* is requested to determine whether a given buffer needs to be bounced291* or not. The function must return 0 if the buffer is OK for292* DMA access and 1 if the buffer needs to be bounced.293*294*/295extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);296297/*298* The DMA API, implemented by dmabounce.c. See below for descriptions.299*/300extern dma_addr_t __dma_map_single(struct device *, void *, size_t,301enum dma_data_direction);302extern void __dma_unmap_single(struct device *, dma_addr_t, size_t,303enum dma_data_direction);304extern dma_addr_t __dma_map_page(struct device *, struct page *,305unsigned long, size_t, enum dma_data_direction);306extern void __dma_unmap_page(struct device *, dma_addr_t, size_t,307enum dma_data_direction);308309/*310* Private functions311*/312int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,313size_t, enum dma_data_direction);314int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,315size_t, enum dma_data_direction);316#else317static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,318unsigned long offset, size_t size, enum dma_data_direction dir)319{320return 1;321}322323static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,324unsigned long offset, size_t size, enum dma_data_direction dir)325{326return 1;327}328329330static inline dma_addr_t __dma_map_single(struct device *dev, void *cpu_addr,331size_t size, enum dma_data_direction dir)332{333__dma_single_cpu_to_dev(cpu_addr, size, dir);334return virt_to_dma(dev, cpu_addr);335}336337static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page,338unsigned long offset, size_t size, enum dma_data_direction dir)339{340__dma_page_cpu_to_dev(page, offset, size, dir);341return pfn_to_dma(dev, page_to_pfn(page)) + offset;342}343344static inline void __dma_unmap_single(struct device *dev, dma_addr_t handle,345size_t size, enum dma_data_direction dir)346{347__dma_single_dev_to_cpu(dma_to_virt(dev, handle), size, dir);348}349350static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle,351size_t size, enum dma_data_direction dir)352{353__dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),354handle & ~PAGE_MASK, size, dir);355}356#endif /* CONFIG_DMABOUNCE */357358/**359* dma_map_single - map a single buffer for streaming DMA360* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices361* @cpu_addr: CPU direct mapped address of buffer362* @size: size of buffer to map363* @dir: DMA transfer direction364*365* Ensure that any data held in the cache is appropriately discarded366* or written back.367*368* The device owns this memory once this call has completed. The CPU369* can regain ownership by calling dma_unmap_single() or370* dma_sync_single_for_cpu().371*/372static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,373size_t size, enum dma_data_direction dir)374{375dma_addr_t addr;376377BUG_ON(!valid_dma_direction(dir));378379addr = __dma_map_single(dev, cpu_addr, size, dir);380debug_dma_map_page(dev, virt_to_page(cpu_addr),381(unsigned long)cpu_addr & ~PAGE_MASK, size,382dir, addr, true);383384return addr;385}386387/**388* dma_map_page - map a portion of a page for streaming DMA389* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices390* @page: page that buffer resides in391* @offset: offset into page for start of buffer392* @size: size of buffer to map393* @dir: DMA transfer direction394*395* Ensure that any data held in the cache is appropriately discarded396* or written back.397*398* The device owns this memory once this call has completed. The CPU399* can regain ownership by calling dma_unmap_page().400*/401static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,402unsigned long offset, size_t size, enum dma_data_direction dir)403{404dma_addr_t addr;405406BUG_ON(!valid_dma_direction(dir));407408addr = __dma_map_page(dev, page, offset, size, dir);409debug_dma_map_page(dev, page, offset, size, dir, addr, false);410411return addr;412}413414/**415* dma_unmap_single - unmap a single buffer previously mapped416* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices417* @handle: DMA address of buffer418* @size: size of buffer (same as passed to dma_map_single)419* @dir: DMA transfer direction (same as passed to dma_map_single)420*421* Unmap a single streaming mode DMA translation. The handle and size422* must match what was provided in the previous dma_map_single() call.423* All other usages are undefined.424*425* After this call, reads by the CPU to the buffer are guaranteed to see426* whatever the device wrote there.427*/428static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,429size_t size, enum dma_data_direction dir)430{431debug_dma_unmap_page(dev, handle, size, dir, true);432__dma_unmap_single(dev, handle, size, dir);433}434435/**436* dma_unmap_page - unmap a buffer previously mapped through dma_map_page()437* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices438* @handle: DMA address of buffer439* @size: size of buffer (same as passed to dma_map_page)440* @dir: DMA transfer direction (same as passed to dma_map_page)441*442* Unmap a page streaming mode DMA translation. The handle and size443* must match what was provided in the previous dma_map_page() call.444* All other usages are undefined.445*446* After this call, reads by the CPU to the buffer are guaranteed to see447* whatever the device wrote there.448*/449static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,450size_t size, enum dma_data_direction dir)451{452debug_dma_unmap_page(dev, handle, size, dir, false);453__dma_unmap_page(dev, handle, size, dir);454}455456/**457* dma_sync_single_range_for_cpu458* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices459* @handle: DMA address of buffer460* @offset: offset of region to start sync461* @size: size of region to sync462* @dir: DMA transfer direction (same as passed to dma_map_single)463*464* Make physical memory consistent for a single streaming mode DMA465* translation after a transfer.466*467* If you perform a dma_map_single() but wish to interrogate the468* buffer using the cpu, yet do not wish to teardown the PCI dma469* mapping, you must call this function before doing so. At the470* next point you give the PCI dma address back to the card, you471* must first the perform a dma_sync_for_device, and then the472* device again owns the buffer.473*/474static inline void dma_sync_single_range_for_cpu(struct device *dev,475dma_addr_t handle, unsigned long offset, size_t size,476enum dma_data_direction dir)477{478BUG_ON(!valid_dma_direction(dir));479480debug_dma_sync_single_for_cpu(dev, handle + offset, size, dir);481482if (!dmabounce_sync_for_cpu(dev, handle, offset, size, dir))483return;484485__dma_single_dev_to_cpu(dma_to_virt(dev, handle) + offset, size, dir);486}487488static inline void dma_sync_single_range_for_device(struct device *dev,489dma_addr_t handle, unsigned long offset, size_t size,490enum dma_data_direction dir)491{492BUG_ON(!valid_dma_direction(dir));493494debug_dma_sync_single_for_device(dev, handle + offset, size, dir);495496if (!dmabounce_sync_for_device(dev, handle, offset, size, dir))497return;498499__dma_single_cpu_to_dev(dma_to_virt(dev, handle) + offset, size, dir);500}501502static inline void dma_sync_single_for_cpu(struct device *dev,503dma_addr_t handle, size_t size, enum dma_data_direction dir)504{505dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);506}507508static inline void dma_sync_single_for_device(struct device *dev,509dma_addr_t handle, size_t size, enum dma_data_direction dir)510{511dma_sync_single_range_for_device(dev, handle, 0, size, dir);512}513514/*515* The scatter list versions of the above methods.516*/517extern int dma_map_sg(struct device *, struct scatterlist *, int,518enum dma_data_direction);519extern void dma_unmap_sg(struct device *, struct scatterlist *, int,520enum dma_data_direction);521extern void dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,522enum dma_data_direction);523extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int,524enum dma_data_direction);525526527#endif /* __KERNEL__ */528#endif529530531