Path: blob/master/arch/arm/mach-bcmring/include/csp/reg.h
10820 views
/*****************************************************************************1* Copyright 2003 - 2008 Broadcom Corporation. All rights reserved.2*3* Unless you and Broadcom execute a separate written software license4* agreement governing use of this software, this software is licensed to you5* under the terms of the GNU General Public License version 2, available at6* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").7*8* Notwithstanding the above, under no circumstances may you combine this9* software in any way with any other Broadcom software provided under a10* license other than the GPL, without Broadcom's express prior written11* consent.12*****************************************************************************/1314/****************************************************************************/15/**16* @file reg.h17*18* @brief Generic register definitions used in CSP19*/20/****************************************************************************/2122#ifndef CSP_REG_H23#define CSP_REG_H2425/* ---- Include Files ---------------------------------------------------- */2627#include <csp/stdint.h>2829/* ---- Public Constants and Types --------------------------------------- */3031#define __REG32(x) (*((volatile uint32_t *)(x)))32#define __REG16(x) (*((volatile uint16_t *)(x)))33#define __REG8(x) (*((volatile uint8_t *) (x)))3435/* Macros used to define a sequence of reserved registers. The start / end */36/* are byte offsets in the particular register definition, with the "end" */37/* being the offset of the next un-reserved register. E.g. if offsets */38/* 0x10 through to 0x1f are reserved, then this reserved area could be */39/* specified as follows. */40/* typedef struct */41/* { */42/* uint32_t reg1; offset 0x00 */43/* uint32_t reg2; offset 0x04 */44/* uint32_t reg3; offset 0x08 */45/* uint32_t reg4; offset 0x0c */46/* REG32_RSVD(0x10, 0x20); */47/* uint32_t reg5; offset 0x20 */48/* ... */49/* } EXAMPLE_REG_t; */50#define REG8_RSVD(start, end) uint8_t rsvd_##start[(end - start) / sizeof(uint8_t)]51#define REG16_RSVD(start, end) uint16_t rsvd_##start[(end - start) / sizeof(uint16_t)]52#define REG32_RSVD(start, end) uint32_t rsvd_##start[(end - start) / sizeof(uint32_t)]5354/* ---- Public Variable Externs ------------------------------------------ */55/* ---- Public Function Prototypes --------------------------------------- */5657/* Note: When protecting multiple statements, the REG_LOCAL_IRQ_SAVE and */58/* REG_LOCAL_IRQ_RESTORE must be enclosed in { } to allow the */59/* flags variable to be declared locally. */60/* e.g. */61/* statement1; */62/* { */63/* REG_LOCAL_IRQ_SAVE; */64/* <multiple statements here> */65/* REG_LOCAL_IRQ_RESTORE; */66/* } */67/* statement2; */68/* */6970#if defined(__KERNEL__) && !defined(STANDALONE)71#include <mach/hardware.h>72#include <linux/interrupt.h>7374#define REG_LOCAL_IRQ_SAVE HW_DECLARE_SPINLOCK(reg32) \75unsigned long flags; HW_IRQ_SAVE(reg32, flags)7677#define REG_LOCAL_IRQ_RESTORE HW_IRQ_RESTORE(reg32, flags)7879#else8081#define REG_LOCAL_IRQ_SAVE82#define REG_LOCAL_IRQ_RESTORE8384#endif8586static inline void reg32_modify_and(volatile uint32_t *reg, uint32_t value)87{88REG_LOCAL_IRQ_SAVE;89*reg &= value;90REG_LOCAL_IRQ_RESTORE;91}9293static inline void reg32_modify_or(volatile uint32_t *reg, uint32_t value)94{95REG_LOCAL_IRQ_SAVE;96*reg |= value;97REG_LOCAL_IRQ_RESTORE;98}99100static inline void reg32_modify_mask(volatile uint32_t *reg, uint32_t mask,101uint32_t value)102{103REG_LOCAL_IRQ_SAVE;104*reg = (*reg & mask) | value;105REG_LOCAL_IRQ_RESTORE;106}107108static inline void reg32_write(volatile uint32_t *reg, uint32_t value)109{110*reg = value;111}112113#endif /* CSP_REG_H */114115116