CoCalc -- cap_inline.h

GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/arm/mach-bcmring/include/mach/csp/cap_inline.h
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/*****************************************************************************
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* Copyright 2009 Broadcom Corporation.  All rights reserved.
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2, available at
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* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Broadcom software provided under a
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* license other than the GPL, without Broadcom's express prior written
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* consent.
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*****************************************************************************/
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#ifndef CAP_INLINE_H
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#define CAP_INLINE_H
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/* ---- Include Files ---------------------------------------------------- */
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#include <mach/csp/cap.h>
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#include <cfg_global.h>
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/* ---- Public Constants and Types --------------------------------------- */
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#define CAP_CONFIG0_VPM_DIS          0x00000001
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#define CAP_CONFIG0_ETH_PHY0_DIS     0x00000002
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#define CAP_CONFIG0_ETH_PHY1_DIS     0x00000004
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#define CAP_CONFIG0_ETH_GMII0_DIS    0x00000008
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#define CAP_CONFIG0_ETH_GMII1_DIS    0x00000010
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#define CAP_CONFIG0_ETH_SGMII0_DIS   0x00000020
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#define CAP_CONFIG0_ETH_SGMII1_DIS   0x00000040
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#define CAP_CONFIG0_USB0_DIS         0x00000080
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#define CAP_CONFIG0_USB1_DIS         0x00000100
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#define CAP_CONFIG0_TSC_DIS          0x00000200
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#define CAP_CONFIG0_EHSS0_DIS        0x00000400
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#define CAP_CONFIG0_EHSS1_DIS        0x00000800
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#define CAP_CONFIG0_SDIO0_DIS        0x00001000
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#define CAP_CONFIG0_SDIO1_DIS        0x00002000
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#define CAP_CONFIG0_UARTB_DIS        0x00004000
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#define CAP_CONFIG0_KEYPAD_DIS       0x00008000
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#define CAP_CONFIG0_CLCD_DIS         0x00010000
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#define CAP_CONFIG0_GE_DIS           0x00020000
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#define CAP_CONFIG0_LEDM_DIS         0x00040000
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#define CAP_CONFIG0_BBL_DIS          0x00080000
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#define CAP_CONFIG0_VDEC_DIS         0x00100000
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#define CAP_CONFIG0_PIF_DIS          0x00200000
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#define CAP_CONFIG0_RESERVED1_DIS    0x00400000
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#define CAP_CONFIG0_RESERVED2_DIS    0x00800000
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#define CAP_CONFIG1_APMA_DIS         0x00000001
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#define CAP_CONFIG1_APMB_DIS         0x00000002
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#define CAP_CONFIG1_APMC_DIS         0x00000004
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#define CAP_CONFIG1_CLCD_RES_MASK    0x00000600
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#define CAP_CONFIG1_CLCD_RES_SHIFT   9
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#define CAP_CONFIG1_CLCD_RES_WVGA    (CAP_LCD_WVGA << CAP_CONFIG1_CLCD_RES_SHIFT)
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#define CAP_CONFIG1_CLCD_RES_VGA     (CAP_LCD_VGA << CAP_CONFIG1_CLCD_RES_SHIFT)
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#define CAP_CONFIG1_CLCD_RES_WQVGA   (CAP_LCD_WQVGA << CAP_CONFIG1_CLCD_RES_SHIFT)
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#define CAP_CONFIG1_CLCD_RES_QVGA    (CAP_LCD_QVGA << CAP_CONFIG1_CLCD_RES_SHIFT)
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#define CAP_CONFIG2_SPU_DIS          0x00000010
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#define CAP_CONFIG2_PKA_DIS          0x00000020
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#define CAP_CONFIG2_RNG_DIS          0x00000080
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#if   (CFG_GLOBAL_CHIP == BCM11107)
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#define capConfig0 0
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#define capConfig1 CAP_CONFIG1_CLCD_RES_WVGA
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#define capConfig2 0
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#define CAP_APM_MAX_NUM_CHANS 3
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#elif (CFG_GLOBAL_CHIP == FPGA11107)
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#define capConfig0 0
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#define capConfig1 CAP_CONFIG1_CLCD_RES_WVGA
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#define capConfig2 0
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#define CAP_APM_MAX_NUM_CHANS 3
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#elif (CFG_GLOBAL_CHIP == BCM11109)
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#define capConfig0 (CAP_CONFIG0_USB1_DIS | CAP_CONFIG0_EHSS1_DIS | CAP_CONFIG0_SDIO1_DIS | CAP_CONFIG0_GE_DIS | CAP_CONFIG0_BBL_DIS | CAP_CONFIG0_VDEC_DIS)
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#define capConfig1 (CAP_CONFIG1_APMC_DIS | CAP_CONFIG1_CLCD_RES_WQVGA)
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#define capConfig2 (CAP_CONFIG2_SPU_DIS | CAP_CONFIG2_PKA_DIS)
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#define CAP_APM_MAX_NUM_CHANS 2
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#elif (CFG_GLOBAL_CHIP == BCM11170)
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#define capConfig0 (CAP_CONFIG0_ETH_GMII0_DIS | CAP_CONFIG0_ETH_GMII1_DIS | CAP_CONFIG0_USB0_DIS | CAP_CONFIG0_USB1_DIS | CAP_CONFIG0_TSC_DIS | CAP_CONFIG0_EHSS1_DIS | CAP_CONFIG0_SDIO0_DIS | CAP_CONFIG0_SDIO1_DIS | CAP_CONFIG0_UARTB_DIS | CAP_CONFIG0_CLCD_DIS | CAP_CONFIG0_GE_DIS | CAP_CONFIG0_BBL_DIS | CAP_CONFIG0_VDEC_DIS)
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#define capConfig1 (CAP_CONFIG1_APMC_DIS | CAP_CONFIG1_CLCD_RES_WQVGA)
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#define capConfig2 (CAP_CONFIG2_SPU_DIS | CAP_CONFIG2_PKA_DIS)
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#define CAP_APM_MAX_NUM_CHANS 2
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#elif (CFG_GLOBAL_CHIP == BCM11110)
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#define capConfig0 (CAP_CONFIG0_USB1_DIS | CAP_CONFIG0_TSC_DIS | CAP_CONFIG0_EHSS1_DIS | CAP_CONFIG0_SDIO0_DIS | CAP_CONFIG0_SDIO1_DIS | CAP_CONFIG0_UARTB_DIS | CAP_CONFIG0_GE_DIS | CAP_CONFIG0_BBL_DIS | CAP_CONFIG0_VDEC_DIS)
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#define capConfig1 CAP_CONFIG1_APMC_DIS
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#define capConfig2 (CAP_CONFIG2_SPU_DIS | CAP_CONFIG2_PKA_DIS)
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#define CAP_APM_MAX_NUM_CHANS 2
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#elif (CFG_GLOBAL_CHIP == BCM11211)
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#define capConfig0 (CAP_CONFIG0_ETH_PHY0_DIS | CAP_CONFIG0_ETH_GMII0_DIS | CAP_CONFIG0_ETH_GMII1_DIS | CAP_CONFIG0_ETH_SGMII0_DIS | CAP_CONFIG0_ETH_SGMII1_DIS | CAP_CONFIG0_CLCD_DIS)
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#define capConfig1 CAP_CONFIG1_APMC_DIS
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#define capConfig2 0
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#define CAP_APM_MAX_NUM_CHANS 2
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#else
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#error CFG_GLOBAL_CHIP type capabilities not defined
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#endif
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#if   ((CFG_GLOBAL_CHIP == BCM11107) || (CFG_GLOBAL_CHIP == FPGA11107))
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#define CAP_HW_CFG_ARM_CLK_HZ 500000000
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#elif ((CFG_GLOBAL_CHIP == BCM11109) || (CFG_GLOBAL_CHIP == BCM11170) || (CFG_GLOBAL_CHIP == BCM11110))
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#define CAP_HW_CFG_ARM_CLK_HZ 300000000
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#elif (CFG_GLOBAL_CHIP == BCM11211)
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#define CAP_HW_CFG_ARM_CLK_HZ 666666666
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#else
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#error CFG_GLOBAL_CHIP type capabilities not defined
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#endif
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#if ((CFG_GLOBAL_CHIP == BCM11107) || (CFG_GLOBAL_CHIP == BCM11211) || (CFG_GLOBAL_CHIP == FPGA11107))
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#define CAP_HW_CFG_VPM_CLK_HZ 333333333
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#elif ((CFG_GLOBAL_CHIP == BCM11109) || (CFG_GLOBAL_CHIP == BCM11170) || (CFG_GLOBAL_CHIP == BCM11110))
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#define CAP_HW_CFG_VPM_CLK_HZ 200000000
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#else
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#error CFG_GLOBAL_CHIP type capabilities not defined
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#endif
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/* ---- Public Variable Externs ------------------------------------------ */
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/* ---- Public Function Prototypes --------------------------------------- */
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/****************************************************************************
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*  cap_isPresent -
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*
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*  PURPOSE:
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*     Determines if the chip has a certain capability present
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*
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*  PARAMETERS:
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*     capability - type of capability to determine if present
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*
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*  RETURNS:
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*     CAP_PRESENT or CAP_NOT_PRESENT
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****************************************************************************/
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static inline CAP_RC_T cap_isPresent(CAP_CAPABILITY_T capability, int index)
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{
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	CAP_RC_T returnVal = CAP_NOT_PRESENT;
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	switch (capability) {
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	case CAP_VPM:
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		{
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			if (!(capConfig0 & CAP_CONFIG0_VPM_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_ETH_PHY:
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		{
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			if ((index == 0)
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			    && (!(capConfig0 & CAP_CONFIG0_ETH_PHY0_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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			if ((index == 1)
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			    && (!(capConfig0 & CAP_CONFIG0_ETH_PHY1_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_ETH_GMII:
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		{
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			if ((index == 0)
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			    && (!(capConfig0 & CAP_CONFIG0_ETH_GMII0_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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			if ((index == 1)
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			    && (!(capConfig0 & CAP_CONFIG0_ETH_GMII1_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_ETH_SGMII:
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		{
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			if ((index == 0)
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			    && (!(capConfig0 & CAP_CONFIG0_ETH_SGMII0_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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			if ((index == 1)
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			    && (!(capConfig0 & CAP_CONFIG0_ETH_SGMII1_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_USB:
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		{
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			if ((index == 0)
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			    && (!(capConfig0 & CAP_CONFIG0_USB0_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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			if ((index == 1)
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			    && (!(capConfig0 & CAP_CONFIG0_USB1_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_TSC:
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		{
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			if (!(capConfig0 & CAP_CONFIG0_TSC_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_EHSS:
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		{
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			if ((index == 0)
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			    && (!(capConfig0 & CAP_CONFIG0_EHSS0_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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			if ((index == 1)
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			    && (!(capConfig0 & CAP_CONFIG0_EHSS1_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_SDIO:
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		{
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			if ((index == 0)
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			    && (!(capConfig0 & CAP_CONFIG0_SDIO0_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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			if ((index == 1)
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			    && (!(capConfig0 & CAP_CONFIG0_SDIO1_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_UARTB:
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		{
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			if (!(capConfig0 & CAP_CONFIG0_UARTB_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_KEYPAD:
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		{
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			if (!(capConfig0 & CAP_CONFIG0_KEYPAD_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_CLCD:
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		{
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			if (!(capConfig0 & CAP_CONFIG0_CLCD_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_GE:
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		{
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			if (!(capConfig0 & CAP_CONFIG0_GE_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_LEDM:
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		{
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			if (!(capConfig0 & CAP_CONFIG0_LEDM_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_BBL:
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		{
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			if (!(capConfig0 & CAP_CONFIG0_BBL_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_VDEC:
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		{
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			if (!(capConfig0 & CAP_CONFIG0_VDEC_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_PIF:
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		{
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			if (!(capConfig0 & CAP_CONFIG0_PIF_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_APM:
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		{
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			if ((index == 0)
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			    && (!(capConfig1 & CAP_CONFIG1_APMA_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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			if ((index == 1)
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			    && (!(capConfig1 & CAP_CONFIG1_APMB_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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			if ((index == 2)
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			    && (!(capConfig1 & CAP_CONFIG1_APMC_DIS))) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_SPU:
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		{
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			if (!(capConfig2 & CAP_CONFIG2_SPU_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_PKA:
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		{
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			if (!(capConfig2 & CAP_CONFIG2_PKA_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	case CAP_RNG:
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		{
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			if (!(capConfig2 & CAP_CONFIG2_RNG_DIS)) {
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				returnVal = CAP_PRESENT;
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			}
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		}
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		break;
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	default:
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		{
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		}
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		break;
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	}
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	return returnVal;
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}
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/****************************************************************************
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*  cap_getMaxArmSpeedHz -
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*
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*  PURPOSE:
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*     Determines the maximum speed of the ARM CPU
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*
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*  PARAMETERS:
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*     none
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*
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*  RETURNS:
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*     clock speed in Hz that the ARM processor is able to run at
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****************************************************************************/
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static inline uint32_t cap_getMaxArmSpeedHz(void)
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{
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#if   ((CFG_GLOBAL_CHIP == BCM11107) || (CFG_GLOBAL_CHIP == FPGA11107))
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	return 500000000;
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#elif ((CFG_GLOBAL_CHIP == BCM11109) || (CFG_GLOBAL_CHIP == BCM11170) || (CFG_GLOBAL_CHIP == BCM11110))
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	return 300000000;
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#elif (CFG_GLOBAL_CHIP == BCM11211)
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	return 666666666;
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#else
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#error CFG_GLOBAL_CHIP type capabilities not defined
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#endif
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}
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/****************************************************************************
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*  cap_getMaxVpmSpeedHz -
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*
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*  PURPOSE:
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*     Determines the maximum speed of the VPM
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*
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*  PARAMETERS:
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*     none
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*
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*  RETURNS:
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*     clock speed in Hz that the VPM is able to run at
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****************************************************************************/
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static inline uint32_t cap_getMaxVpmSpeedHz(void)
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{
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#if ((CFG_GLOBAL_CHIP == BCM11107) || (CFG_GLOBAL_CHIP == BCM11211) || (CFG_GLOBAL_CHIP == FPGA11107))
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	return 333333333;
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#elif ((CFG_GLOBAL_CHIP == BCM11109) || (CFG_GLOBAL_CHIP == BCM11170) || (CFG_GLOBAL_CHIP == BCM11110))
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	return 200000000;
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#else
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#error CFG_GLOBAL_CHIP type capabilities not defined
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#endif
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}
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/****************************************************************************
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*  cap_getMaxLcdRes -
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*
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*  PURPOSE:
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*     Determines the maximum LCD resolution capabilities
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*
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*  PARAMETERS:
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*     none
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*
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*  RETURNS:
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*   CAP_LCD_WVGA, CAP_LCD_VGA, CAP_LCD_WQVGA or CAP_LCD_QVGA
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*
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****************************************************************************/
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static inline CAP_LCD_RES_T cap_getMaxLcdRes(void)
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{
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	return (CAP_LCD_RES_T)
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		((capConfig1 & CAP_CONFIG1_CLCD_RES_MASK) >>
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		 CAP_CONFIG1_CLCD_RES_SHIFT);
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}
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#endif
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