Path: blob/master/arch/arm/mach-bcmring/include/mach/csp/mm_addr.h
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/*****************************************************************************1* Copyright 2003 - 2008 Broadcom Corporation. All rights reserved.2*3* Unless you and Broadcom execute a separate written software license4* agreement governing use of this software, this software is licensed to you5* under the terms of the GNU General Public License version 2, available at6* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").7*8* Notwithstanding the above, under no circumstances may you combine this9* software in any way with any other Broadcom software provided under a10* license other than the GPL, without Broadcom's express prior written11* consent.12*****************************************************************************/1314/****************************************************************************/15/**16* @file mm_addr.h17*18* @brief Memory Map address definitions19*20* @note21* None22*/23/****************************************************************************/2425#ifndef _MM_ADDR_H26#define _MM_ADDR_H2728/* ---- Include Files ---------------------------------------------------- */2930#if !defined(CSP_SIMULATION)31#include <cfg_global.h>32#endif3334/* ---- Public Constants and Types --------------------------------------- */3536/* Memory Map address definitions */3738#define MM_ADDR_DDR 0x000000003940#define MM_ADDR_IO_VPM_EXTMEM_RSVD 0x0F000000 /* 16 MB - Reserved external memory for VPM use */4142#define MM_ADDR_IO_FLASHC 0x2000000043#define MM_ADDR_IO_BROM 0x3000000044#define MM_ADDR_IO_ARAM 0x30100000 /* 64 KB - extra cycle latency - WS switch */45#define MM_ADDR_IO_DMA0 0x3020000046#define MM_ADDR_IO_DMA1 0x3030000047#define MM_ADDR_IO_ESW 0x3040000048#define MM_ADDR_IO_CLCD 0x3050000049#define MM_ADDR_IO_PIF 0x3058000050#define MM_ADDR_IO_APM 0x3060000051#define MM_ADDR_IO_SPUM 0x3070000052#define MM_ADDR_IO_VPM_PROG 0x3080000053#define MM_ADDR_IO_VPM_DATA 0x30A0000054#define MM_ADDR_IO_VRAM 0x40000000 /* 64 KB - security block in front of it */55#define MM_ADDR_IO_CHIPC 0x8000000056#define MM_ADDR_IO_UMI 0x8000100057#define MM_ADDR_IO_NAND 0x8000180058#define MM_ADDR_IO_LEDM 0x8000200059#define MM_ADDR_IO_PWM 0x8000204060#define MM_ADDR_IO_VINTC 0x8000300061#define MM_ADDR_IO_GPIO0 0x8000400062#define MM_ADDR_IO_GPIO1 0x8000480063#define MM_ADDR_IO_I2CS 0x8000500064#define MM_ADDR_IO_SPIS 0x8000600065#define MM_ADDR_IO_HPM 0x8000740066#define MM_ADDR_IO_HPM_REMAP 0x8000780067#define MM_ADDR_IO_TZPC 0x8000800068#define MM_ADDR_IO_MPU 0x8000900069#define MM_ADDR_IO_SPUMP 0x8000a00070#define MM_ADDR_IO_PKA 0x8000b00071#define MM_ADDR_IO_RNG 0x8000c00072#define MM_ADDR_IO_KEYC 0x8000d00073#define MM_ADDR_IO_BBL 0x8000e00074#define MM_ADDR_IO_OTP 0x8000f00075#define MM_ADDR_IO_I2S0 0x8001000076#define MM_ADDR_IO_I2S1 0x8001100077#define MM_ADDR_IO_UARTA 0x8001200078#define MM_ADDR_IO_UARTB 0x8001300079#define MM_ADDR_IO_I2CH 0x8001402080#define MM_ADDR_IO_SPIH 0x8001500081#define MM_ADDR_IO_TSC 0x8001600082#define MM_ADDR_IO_TMR 0x8001700083#define MM_ADDR_IO_WATCHDOG 0x8001780084#define MM_ADDR_IO_ETM 0x8001800085#define MM_ADDR_IO_DDRC 0x8001900086#define MM_ADDR_IO_SINTC 0x8010000087#define MM_ADDR_IO_INTC0 0x8020000088#define MM_ADDR_IO_INTC1 0x8020100089#define MM_ADDR_IO_GE 0x8030000090#define MM_ADDR_IO_USB_CTLR0 0x8040000091#define MM_ADDR_IO_USB_CTLR1 0x8041000092#define MM_ADDR_IO_USB_PHY 0x8042000093#define MM_ADDR_IO_SDIOH0 0x8050000094#define MM_ADDR_IO_SDIOH1 0x8060000095#define MM_ADDR_IO_VDEC 0x807000009697/* ---- Public Variable Externs ------------------------------------------ */98/* ---- Public Function Prototypes --------------------------------------- */99100#endif /* _MM_ADDR_H */101102103