Path: blob/master/arch/arm/mach-cns3xxx/cns3420vb.c
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/*1* Cavium Networks CNS3420 Validation Board2*3* Copyright 2000 Deep Blue Solutions Ltd4* Copyright 2008 ARM Limited5* Copyright 2008 Cavium Networks6* Scott Shu7* Copyright 2010 MontaVista Software, LLC.8* Anton Vorontsov <[email protected]>9*10* This file is free software; you can redistribute it and/or modify11* it under the terms of the GNU General Public License, Version 2, as12* published by the Free Software Foundation.13*/1415#include <linux/init.h>16#include <linux/kernel.h>17#include <linux/compiler.h>18#include <linux/io.h>19#include <linux/dma-mapping.h>20#include <linux/serial_core.h>21#include <linux/serial_8250.h>22#include <linux/platform_device.h>23#include <linux/mtd/mtd.h>24#include <linux/mtd/physmap.h>25#include <linux/mtd/partitions.h>26#include <asm/setup.h>27#include <asm/mach-types.h>28#include <asm/mach/arch.h>29#include <asm/mach/map.h>30#include <asm/mach/time.h>31#include <mach/hardware.h>32#include <mach/cns3xxx.h>33#include <mach/irqs.h>34#include "core.h"35#include "devices.h"3637/*38* NOR Flash39*/40static struct mtd_partition cns3420_nor_partitions[] = {41{42.name = "uboot",43.size = 0x00040000,44.offset = 0,45.mask_flags = MTD_WRITEABLE,46}, {47.name = "kernel",48.size = 0x004C0000,49.offset = MTDPART_OFS_APPEND,50}, {51.name = "filesystem",52.size = 0x7000000,53.offset = MTDPART_OFS_APPEND,54}, {55.name = "filesystem2",56.size = 0x0AE0000,57.offset = MTDPART_OFS_APPEND,58}, {59.name = "ubootenv",60.size = MTDPART_SIZ_FULL,61.offset = MTDPART_OFS_APPEND,62},63};6465static struct physmap_flash_data cns3420_nor_pdata = {66.width = 2,67.parts = cns3420_nor_partitions,68.nr_parts = ARRAY_SIZE(cns3420_nor_partitions),69};7071static struct resource cns3420_nor_res = {72.start = CNS3XXX_FLASH_BASE,73.end = CNS3XXX_FLASH_BASE + SZ_128M - 1,74.flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,75};7677static struct platform_device cns3420_nor_pdev = {78.name = "physmap-flash",79.id = 0,80.resource = &cns3420_nor_res,81.num_resources = 1,82.dev = {83.platform_data = &cns3420_nor_pdata,84},85};8687/*88* UART89*/90static void __init cns3420_early_serial_setup(void)91{92#ifdef CONFIG_SERIAL_8250_CONSOLE93static struct uart_port cns3420_serial_port = {94.membase = (void __iomem *)CNS3XXX_UART0_BASE_VIRT,95.mapbase = CNS3XXX_UART0_BASE,96.irq = IRQ_CNS3XXX_UART0,97.iotype = UPIO_MEM,98.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,99.regshift = 2,100.uartclk = 24000000,101.line = 0,102.type = PORT_16550A,103.fifosize = 16,104};105106early_serial_setup(&cns3420_serial_port);107#endif108}109110/*111* USB112*/113static struct resource cns3xxx_usb_ehci_resources[] = {114[0] = {115.start = CNS3XXX_USB_BASE,116.end = CNS3XXX_USB_BASE + SZ_16M - 1,117.flags = IORESOURCE_MEM,118},119[1] = {120.start = IRQ_CNS3XXX_USB_EHCI,121.flags = IORESOURCE_IRQ,122},123};124125static u64 cns3xxx_usb_ehci_dma_mask = DMA_BIT_MASK(32);126127static struct platform_device cns3xxx_usb_ehci_device = {128.name = "cns3xxx-ehci",129.num_resources = ARRAY_SIZE(cns3xxx_usb_ehci_resources),130.resource = cns3xxx_usb_ehci_resources,131.dev = {132.dma_mask = &cns3xxx_usb_ehci_dma_mask,133.coherent_dma_mask = DMA_BIT_MASK(32),134},135};136137static struct resource cns3xxx_usb_ohci_resources[] = {138[0] = {139.start = CNS3XXX_USB_OHCI_BASE,140.end = CNS3XXX_USB_OHCI_BASE + SZ_16M - 1,141.flags = IORESOURCE_MEM,142},143[1] = {144.start = IRQ_CNS3XXX_USB_OHCI,145.flags = IORESOURCE_IRQ,146},147};148149static u64 cns3xxx_usb_ohci_dma_mask = DMA_BIT_MASK(32);150151static struct platform_device cns3xxx_usb_ohci_device = {152.name = "cns3xxx-ohci",153.num_resources = ARRAY_SIZE(cns3xxx_usb_ohci_resources),154.resource = cns3xxx_usb_ohci_resources,155.dev = {156.dma_mask = &cns3xxx_usb_ohci_dma_mask,157.coherent_dma_mask = DMA_BIT_MASK(32),158},159};160161/*162* Initialization163*/164static struct platform_device *cns3420_pdevs[] __initdata = {165&cns3420_nor_pdev,166&cns3xxx_usb_ehci_device,167&cns3xxx_usb_ohci_device,168};169170static void __init cns3420_init(void)171{172platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs));173174cns3xxx_ahci_init();175cns3xxx_sdhci_init();176177pm_power_off = cns3xxx_power_off;178}179180static struct map_desc cns3420_io_desc[] __initdata = {181{182.virtual = CNS3XXX_UART0_BASE_VIRT,183.pfn = __phys_to_pfn(CNS3XXX_UART0_BASE),184.length = SZ_4K,185.type = MT_DEVICE,186},187};188189static void __init cns3420_map_io(void)190{191cns3xxx_map_io();192iotable_init(cns3420_io_desc, ARRAY_SIZE(cns3420_io_desc));193194cns3420_early_serial_setup();195}196197MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")198.boot_params = 0x00000100,199.map_io = cns3420_map_io,200.init_irq = cns3xxx_init_irq,201.timer = &cns3xxx_timer,202.init_machine = cns3420_init,203MACHINE_END204205206