Path: blob/master/arch/arm/mach-davinci/board-dm644x-evm.c
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/*1* TI DaVinci EVM board support2*3* Author: Kevin Hilman, MontaVista Software, Inc. <[email protected]>4*5* 2007 (c) MontaVista Software, Inc. This file is licensed under6* the terms of the GNU General Public License version 2. This program7* is licensed "as is" without any warranty of any kind, whether express8* or implied.9*/10#include <linux/kernel.h>11#include <linux/init.h>12#include <linux/dma-mapping.h>13#include <linux/platform_device.h>14#include <linux/gpio.h>15#include <linux/i2c.h>16#include <linux/i2c/pcf857x.h>17#include <linux/i2c/at24.h>18#include <linux/mtd/mtd.h>19#include <linux/mtd/nand.h>20#include <linux/mtd/partitions.h>21#include <linux/mtd/physmap.h>22#include <linux/phy.h>23#include <linux/clk.h>24#include <linux/videodev2.h>2526#include <media/tvp514x.h>2728#include <asm/mach-types.h>29#include <asm/mach/arch.h>3031#include <mach/dm644x.h>32#include <mach/common.h>33#include <mach/i2c.h>34#include <mach/serial.h>35#include <mach/mux.h>36#include <mach/nand.h>37#include <mach/mmc.h>38#include <mach/usb.h>39#include <mach/aemif.h>4041#define DM644X_EVM_PHY_ID "0:01"42#define LXT971_PHY_ID (0x001378e2)43#define LXT971_PHY_MASK (0xfffffff0)4445static struct mtd_partition davinci_evm_norflash_partitions[] = {46/* bootloader (UBL, U-Boot, etc) in first 5 sectors */47{48.name = "bootloader",49.offset = 0,50.size = 5 * SZ_64K,51.mask_flags = MTD_WRITEABLE, /* force read-only */52},53/* bootloader params in the next 1 sectors */54{55.name = "params",56.offset = MTDPART_OFS_APPEND,57.size = SZ_64K,58.mask_flags = 0,59},60/* kernel */61{62.name = "kernel",63.offset = MTDPART_OFS_APPEND,64.size = SZ_2M,65.mask_flags = 066},67/* file system */68{69.name = "filesystem",70.offset = MTDPART_OFS_APPEND,71.size = MTDPART_SIZ_FULL,72.mask_flags = 073}74};7576static struct physmap_flash_data davinci_evm_norflash_data = {77.width = 2,78.parts = davinci_evm_norflash_partitions,79.nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),80};8182/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF83* limits addresses to 16M, so using addresses past 16M will wrap */84static struct resource davinci_evm_norflash_resource = {85.start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,86.end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,87.flags = IORESOURCE_MEM,88};8990static struct platform_device davinci_evm_norflash_device = {91.name = "physmap-flash",92.id = 0,93.dev = {94.platform_data = &davinci_evm_norflash_data,95},96.num_resources = 1,97.resource = &davinci_evm_norflash_resource,98};99100/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).101* It may used instead of the (default) NOR chip to boot, using TI's102* tools to install the secondary boot loader (UBL) and U-Boot.103*/104static struct mtd_partition davinci_evm_nandflash_partition[] = {105/* Bootloader layout depends on whose u-boot is installed, but we106* can hide all the details.107* - block 0 for u-boot environment ... in mainline u-boot108* - block 1 for UBL (plus up to four backup copies in blocks 2..5)109* - blocks 6...? for u-boot110* - blocks 16..23 for u-boot environment ... in TI's u-boot111*/112{113.name = "bootloader",114.offset = 0,115.size = SZ_256K + SZ_128K,116.mask_flags = MTD_WRITEABLE, /* force read-only */117},118/* Kernel */119{120.name = "kernel",121.offset = MTDPART_OFS_APPEND,122.size = SZ_4M,123.mask_flags = 0,124},125/* File system (older GIT kernels started this on the 5MB mark) */126{127.name = "filesystem",128.offset = MTDPART_OFS_APPEND,129.size = MTDPART_SIZ_FULL,130.mask_flags = 0,131}132/* A few blocks at end hold a flash BBT ... created by TI's CCS133* using flashwriter_nand.out, but ignored by TI's versions of134* Linux and u-boot. We boot faster by using them.135*/136};137138static struct davinci_aemif_timing davinci_evm_nandflash_timing = {139.wsetup = 20,140.wstrobe = 40,141.whold = 20,142.rsetup = 10,143.rstrobe = 40,144.rhold = 10,145.ta = 40,146};147148static struct davinci_nand_pdata davinci_evm_nandflash_data = {149.parts = davinci_evm_nandflash_partition,150.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),151.ecc_mode = NAND_ECC_HW,152.options = NAND_USE_FLASH_BBT,153.timing = &davinci_evm_nandflash_timing,154};155156static struct resource davinci_evm_nandflash_resource[] = {157{158.start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,159.end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,160.flags = IORESOURCE_MEM,161}, {162.start = DM644X_ASYNC_EMIF_CONTROL_BASE,163.end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,164.flags = IORESOURCE_MEM,165},166};167168static struct platform_device davinci_evm_nandflash_device = {169.name = "davinci_nand",170.id = 0,171.dev = {172.platform_data = &davinci_evm_nandflash_data,173},174.num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),175.resource = davinci_evm_nandflash_resource,176};177178static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);179180static struct platform_device davinci_fb_device = {181.name = "davincifb",182.id = -1,183.dev = {184.dma_mask = &davinci_fb_dma_mask,185.coherent_dma_mask = DMA_BIT_MASK(32),186},187.num_resources = 0,188};189190static struct tvp514x_platform_data tvp5146_pdata = {191.clk_polarity = 0,192.hs_polarity = 1,193.vs_polarity = 1194};195196#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)197/* Inputs available at the TVP5146 */198static struct v4l2_input tvp5146_inputs[] = {199{200.index = 0,201.name = "Composite",202.type = V4L2_INPUT_TYPE_CAMERA,203.std = TVP514X_STD_ALL,204},205{206.index = 1,207.name = "S-Video",208.type = V4L2_INPUT_TYPE_CAMERA,209.std = TVP514X_STD_ALL,210},211};212213/*214* this is the route info for connecting each input to decoder215* ouput that goes to vpfe. There is a one to one correspondence216* with tvp5146_inputs217*/218static struct vpfe_route tvp5146_routes[] = {219{220.input = INPUT_CVBS_VI2B,221.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,222},223{224.input = INPUT_SVIDEO_VI2C_VI1C,225.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,226},227};228229static struct vpfe_subdev_info vpfe_sub_devs[] = {230{231.name = "tvp5146",232.grp_id = 0,233.num_inputs = ARRAY_SIZE(tvp5146_inputs),234.inputs = tvp5146_inputs,235.routes = tvp5146_routes,236.can_route = 1,237.ccdc_if_params = {238.if_type = VPFE_BT656,239.hdpol = VPFE_PINPOL_POSITIVE,240.vdpol = VPFE_PINPOL_POSITIVE,241},242.board_info = {243I2C_BOARD_INFO("tvp5146", 0x5d),244.platform_data = &tvp5146_pdata,245},246},247};248249static struct vpfe_config vpfe_cfg = {250.num_subdevs = ARRAY_SIZE(vpfe_sub_devs),251.i2c_adapter_id = 1,252.sub_devs = vpfe_sub_devs,253.card_name = "DM6446 EVM",254.ccdc = "DM6446 CCDC",255};256257static struct platform_device rtc_dev = {258.name = "rtc_davinci_evm",259.id = -1,260};261262static struct snd_platform_data dm644x_evm_snd_data;263264/*----------------------------------------------------------------------*/265266/*267* I2C GPIO expanders268*/269270#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))271272273/* U2 -- LEDs */274275static struct gpio_led evm_leds[] = {276{ .name = "DS8", .active_low = 1,277.default_trigger = "heartbeat", },278{ .name = "DS7", .active_low = 1, },279{ .name = "DS6", .active_low = 1, },280{ .name = "DS5", .active_low = 1, },281{ .name = "DS4", .active_low = 1, },282{ .name = "DS3", .active_low = 1, },283{ .name = "DS2", .active_low = 1,284.default_trigger = "mmc0", },285{ .name = "DS1", .active_low = 1,286.default_trigger = "ide-disk", },287};288289static const struct gpio_led_platform_data evm_led_data = {290.num_leds = ARRAY_SIZE(evm_leds),291.leds = evm_leds,292};293294static struct platform_device *evm_led_dev;295296static int297evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)298{299struct gpio_led *leds = evm_leds;300int status;301302while (ngpio--) {303leds->gpio = gpio++;304leds++;305}306307/* what an extremely annoying way to be forced to handle308* device unregistration ...309*/310evm_led_dev = platform_device_alloc("leds-gpio", 0);311platform_device_add_data(evm_led_dev,312&evm_led_data, sizeof evm_led_data);313314evm_led_dev->dev.parent = &client->dev;315status = platform_device_add(evm_led_dev);316if (status < 0) {317platform_device_put(evm_led_dev);318evm_led_dev = NULL;319}320return status;321}322323static int324evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)325{326if (evm_led_dev) {327platform_device_unregister(evm_led_dev);328evm_led_dev = NULL;329}330return 0;331}332333static struct pcf857x_platform_data pcf_data_u2 = {334.gpio_base = PCF_Uxx_BASE(0),335.setup = evm_led_setup,336.teardown = evm_led_teardown,337};338339340/* U18 - A/V clock generator and user switch */341342static int sw_gpio;343344static ssize_t345sw_show(struct device *d, struct device_attribute *a, char *buf)346{347char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";348349strcpy(buf, s);350return strlen(s);351}352353static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);354355static int356evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)357{358int status;359360/* export dip switch option */361sw_gpio = gpio + 7;362status = gpio_request(sw_gpio, "user_sw");363if (status == 0)364status = gpio_direction_input(sw_gpio);365if (status == 0)366status = device_create_file(&client->dev, &dev_attr_user_sw);367else368gpio_free(sw_gpio);369if (status != 0)370sw_gpio = -EINVAL;371372/* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */373gpio_request(gpio + 3, "pll_fs2");374gpio_direction_output(gpio + 3, 0);375376gpio_request(gpio + 2, "pll_fs1");377gpio_direction_output(gpio + 2, 0);378379gpio_request(gpio + 1, "pll_sr");380gpio_direction_output(gpio + 1, 0);381382return 0;383}384385static int386evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)387{388gpio_free(gpio + 1);389gpio_free(gpio + 2);390gpio_free(gpio + 3);391392if (sw_gpio > 0) {393device_remove_file(&client->dev, &dev_attr_user_sw);394gpio_free(sw_gpio);395}396return 0;397}398399static struct pcf857x_platform_data pcf_data_u18 = {400.gpio_base = PCF_Uxx_BASE(1),401.n_latch = (1 << 3) | (1 << 2) | (1 << 1),402.setup = evm_u18_setup,403.teardown = evm_u18_teardown,404};405406407/* U35 - various I/O signals used to manage USB, CF, ATA, etc */408409static int410evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)411{412/* p0 = nDRV_VBUS (initial: don't supply it) */413gpio_request(gpio + 0, "nDRV_VBUS");414gpio_direction_output(gpio + 0, 1);415416/* p1 = VDDIMX_EN */417gpio_request(gpio + 1, "VDDIMX_EN");418gpio_direction_output(gpio + 1, 1);419420/* p2 = VLYNQ_EN */421gpio_request(gpio + 2, "VLYNQ_EN");422gpio_direction_output(gpio + 2, 1);423424/* p3 = n3V3_CF_RESET (initial: stay in reset) */425gpio_request(gpio + 3, "nCF_RESET");426gpio_direction_output(gpio + 3, 0);427428/* (p4 unused) */429430/* p5 = 1V8_WLAN_RESET (initial: stay in reset) */431gpio_request(gpio + 5, "WLAN_RESET");432gpio_direction_output(gpio + 5, 1);433434/* p6 = nATA_SEL (initial: select) */435gpio_request(gpio + 6, "nATA_SEL");436gpio_direction_output(gpio + 6, 0);437438/* p7 = nCF_SEL (initial: deselect) */439gpio_request(gpio + 7, "nCF_SEL");440gpio_direction_output(gpio + 7, 1);441442return 0;443}444445static int446evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)447{448gpio_free(gpio + 7);449gpio_free(gpio + 6);450gpio_free(gpio + 5);451gpio_free(gpio + 3);452gpio_free(gpio + 2);453gpio_free(gpio + 1);454gpio_free(gpio + 0);455return 0;456}457458static struct pcf857x_platform_data pcf_data_u35 = {459.gpio_base = PCF_Uxx_BASE(2),460.setup = evm_u35_setup,461.teardown = evm_u35_teardown,462};463464/*----------------------------------------------------------------------*/465466/* Most of this EEPROM is unused, but U-Boot uses some data:467* - 0x7f00, 6 bytes Ethernet Address468* - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)469* - ... newer boards may have more470*/471472static struct at24_platform_data eeprom_info = {473.byte_len = (256*1024) / 8,474.page_size = 64,475.flags = AT24_FLAG_ADDR16,476.setup = davinci_get_mac_addr,477.context = (void *)0x7f00,478};479480/*481* MSP430 supports RTC, card detection, input from IR remote, and482* a bit more. It triggers interrupts on GPIO(7) from pressing483* buttons on the IR remote, and for card detect switches.484*/485static struct i2c_client *dm6446evm_msp;486487static int dm6446evm_msp_probe(struct i2c_client *client,488const struct i2c_device_id *id)489{490dm6446evm_msp = client;491return 0;492}493494static int dm6446evm_msp_remove(struct i2c_client *client)495{496dm6446evm_msp = NULL;497return 0;498}499500static const struct i2c_device_id dm6446evm_msp_ids[] = {501{ "dm6446evm_msp", 0, },502{ /* end of list */ },503};504505static struct i2c_driver dm6446evm_msp_driver = {506.driver.name = "dm6446evm_msp",507.id_table = dm6446evm_msp_ids,508.probe = dm6446evm_msp_probe,509.remove = dm6446evm_msp_remove,510};511512static int dm6444evm_msp430_get_pins(void)513{514static const char txbuf[2] = { 2, 4, };515char buf[4];516struct i2c_msg msg[2] = {517{518.addr = dm6446evm_msp->addr,519.flags = 0,520.len = 2,521.buf = (void __force *)txbuf,522},523{524.addr = dm6446evm_msp->addr,525.flags = I2C_M_RD,526.len = 4,527.buf = buf,528},529};530int status;531532if (!dm6446evm_msp)533return -ENXIO;534535/* Command 4 == get input state, returns port 2 and port3 data536* S Addr W [A] len=2 [A] cmd=4 [A]537* RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P538*/539status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);540if (status < 0)541return status;542543dev_dbg(&dm6446evm_msp->dev,544"PINS: %02x %02x %02x %02x\n",545buf[0], buf[1], buf[2], buf[3]);546547return (buf[3] << 8) | buf[2];548}549550static int dm6444evm_mmc_get_cd(int module)551{552int status = dm6444evm_msp430_get_pins();553554return (status < 0) ? status : !(status & BIT(1));555}556557static int dm6444evm_mmc_get_ro(int module)558{559int status = dm6444evm_msp430_get_pins();560561return (status < 0) ? status : status & BIT(6 + 8);562}563564static struct davinci_mmc_config dm6446evm_mmc_config = {565.get_cd = dm6444evm_mmc_get_cd,566.get_ro = dm6444evm_mmc_get_ro,567.wires = 4,568.version = MMC_CTLR_VERSION_1569};570571static struct i2c_board_info __initdata i2c_info[] = {572{573I2C_BOARD_INFO("dm6446evm_msp", 0x23),574},575{576I2C_BOARD_INFO("pcf8574", 0x38),577.platform_data = &pcf_data_u2,578},579{580I2C_BOARD_INFO("pcf8574", 0x39),581.platform_data = &pcf_data_u18,582},583{584I2C_BOARD_INFO("pcf8574", 0x3a),585.platform_data = &pcf_data_u35,586},587{588I2C_BOARD_INFO("24c256", 0x50),589.platform_data = &eeprom_info,590},591{592I2C_BOARD_INFO("tlv320aic33", 0x1b),593},594};595596/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),597* which requires 100 usec of idle bus after i2c writes sent to it.598*/599static struct davinci_i2c_platform_data i2c_pdata = {600.bus_freq = 20 /* kHz */,601.bus_delay = 100 /* usec */,602.sda_pin = 44,603.scl_pin = 43,604};605606static void __init evm_init_i2c(void)607{608davinci_init_i2c(&i2c_pdata);609i2c_add_driver(&dm6446evm_msp_driver);610i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));611}612613static struct platform_device *davinci_evm_devices[] __initdata = {614&davinci_fb_device,615&rtc_dev,616};617618static struct davinci_uart_config uart_config __initdata = {619.enabled_uarts = (1 << 0),620};621622static void __init623davinci_evm_map_io(void)624{625/* setup input configuration for VPFE input devices */626dm644x_set_vpfe_config(&vpfe_cfg);627dm644x_init();628}629630static int davinci_phy_fixup(struct phy_device *phydev)631{632unsigned int control;633/* CRITICAL: Fix for increasing PHY signal drive strength for634* TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY635* signal strength was low causing TX to fail randomly. The636* fix is to Set bit 11 (Increased MII drive strength) of PHY637* register 26 (Digital Config register) on this phy. */638control = phy_read(phydev, 26);639phy_write(phydev, 26, (control | 0x800));640return 0;641}642643#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \644defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)645#define HAS_ATA 1646#else647#define HAS_ATA 0648#endif649650#if defined(CONFIG_MTD_PHYSMAP) || \651defined(CONFIG_MTD_PHYSMAP_MODULE)652#define HAS_NOR 1653#else654#define HAS_NOR 0655#endif656657#if defined(CONFIG_MTD_NAND_DAVINCI) || \658defined(CONFIG_MTD_NAND_DAVINCI_MODULE)659#define HAS_NAND 1660#else661#define HAS_NAND 0662#endif663664static __init void davinci_evm_init(void)665{666struct clk *aemif_clk;667struct davinci_soc_info *soc_info = &davinci_soc_info;668669aemif_clk = clk_get(NULL, "aemif");670clk_enable(aemif_clk);671672if (HAS_ATA) {673if (HAS_NAND || HAS_NOR)674pr_warning("WARNING: both IDE and Flash are "675"enabled, but they share AEMIF pins.\n"676"\tDisable IDE for NAND/NOR support.\n");677davinci_init_ide();678} else if (HAS_NAND || HAS_NOR) {679davinci_cfg_reg(DM644X_HPIEN_DISABLE);680davinci_cfg_reg(DM644X_ATAEN_DISABLE);681682/* only one device will be jumpered and detected */683if (HAS_NAND) {684platform_device_register(&davinci_evm_nandflash_device);685evm_leds[7].default_trigger = "nand-disk";686if (HAS_NOR)687pr_warning("WARNING: both NAND and NOR flash "688"are enabled; disable one of them.\n");689} else if (HAS_NOR)690platform_device_register(&davinci_evm_norflash_device);691}692693platform_add_devices(davinci_evm_devices,694ARRAY_SIZE(davinci_evm_devices));695evm_init_i2c();696697davinci_setup_mmc(0, &dm6446evm_mmc_config);698699davinci_serial_init(&uart_config);700dm644x_init_asp(&dm644x_evm_snd_data);701702/* irlml6401 switches over 1A, in under 8 msec */703davinci_setup_usb(1000, 8);704705soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;706/* Register the fixup for PHY on DaVinci */707phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,708davinci_phy_fixup);709710}711712MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")713/* Maintainer: MontaVista Software <[email protected]> */714.boot_params = (DAVINCI_DDR_BASE + 0x100),715.map_io = davinci_evm_map_io,716.init_irq = davinci_irq_init,717.timer = &davinci_timer,718.init_machine = davinci_evm_init,719MACHINE_END720721722