Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/arm/mach-davinci/board-dm644x-evm.c
10699 views
1
/*
2
* TI DaVinci EVM board support
3
*
4
* Author: Kevin Hilman, MontaVista Software, Inc. <[email protected]>
5
*
6
* 2007 (c) MontaVista Software, Inc. This file is licensed under
7
* the terms of the GNU General Public License version 2. This program
8
* is licensed "as is" without any warranty of any kind, whether express
9
* or implied.
10
*/
11
#include <linux/kernel.h>
12
#include <linux/init.h>
13
#include <linux/dma-mapping.h>
14
#include <linux/platform_device.h>
15
#include <linux/gpio.h>
16
#include <linux/i2c.h>
17
#include <linux/i2c/pcf857x.h>
18
#include <linux/i2c/at24.h>
19
#include <linux/mtd/mtd.h>
20
#include <linux/mtd/nand.h>
21
#include <linux/mtd/partitions.h>
22
#include <linux/mtd/physmap.h>
23
#include <linux/phy.h>
24
#include <linux/clk.h>
25
#include <linux/videodev2.h>
26
27
#include <media/tvp514x.h>
28
29
#include <asm/mach-types.h>
30
#include <asm/mach/arch.h>
31
32
#include <mach/dm644x.h>
33
#include <mach/common.h>
34
#include <mach/i2c.h>
35
#include <mach/serial.h>
36
#include <mach/mux.h>
37
#include <mach/nand.h>
38
#include <mach/mmc.h>
39
#include <mach/usb.h>
40
#include <mach/aemif.h>
41
42
#define DM644X_EVM_PHY_ID "0:01"
43
#define LXT971_PHY_ID (0x001378e2)
44
#define LXT971_PHY_MASK (0xfffffff0)
45
46
static struct mtd_partition davinci_evm_norflash_partitions[] = {
47
/* bootloader (UBL, U-Boot, etc) in first 5 sectors */
48
{
49
.name = "bootloader",
50
.offset = 0,
51
.size = 5 * SZ_64K,
52
.mask_flags = MTD_WRITEABLE, /* force read-only */
53
},
54
/* bootloader params in the next 1 sectors */
55
{
56
.name = "params",
57
.offset = MTDPART_OFS_APPEND,
58
.size = SZ_64K,
59
.mask_flags = 0,
60
},
61
/* kernel */
62
{
63
.name = "kernel",
64
.offset = MTDPART_OFS_APPEND,
65
.size = SZ_2M,
66
.mask_flags = 0
67
},
68
/* file system */
69
{
70
.name = "filesystem",
71
.offset = MTDPART_OFS_APPEND,
72
.size = MTDPART_SIZ_FULL,
73
.mask_flags = 0
74
}
75
};
76
77
static struct physmap_flash_data davinci_evm_norflash_data = {
78
.width = 2,
79
.parts = davinci_evm_norflash_partitions,
80
.nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
81
};
82
83
/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
84
* limits addresses to 16M, so using addresses past 16M will wrap */
85
static struct resource davinci_evm_norflash_resource = {
86
.start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
87
.end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
88
.flags = IORESOURCE_MEM,
89
};
90
91
static struct platform_device davinci_evm_norflash_device = {
92
.name = "physmap-flash",
93
.id = 0,
94
.dev = {
95
.platform_data = &davinci_evm_norflash_data,
96
},
97
.num_resources = 1,
98
.resource = &davinci_evm_norflash_resource,
99
};
100
101
/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
102
* It may used instead of the (default) NOR chip to boot, using TI's
103
* tools to install the secondary boot loader (UBL) and U-Boot.
104
*/
105
static struct mtd_partition davinci_evm_nandflash_partition[] = {
106
/* Bootloader layout depends on whose u-boot is installed, but we
107
* can hide all the details.
108
* - block 0 for u-boot environment ... in mainline u-boot
109
* - block 1 for UBL (plus up to four backup copies in blocks 2..5)
110
* - blocks 6...? for u-boot
111
* - blocks 16..23 for u-boot environment ... in TI's u-boot
112
*/
113
{
114
.name = "bootloader",
115
.offset = 0,
116
.size = SZ_256K + SZ_128K,
117
.mask_flags = MTD_WRITEABLE, /* force read-only */
118
},
119
/* Kernel */
120
{
121
.name = "kernel",
122
.offset = MTDPART_OFS_APPEND,
123
.size = SZ_4M,
124
.mask_flags = 0,
125
},
126
/* File system (older GIT kernels started this on the 5MB mark) */
127
{
128
.name = "filesystem",
129
.offset = MTDPART_OFS_APPEND,
130
.size = MTDPART_SIZ_FULL,
131
.mask_flags = 0,
132
}
133
/* A few blocks at end hold a flash BBT ... created by TI's CCS
134
* using flashwriter_nand.out, but ignored by TI's versions of
135
* Linux and u-boot. We boot faster by using them.
136
*/
137
};
138
139
static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
140
.wsetup = 20,
141
.wstrobe = 40,
142
.whold = 20,
143
.rsetup = 10,
144
.rstrobe = 40,
145
.rhold = 10,
146
.ta = 40,
147
};
148
149
static struct davinci_nand_pdata davinci_evm_nandflash_data = {
150
.parts = davinci_evm_nandflash_partition,
151
.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
152
.ecc_mode = NAND_ECC_HW,
153
.options = NAND_USE_FLASH_BBT,
154
.timing = &davinci_evm_nandflash_timing,
155
};
156
157
static struct resource davinci_evm_nandflash_resource[] = {
158
{
159
.start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
160
.end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
161
.flags = IORESOURCE_MEM,
162
}, {
163
.start = DM644X_ASYNC_EMIF_CONTROL_BASE,
164
.end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
165
.flags = IORESOURCE_MEM,
166
},
167
};
168
169
static struct platform_device davinci_evm_nandflash_device = {
170
.name = "davinci_nand",
171
.id = 0,
172
.dev = {
173
.platform_data = &davinci_evm_nandflash_data,
174
},
175
.num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
176
.resource = davinci_evm_nandflash_resource,
177
};
178
179
static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
180
181
static struct platform_device davinci_fb_device = {
182
.name = "davincifb",
183
.id = -1,
184
.dev = {
185
.dma_mask = &davinci_fb_dma_mask,
186
.coherent_dma_mask = DMA_BIT_MASK(32),
187
},
188
.num_resources = 0,
189
};
190
191
static struct tvp514x_platform_data tvp5146_pdata = {
192
.clk_polarity = 0,
193
.hs_polarity = 1,
194
.vs_polarity = 1
195
};
196
197
#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
198
/* Inputs available at the TVP5146 */
199
static struct v4l2_input tvp5146_inputs[] = {
200
{
201
.index = 0,
202
.name = "Composite",
203
.type = V4L2_INPUT_TYPE_CAMERA,
204
.std = TVP514X_STD_ALL,
205
},
206
{
207
.index = 1,
208
.name = "S-Video",
209
.type = V4L2_INPUT_TYPE_CAMERA,
210
.std = TVP514X_STD_ALL,
211
},
212
};
213
214
/*
215
* this is the route info for connecting each input to decoder
216
* ouput that goes to vpfe. There is a one to one correspondence
217
* with tvp5146_inputs
218
*/
219
static struct vpfe_route tvp5146_routes[] = {
220
{
221
.input = INPUT_CVBS_VI2B,
222
.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
223
},
224
{
225
.input = INPUT_SVIDEO_VI2C_VI1C,
226
.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
227
},
228
};
229
230
static struct vpfe_subdev_info vpfe_sub_devs[] = {
231
{
232
.name = "tvp5146",
233
.grp_id = 0,
234
.num_inputs = ARRAY_SIZE(tvp5146_inputs),
235
.inputs = tvp5146_inputs,
236
.routes = tvp5146_routes,
237
.can_route = 1,
238
.ccdc_if_params = {
239
.if_type = VPFE_BT656,
240
.hdpol = VPFE_PINPOL_POSITIVE,
241
.vdpol = VPFE_PINPOL_POSITIVE,
242
},
243
.board_info = {
244
I2C_BOARD_INFO("tvp5146", 0x5d),
245
.platform_data = &tvp5146_pdata,
246
},
247
},
248
};
249
250
static struct vpfe_config vpfe_cfg = {
251
.num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
252
.i2c_adapter_id = 1,
253
.sub_devs = vpfe_sub_devs,
254
.card_name = "DM6446 EVM",
255
.ccdc = "DM6446 CCDC",
256
};
257
258
static struct platform_device rtc_dev = {
259
.name = "rtc_davinci_evm",
260
.id = -1,
261
};
262
263
static struct snd_platform_data dm644x_evm_snd_data;
264
265
/*----------------------------------------------------------------------*/
266
267
/*
268
* I2C GPIO expanders
269
*/
270
271
#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
272
273
274
/* U2 -- LEDs */
275
276
static struct gpio_led evm_leds[] = {
277
{ .name = "DS8", .active_low = 1,
278
.default_trigger = "heartbeat", },
279
{ .name = "DS7", .active_low = 1, },
280
{ .name = "DS6", .active_low = 1, },
281
{ .name = "DS5", .active_low = 1, },
282
{ .name = "DS4", .active_low = 1, },
283
{ .name = "DS3", .active_low = 1, },
284
{ .name = "DS2", .active_low = 1,
285
.default_trigger = "mmc0", },
286
{ .name = "DS1", .active_low = 1,
287
.default_trigger = "ide-disk", },
288
};
289
290
static const struct gpio_led_platform_data evm_led_data = {
291
.num_leds = ARRAY_SIZE(evm_leds),
292
.leds = evm_leds,
293
};
294
295
static struct platform_device *evm_led_dev;
296
297
static int
298
evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
299
{
300
struct gpio_led *leds = evm_leds;
301
int status;
302
303
while (ngpio--) {
304
leds->gpio = gpio++;
305
leds++;
306
}
307
308
/* what an extremely annoying way to be forced to handle
309
* device unregistration ...
310
*/
311
evm_led_dev = platform_device_alloc("leds-gpio", 0);
312
platform_device_add_data(evm_led_dev,
313
&evm_led_data, sizeof evm_led_data);
314
315
evm_led_dev->dev.parent = &client->dev;
316
status = platform_device_add(evm_led_dev);
317
if (status < 0) {
318
platform_device_put(evm_led_dev);
319
evm_led_dev = NULL;
320
}
321
return status;
322
}
323
324
static int
325
evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
326
{
327
if (evm_led_dev) {
328
platform_device_unregister(evm_led_dev);
329
evm_led_dev = NULL;
330
}
331
return 0;
332
}
333
334
static struct pcf857x_platform_data pcf_data_u2 = {
335
.gpio_base = PCF_Uxx_BASE(0),
336
.setup = evm_led_setup,
337
.teardown = evm_led_teardown,
338
};
339
340
341
/* U18 - A/V clock generator and user switch */
342
343
static int sw_gpio;
344
345
static ssize_t
346
sw_show(struct device *d, struct device_attribute *a, char *buf)
347
{
348
char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
349
350
strcpy(buf, s);
351
return strlen(s);
352
}
353
354
static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
355
356
static int
357
evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
358
{
359
int status;
360
361
/* export dip switch option */
362
sw_gpio = gpio + 7;
363
status = gpio_request(sw_gpio, "user_sw");
364
if (status == 0)
365
status = gpio_direction_input(sw_gpio);
366
if (status == 0)
367
status = device_create_file(&client->dev, &dev_attr_user_sw);
368
else
369
gpio_free(sw_gpio);
370
if (status != 0)
371
sw_gpio = -EINVAL;
372
373
/* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
374
gpio_request(gpio + 3, "pll_fs2");
375
gpio_direction_output(gpio + 3, 0);
376
377
gpio_request(gpio + 2, "pll_fs1");
378
gpio_direction_output(gpio + 2, 0);
379
380
gpio_request(gpio + 1, "pll_sr");
381
gpio_direction_output(gpio + 1, 0);
382
383
return 0;
384
}
385
386
static int
387
evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
388
{
389
gpio_free(gpio + 1);
390
gpio_free(gpio + 2);
391
gpio_free(gpio + 3);
392
393
if (sw_gpio > 0) {
394
device_remove_file(&client->dev, &dev_attr_user_sw);
395
gpio_free(sw_gpio);
396
}
397
return 0;
398
}
399
400
static struct pcf857x_platform_data pcf_data_u18 = {
401
.gpio_base = PCF_Uxx_BASE(1),
402
.n_latch = (1 << 3) | (1 << 2) | (1 << 1),
403
.setup = evm_u18_setup,
404
.teardown = evm_u18_teardown,
405
};
406
407
408
/* U35 - various I/O signals used to manage USB, CF, ATA, etc */
409
410
static int
411
evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
412
{
413
/* p0 = nDRV_VBUS (initial: don't supply it) */
414
gpio_request(gpio + 0, "nDRV_VBUS");
415
gpio_direction_output(gpio + 0, 1);
416
417
/* p1 = VDDIMX_EN */
418
gpio_request(gpio + 1, "VDDIMX_EN");
419
gpio_direction_output(gpio + 1, 1);
420
421
/* p2 = VLYNQ_EN */
422
gpio_request(gpio + 2, "VLYNQ_EN");
423
gpio_direction_output(gpio + 2, 1);
424
425
/* p3 = n3V3_CF_RESET (initial: stay in reset) */
426
gpio_request(gpio + 3, "nCF_RESET");
427
gpio_direction_output(gpio + 3, 0);
428
429
/* (p4 unused) */
430
431
/* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
432
gpio_request(gpio + 5, "WLAN_RESET");
433
gpio_direction_output(gpio + 5, 1);
434
435
/* p6 = nATA_SEL (initial: select) */
436
gpio_request(gpio + 6, "nATA_SEL");
437
gpio_direction_output(gpio + 6, 0);
438
439
/* p7 = nCF_SEL (initial: deselect) */
440
gpio_request(gpio + 7, "nCF_SEL");
441
gpio_direction_output(gpio + 7, 1);
442
443
return 0;
444
}
445
446
static int
447
evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
448
{
449
gpio_free(gpio + 7);
450
gpio_free(gpio + 6);
451
gpio_free(gpio + 5);
452
gpio_free(gpio + 3);
453
gpio_free(gpio + 2);
454
gpio_free(gpio + 1);
455
gpio_free(gpio + 0);
456
return 0;
457
}
458
459
static struct pcf857x_platform_data pcf_data_u35 = {
460
.gpio_base = PCF_Uxx_BASE(2),
461
.setup = evm_u35_setup,
462
.teardown = evm_u35_teardown,
463
};
464
465
/*----------------------------------------------------------------------*/
466
467
/* Most of this EEPROM is unused, but U-Boot uses some data:
468
* - 0x7f00, 6 bytes Ethernet Address
469
* - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
470
* - ... newer boards may have more
471
*/
472
473
static struct at24_platform_data eeprom_info = {
474
.byte_len = (256*1024) / 8,
475
.page_size = 64,
476
.flags = AT24_FLAG_ADDR16,
477
.setup = davinci_get_mac_addr,
478
.context = (void *)0x7f00,
479
};
480
481
/*
482
* MSP430 supports RTC, card detection, input from IR remote, and
483
* a bit more. It triggers interrupts on GPIO(7) from pressing
484
* buttons on the IR remote, and for card detect switches.
485
*/
486
static struct i2c_client *dm6446evm_msp;
487
488
static int dm6446evm_msp_probe(struct i2c_client *client,
489
const struct i2c_device_id *id)
490
{
491
dm6446evm_msp = client;
492
return 0;
493
}
494
495
static int dm6446evm_msp_remove(struct i2c_client *client)
496
{
497
dm6446evm_msp = NULL;
498
return 0;
499
}
500
501
static const struct i2c_device_id dm6446evm_msp_ids[] = {
502
{ "dm6446evm_msp", 0, },
503
{ /* end of list */ },
504
};
505
506
static struct i2c_driver dm6446evm_msp_driver = {
507
.driver.name = "dm6446evm_msp",
508
.id_table = dm6446evm_msp_ids,
509
.probe = dm6446evm_msp_probe,
510
.remove = dm6446evm_msp_remove,
511
};
512
513
static int dm6444evm_msp430_get_pins(void)
514
{
515
static const char txbuf[2] = { 2, 4, };
516
char buf[4];
517
struct i2c_msg msg[2] = {
518
{
519
.addr = dm6446evm_msp->addr,
520
.flags = 0,
521
.len = 2,
522
.buf = (void __force *)txbuf,
523
},
524
{
525
.addr = dm6446evm_msp->addr,
526
.flags = I2C_M_RD,
527
.len = 4,
528
.buf = buf,
529
},
530
};
531
int status;
532
533
if (!dm6446evm_msp)
534
return -ENXIO;
535
536
/* Command 4 == get input state, returns port 2 and port3 data
537
* S Addr W [A] len=2 [A] cmd=4 [A]
538
* RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
539
*/
540
status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
541
if (status < 0)
542
return status;
543
544
dev_dbg(&dm6446evm_msp->dev,
545
"PINS: %02x %02x %02x %02x\n",
546
buf[0], buf[1], buf[2], buf[3]);
547
548
return (buf[3] << 8) | buf[2];
549
}
550
551
static int dm6444evm_mmc_get_cd(int module)
552
{
553
int status = dm6444evm_msp430_get_pins();
554
555
return (status < 0) ? status : !(status & BIT(1));
556
}
557
558
static int dm6444evm_mmc_get_ro(int module)
559
{
560
int status = dm6444evm_msp430_get_pins();
561
562
return (status < 0) ? status : status & BIT(6 + 8);
563
}
564
565
static struct davinci_mmc_config dm6446evm_mmc_config = {
566
.get_cd = dm6444evm_mmc_get_cd,
567
.get_ro = dm6444evm_mmc_get_ro,
568
.wires = 4,
569
.version = MMC_CTLR_VERSION_1
570
};
571
572
static struct i2c_board_info __initdata i2c_info[] = {
573
{
574
I2C_BOARD_INFO("dm6446evm_msp", 0x23),
575
},
576
{
577
I2C_BOARD_INFO("pcf8574", 0x38),
578
.platform_data = &pcf_data_u2,
579
},
580
{
581
I2C_BOARD_INFO("pcf8574", 0x39),
582
.platform_data = &pcf_data_u18,
583
},
584
{
585
I2C_BOARD_INFO("pcf8574", 0x3a),
586
.platform_data = &pcf_data_u35,
587
},
588
{
589
I2C_BOARD_INFO("24c256", 0x50),
590
.platform_data = &eeprom_info,
591
},
592
{
593
I2C_BOARD_INFO("tlv320aic33", 0x1b),
594
},
595
};
596
597
/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
598
* which requires 100 usec of idle bus after i2c writes sent to it.
599
*/
600
static struct davinci_i2c_platform_data i2c_pdata = {
601
.bus_freq = 20 /* kHz */,
602
.bus_delay = 100 /* usec */,
603
.sda_pin = 44,
604
.scl_pin = 43,
605
};
606
607
static void __init evm_init_i2c(void)
608
{
609
davinci_init_i2c(&i2c_pdata);
610
i2c_add_driver(&dm6446evm_msp_driver);
611
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
612
}
613
614
static struct platform_device *davinci_evm_devices[] __initdata = {
615
&davinci_fb_device,
616
&rtc_dev,
617
};
618
619
static struct davinci_uart_config uart_config __initdata = {
620
.enabled_uarts = (1 << 0),
621
};
622
623
static void __init
624
davinci_evm_map_io(void)
625
{
626
/* setup input configuration for VPFE input devices */
627
dm644x_set_vpfe_config(&vpfe_cfg);
628
dm644x_init();
629
}
630
631
static int davinci_phy_fixup(struct phy_device *phydev)
632
{
633
unsigned int control;
634
/* CRITICAL: Fix for increasing PHY signal drive strength for
635
* TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
636
* signal strength was low causing TX to fail randomly. The
637
* fix is to Set bit 11 (Increased MII drive strength) of PHY
638
* register 26 (Digital Config register) on this phy. */
639
control = phy_read(phydev, 26);
640
phy_write(phydev, 26, (control | 0x800));
641
return 0;
642
}
643
644
#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
645
defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
646
#define HAS_ATA 1
647
#else
648
#define HAS_ATA 0
649
#endif
650
651
#if defined(CONFIG_MTD_PHYSMAP) || \
652
defined(CONFIG_MTD_PHYSMAP_MODULE)
653
#define HAS_NOR 1
654
#else
655
#define HAS_NOR 0
656
#endif
657
658
#if defined(CONFIG_MTD_NAND_DAVINCI) || \
659
defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
660
#define HAS_NAND 1
661
#else
662
#define HAS_NAND 0
663
#endif
664
665
static __init void davinci_evm_init(void)
666
{
667
struct clk *aemif_clk;
668
struct davinci_soc_info *soc_info = &davinci_soc_info;
669
670
aemif_clk = clk_get(NULL, "aemif");
671
clk_enable(aemif_clk);
672
673
if (HAS_ATA) {
674
if (HAS_NAND || HAS_NOR)
675
pr_warning("WARNING: both IDE and Flash are "
676
"enabled, but they share AEMIF pins.\n"
677
"\tDisable IDE for NAND/NOR support.\n");
678
davinci_init_ide();
679
} else if (HAS_NAND || HAS_NOR) {
680
davinci_cfg_reg(DM644X_HPIEN_DISABLE);
681
davinci_cfg_reg(DM644X_ATAEN_DISABLE);
682
683
/* only one device will be jumpered and detected */
684
if (HAS_NAND) {
685
platform_device_register(&davinci_evm_nandflash_device);
686
evm_leds[7].default_trigger = "nand-disk";
687
if (HAS_NOR)
688
pr_warning("WARNING: both NAND and NOR flash "
689
"are enabled; disable one of them.\n");
690
} else if (HAS_NOR)
691
platform_device_register(&davinci_evm_norflash_device);
692
}
693
694
platform_add_devices(davinci_evm_devices,
695
ARRAY_SIZE(davinci_evm_devices));
696
evm_init_i2c();
697
698
davinci_setup_mmc(0, &dm6446evm_mmc_config);
699
700
davinci_serial_init(&uart_config);
701
dm644x_init_asp(&dm644x_evm_snd_data);
702
703
/* irlml6401 switches over 1A, in under 8 msec */
704
davinci_setup_usb(1000, 8);
705
706
soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
707
/* Register the fixup for PHY on DaVinci */
708
phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
709
davinci_phy_fixup);
710
711
}
712
713
MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
714
/* Maintainer: MontaVista Software <[email protected]> */
715
.boot_params = (DAVINCI_DDR_BASE + 0x100),
716
.map_io = davinci_evm_map_io,
717
.init_irq = davinci_irq_init,
718
.timer = &davinci_timer,
719
.init_machine = davinci_evm_init,
720
MACHINE_END
721
722