Path: blob/master/arch/arm/mach-davinci/include/mach/spi.h
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/*1* Copyright 2009 Texas Instruments.2*3* This program is free software; you can redistribute it and/or modify4* it under the terms of the GNU General Public License as published by5* the Free Software Foundation; either version 2 of the License, or6* (at your option) any later version.7*8* This program is distributed in the hope that it will be useful,9* but WITHOUT ANY WARRANTY; without even the implied warranty of10* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the11* GNU General Public License for more details.12*13* You should have received a copy of the GNU General Public License14* along with this program; if not, write to the Free Software15* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.16*/1718#ifndef __ARCH_ARM_DAVINCI_SPI_H19#define __ARCH_ARM_DAVINCI_SPI_H2021#include <mach/edma.h>2223#define SPI_INTERN_CS 0xFF2425enum {26SPI_VERSION_1, /* For DM355/DM365/DM6467 */27SPI_VERSION_2, /* For DA8xx */28};2930/**31* davinci_spi_platform_data - Platform data for SPI master device on DaVinci32*33* @version: version of the SPI IP. Different DaVinci devices have slightly34* varying versions of the same IP.35* @num_chipselect: number of chipselects supported by this SPI master36* @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt37* controller withn the SoC. Possible values are 0 and 1.38* @chip_sel: list of GPIOs which can act as chip-selects for the SPI.39* SPI_INTERN_CS denotes internal SPI chip-select. Not necessary40* to populate if all chip-selects are internal.41* @cshold_bug: set this to true if the SPI controller on your chip requires42* a write to CSHOLD bit in between transfers (like in DM355).43* @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any44* device on the bus.45*/46struct davinci_spi_platform_data {47u8 version;48u8 num_chipselect;49u8 intr_line;50u8 *chip_sel;51bool cshold_bug;52enum dma_event_q dma_event_q;53};5455/**56* davinci_spi_config - Per-chip-select configuration for SPI slave devices57*58* @wdelay: amount of delay between transmissions. Measured in number of59* SPI module clocks.60* @odd_parity: polarity of parity flag at the end of transmit data stream.61* 0 - odd parity, 1 - even parity.62* @parity_enable: enable transmission of parity at end of each transmit63* data stream.64* @io_type: type of IO transfer. Choose between polled, interrupt and DMA.65* @timer_disable: disable chip-select timers (setup and hold)66* @c2tdelay: chip-select setup time. Measured in number of SPI module clocks.67* @t2cdelay: chip-select hold time. Measured in number of SPI module clocks.68* @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured69* in number of SPI clocks.70* @c2edelay: chip-select active to SPI ENAn signal active time. Measured in71* number of SPI clocks.72*/73struct davinci_spi_config {74u8 wdelay;75u8 odd_parity;76u8 parity_enable;77#define SPI_IO_TYPE_INTR 078#define SPI_IO_TYPE_POLL 179#define SPI_IO_TYPE_DMA 280u8 io_type;81u8 timer_disable;82u8 c2tdelay;83u8 t2cdelay;84u8 t2edelay;85u8 c2edelay;86};8788#endif /* __ARCH_ARM_DAVINCI_SPI_H */899091