Path: blob/master/arch/arm/mach-footbridge/include/mach/system.h
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/*1* arch/arm/mach-footbridge/include/mach/system.h2*3* Copyright (C) 1996-1999 Russell King.4*5* This program is free software; you can redistribute it and/or modify6* it under the terms of the GNU General Public License version 2 as7* published by the Free Software Foundation.8*/9#include <linux/io.h>10#include <asm/hardware/dec21285.h>11#include <mach/hardware.h>12#include <asm/leds.h>13#include <asm/mach-types.h>1415static inline void arch_idle(void)16{17cpu_do_idle();18}1920static inline void arch_reset(char mode, const char *cmd)21{22if (mode == 's') {23/*24* Jump into the ROM25*/26cpu_reset(0x41000000);27} else {28if (machine_is_netwinder()) {29/* open up the SuperIO chip30*/31outb(0x87, 0x370);32outb(0x87, 0x370);3334/* aux function group 1 (logical device 7)35*/36outb(0x07, 0x370);37outb(0x07, 0x371);3839/* set GP16 for WD-TIMER output40*/41outb(0xe6, 0x370);42outb(0x00, 0x371);4344/* set a RED LED and toggle WD_TIMER for rebooting45*/46outb(0xc4, 0x338);47} else {48/*49* Force the watchdog to do a CPU reset.50*51* After making sure that the watchdog is disabled52* (so we can change the timer registers) we first53* enable the timer to autoreload itself. Next, the54* timer interval is set really short and any55* current interrupt request is cleared (so we can56* see an edge transition). Finally, TIMER4 is57* enabled as the watchdog.58*/59*CSR_SA110_CNTL &= ~(1 << 13);60*CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |61TIMER_CNTL_AUTORELOAD |62TIMER_CNTL_DIV16;63*CSR_TIMER4_LOAD = 0x2;64*CSR_TIMER4_CLR = 0;65*CSR_SA110_CNTL |= (1 << 13);66}67}68}697071