Path: blob/master/arch/arm/mach-gemini/include/mach/hardware.h
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/*1* This file contains the hardware definitions for Gemini.2*3* Copyright (C) 2001-2006 Storlink, Corp.4* Copyright (C) 2008-2009 Paulius Zaleckas <[email protected]>5*6* This program is free software; you can redistribute it and/or modify7* it under the terms of the GNU General Public License as published by8* the Free Software Foundation; either version 2 of the License, or9* (at your option) any later version.10*/11#ifndef __MACH_HARDWARE_H12#define __MACH_HARDWARE_H1314/*15* Memory Map definitions16*/17#ifdef CONFIG_GEMINI_MEM_SWAP18# define GEMINI_DRAM_BASE 0x0000000019# define GEMINI_SRAM_BASE 0x7000000020#else21# define GEMINI_SRAM_BASE 0x0000000022# define GEMINI_DRAM_BASE 0x1000000023#endif24#define GEMINI_FLASH_BASE 0x3000000025#define GEMINI_GLOBAL_BASE 0x4000000026#define GEMINI_WAQTCHDOG_BASE 0x4100000027#define GEMINI_UART_BASE 0x4200000028#define GEMINI_TIMER_BASE 0x4300000029#define GEMINI_LCD_BASE 0x4400000030#define GEMINI_RTC_BASE 0x4500000031#define GEMINI_SATA_BASE 0x4600000032#define GEMINI_LPC_HOST_BASE 0x4700000033#define GEMINI_LPC_IO_BASE 0x4780000034#define GEMINI_INTERRUPT_BASE 0x4800000035/* TODO: Different interrupt controllers when SMP36* #define GEMINI_INTERRUPT0_BASE 0x4800000037* #define GEMINI_INTERRUPT1_BASE 0x4900000038*/39#define GEMINI_SSP_CTRL_BASE 0x4A00000040#define GEMINI_POWER_CTRL_BASE 0x4B00000041#define GEMINI_CIR_BASE 0x4C00000042#define GEMINI_GPIO_BASE(x) (0x4D000000 + (x) * 0x1000000)43#define GEMINI_PCI_IO_BASE 0x5000000044#define GEMINI_PCI_MEM_BASE 0x5800000045#define GEMINI_TOE_BASE 0x6000000046#define GEMINI_GMAC0_BASE 0x6000A00047#define GEMINI_GMAC1_BASE 0x6000E00048#define GEMINI_SECURITY_BASE 0x6200000049#define GEMINI_IDE0_BASE 0x6300000050#define GEMINI_IDE1_BASE 0x6340000051#define GEMINI_RAID_BASE 0x6400000052#define GEMINI_FLASH_CTRL_BASE 0x6500000053#define GEMINI_DRAM_CTRL_BASE 0x6600000054#define GEMINI_GENERAL_DMA_BASE 0x6700000055#define GEMINI_USB0_BASE 0x6800000056#define GEMINI_USB1_BASE 0x6900000057#define GEMINI_BIG_ENDIAN_BASE 0x800000005859#define GEMINI_TIMER1_BASE GEMINI_TIMER_BASE60#define GEMINI_TIMER2_BASE (GEMINI_TIMER_BASE + 0x10)61#define GEMINI_TIMER3_BASE (GEMINI_TIMER_BASE + 0x20)6263/*64* UART Clock when System clk is 150MHz65*/66#define UART_CLK 480000006768/*69* macro to get at IO space when running virtually70*/71#define IO_ADDRESS(x) ((((x) & 0xFFF00000) >> 4) | ((x) & 0x000FFFFF) | 0xF0000000)7273#endif747576